MJD8TG, NJVMJD8TG (PNP) Complementary Darlington Power Transistor For Surface Mount Applications Designed for general purpose amplifier and low speed switching applications. Features Monolithic Construction With Builtin BaseEmitter Shunt Resistors High DC Current Gain: h FE = (Typ) @ I C =. Adc Epoxy Meets UL 9 V @. in. ESD Ratings: Human Body Model, B > 8 V Machine Model, C > V NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ Qualified and PPAP Capable These are PbFree Devices* ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS Rating Symbol Value Unit CollectorEmitter Voltage V CEO CollectorBase Voltage V CB EmitterBase Voltage V EB Collector Current Continuous Peak I C 8 6 Adc Base Current I B madc Total Power Dissipation @ T C = C Derate above C Total Power Dissipation* @ T A = C Derate above C Operating and Storage Junction Temperature Range P D.6 P D.7. T J, T stg 6 to + W W/ C W W/ C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, JunctiontoCase R JC 6. C/W Thermal Resistance, JunctiontoAmbient (Note ) R JA 7. C C/W. These ratings are applicable when surface mounted on the minimum pad sizes recommended. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MARKING DIAGRAM A Y WW J8 G CASE 69C STYLE = Assembly Location = Year = Work Week = Device Code = PbFree Package ORDERING INFORMATION Device Package Shipping MJD8TG SILICON POWER TRANSISTOR 8 AMPERES VOLTS, WATTS Base Collector Emitter NJVMJD8TG (PbFree) (PbFree) AYWW J8G,/Tape & Reel,/Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D. Semiconductor Components Industries, LLC, February, Rev. Publication Order Number: MJD8/D
MJD8TG, NJVMJD8TG (PNP) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICAL CHARACTERISTICS (T ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ C = C unless otherwise noted) OFF CHARACTERISTICS Characteristic Symbol Min Max Unit CollectorEmitter Sustaining Voltage (I C = madc, I B = ) V CEO(sus) Collector Cutoff Current (V CE =, I B = ) I CEO ma Collector Cutoff Current (V CB =, I E = ) I CBO Adc Emitter Cutoff Current (V BE =, I C = ) ON CHARACTERISTICS I EBO madc DC Current Gain (I C = Adc, V CE = ) (I C = 8 Adc, V CE = ) h FE, CollectorEmitter Saturation Voltage (I C = Adc, I B = 6 madc) (I C = 8 Adc, I B = 8 madc) V CE(sat) BaseEmitter Saturation Voltage () (I C = 8 Adc, I B = 8 madc) V BE(sat). BaseEmitter On Voltage (I C = Adc, V CE = ) DYNAMIC CHARACTERISTICS V BE(on).8 CurrentGainBandwidth Product (I C = Adc, V CE =, f = MHz) h fe MHz Output Capacitance (V CB =, I E =, f =. MHz) C ob pf SmallSignal Current Gain (I C = Adc, V CE =, f = khz). Pulse Test: Pulse Width s, Duty Cycle %. h fe T A. T C PD, POWER DISSIPATION (WATTS).. T C T A SURFACE MOUNT 7 T, TEMPERATURE ( C) Figure. Power Derating
MJD8TG, NJVMJD8TG (PNP) TYPICAL ELECTRICAL CHARACTERISTICS hfe, DC CURRENT GAIN,, 7 7 T J = C C - C.....7 7...7 7 Figure. DC Current Gain V CE = V VCE, COLLECTOREMITTER VOLTAGE (VOLTS).6..8. I C = A A 6 A I B, BASE CURRENT (ma) T J = C Figure. Collector Saturation Region V, VOLTAGE (VOLTS) T J = C.. V BE @ V CE = V V BE(sat) @ I C /I B = V CE(sat) @ I C /I B =......7 7 V, TEMPERATURE COEFFICIENTS (mv/ C) + + *I C /I B h FE/ + + + C to C - VC for V CE(sat) - - C to C - VB for V BE C to C - C to C - -.... 7, COLLECTOR CURRENT ( A) IC REVERSE V CE = V T J = C C C Figure. On Voltages FORWARD - +.6 +. +. -. -. -.6 -.8 - -. -. V BE, BASEEMITTER VOLTAGE (VOLTS) Figure 6. Collector CutOff Region hfe, SMALLSIGNAL CURRENT GAIN, Figure. Temperature Coefficients T C = C V CE = I C = Adc PNP NPN f, FREQUENCY (khz) Figure 7. SmallSignal Current Gain
MJD8TG, NJVMJD8TG (PNP) T J = C C, CAPACITANCE (pf) 7 C ib C ob... V R, REVERSE VOLTAGE (VOLTS) Figure 8. Capacitance R B & R C VARIED TO OBTAIN DESIRED CURRENT LEVELS D, MUST BE FAST RECOVERY TYPE, e.g.: N8 USED ABOVE I B ma MSD6 USED BELOW I B ma V APPROX + 8 V V APPROX - V t r, t f ns DUTY CYCLE = % s R B D 8 k + V TUT V CC - V FOR t d AND t r, D IS DISCONNECTED AND V = FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES. R C SCOPE t, TIME ( s).7. t s.. V CC = V I C /I B =. I B = I B.7 T J = C t d @ V BE(off) = V......7 t f t r 7 Figure 9. Switching Times Test Circuit Figure. Switching Times r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED).7.....7... D =..... SINGLE PULSE R JC(t) = r(t) R JC P (pk) R JC = 6. C/W D CURVES APPLY FOR POWER PULSE TRAIN SHOWN t READ TIME AT t t T J(pk) T C = P (pk) JC(t) DUTY CYCLE, D = t /t......... t, TIME OR PULSE WIDTH (ms) Figure. Thermal Response
MJD8TG, NJVMJD8TG (PNP) IC, COLLECTOR CURRENT (AMP)....... s s T J = C ms ms BONDING WIRE LIMIT THERMAL LIMIT T C = C (SINGLE PULSE) SECOND BREAKDOWN LIMIT CURVES APPLY BELOW RATED V CEO 7 V CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) dc There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I C V CE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure is based on T J(pk) = C; T C is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to % provided T J(pk) < C. T J(pk) may be calculated from the data in Figure. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. Figure. Maximum Forward Bias Safe Operating REA COLLECTOR BASE 8 k EMITTER Figure. Darlington Schematic
MJD8TG, NJVMJD8TG (PNP) PACKAGE DIMENSIONS L L b e E b b A D B DETAIL A c. (.) M C A C c H L GAUGE PLANE 6.. CASE 69C ISSUE D L L DETAIL A ROTATED 9 CW SOLDERING FOOTPRINT*.8. A H..8 C Z SEATING PLANE NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y.M, 99.. CONTROLLING DIMENSION: INCHES.. THERMAL PAD CONTOUR OPTIONAL WITHIN DI- MENSIONS b, L and Z.. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED.6 INCHES PER SIDE.. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. INCHES MILLIMETERS DIM MIN MAX MIN MAX A.86.9.8.8 A.... b...6.89 b...76. b.8..7.6 c.8..6.6 c.8..6.6 D...97 6. E..6 6. 6.7 e.9 BSC.9 BSC H.7. 9.. L..7..78 L.8 REF.7 REF L. BSC. BSC L...89.7 L.. Z..9 STYLE : PIN. BASE. COLLECTOR. EMITTER. COLLECTOR.8.8.6.6 6.7. SCALE : mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 6, Denver, Colorado 87 USA Phone: 677 or 886 Toll Free USA/Canada Fax: 6776 or 8867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 8898 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 79 9 Japan Customer Focus Center Phone: 887 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MJD8/D