Matched N-Channel JFET Pairs N// Part Number V GS(off) (V) V (BR)GSS Min (V) Min I G Typ (pa) V GS V GS Max (mv) N. to 7. N. to 7. N. to 7. Two-Chip Design High Slew Rate Low Offset/Drift Voltage Low Gate Leakage: pa Low Noise: nv Hz @ Hz Good CMRR: 7 db Minimum Parasitics Tight Differential Match vs. Current Improved Op Amp Speed, Settling Time Accuracy Minimum Input Error/Trimming Requirement Insignificant Signal Loss/Error Voltage High System Sensitivity Minimum Error with Large Input Signals Maximum High Frequency Performance Wideband Differential Amps High-Speed, Temp-Compensated, Single-Ended Input Amps High-Speed Comparators Impedance Converters Matched Switches The N// are matched pairs of JFETs mounted in a TO-7 package. This two-chip design reduces parasitics for good performance at high frequency while ensuring extremely tight matching. This series features high breakdown voltage (V (BR)DSS typically > V), high gain (typically > 9 ms), and < mv offset between the two die. The hermetically-sealed TO-7 package is available with full military processing (see Military Information). For similar products see the low-noise U/SST series, and the low-leakage N9/97/98/99 data sheets. TO-7 S G D D G S Top View Gate-Drain, Voltage............................... V Gate-Gate Voltage............................................ 8 V Gate Current................................................. ma Lead Temperature ( / from case for sec.).................. C Storage Temperature................................... to C Document Number: 7 S- Rev. D, -Jun- Operating Junction Temperature.......................... to C Power Dissipation : Per Side a........................ mw Total b........................... mw Notes a. Derate. mw/ C above C b. Derate. mw/ C above C 8-
Static Limits N N N Parameter Symbol Test Conditions Typ a Min Max Min Max Min Max Unit Breakdown Voltage Cutoff Voltage V (BR)GSS I G = A, V DS = V V GS(off) V DS = V, = na... Saturation Drain Current b SS V DS = V, V GS = V ma V GS = V, V DS = V pa Gate Reverse Current I GSS T A = C na V DG = V, = ma pa Gate Operating Current c I G na Drain-Source On-Resistance r DS(on) V GS = V, = ma Voltage c V GS V DG = V, = ma. Forward Voltage Dynamic Forward Transconductance Output Conductance Forward Transconductance Input Capacitance Reverse Transfer Capacitance Equivalent Input Noise Voltage V GS(F) I G = ma, V DS = V.7 g os V DS = V, = ma f = khz V DS = V, = ma f = MHz 9 7.. 7.. 7.. ms S 8. 7 7 7 ms C iss V DS = V, = ma C rss f = MHz. e n V DS = V, = ma f = Hz Noise Figure NF R G = M db Matching Differential Voltage Voltage Differential Change with Temperature V GS V GS V DG = V, = ma mv V GS V GS T V DG = V, = ma T A = to C V V pf nv Hz V/ C Saturation Drain Current Ratio c SS SS V DS = V, V GS = V.98.9.9.9 Transconductance Ratio V DS = V, = ma f = khz.98.9.9.9 Common Mode Rejection Ratio c CMRR V DG = to V = ma 7 db Notes a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. NCBD b. Pulse test: PW s duty cycle %. c. This parameter not registered with JEDEC. 8- Document Number: 7 S- Rev. D, -Jun-
gfs Forward Transconductance 8 8 On-Resistance and Drain Current vs. Cutoff Voltage r DS @ ID = ma, V GS = SS @ V DS = V, V GS = r DS SS 8 Forward Transconductance and Output Conductance vs. Cutoff Voltage and g os @ V DS = V V GS = V, f = khz On-Resistance vs. Temperature = ma r DS changes.7%/ C 8 T A Temperature ( C) g os 8 SS Saturation Drain Current (ma) gos Output Conductance ( S) Switching Time (ns) Switching Time (ns) 8 8 On-Resistance vs. Drain Current t r t d(on) @ = ma Turn-On Switching t r approximately independent of V DG = V, R G = V GS(L) = V t d(on) @ = ma 8 t d(off) Turn-Off Switching t d(off) independent of device V GS(off) V DG = V, V GS(L) = V t f 8 8 Document Number: 7 S- Rev. D, -Jun- 8-
8 V GS(off) =. V Output Characteristics.7 V 8 V DS Drain-Source Voltage (V) V GS = V. V. V. V. V. V. V 8 C C Transfer Characteristics V DS = V..8.. V GS Voltage (V) Output Characteristics V GS = V V GS(off) =. V. V. V. V Capacitance vs. Voltage f = MHz V DS = V. V. V. V.7 V.8 V Capacitance (pf) 8 C iss C rss.9 V....8 8 V DS Drain-Source Voltage (V) V GS Voltage (V) na na Gate Leakage Current I GSS @ C I D = ma Common-Gate Input Admittance V DG = V = ma g ig I G Gate Leakage pa pa ma ma ma I GSS @ C b ig pa. pa I G(on) @ 8 V DG Drain-Gate Voltage (V). 8- Document Number: 7 S- Rev. D, -Jun-
Common-Gate Forward Admittance V DG = V = ma Common-Gate Reverse Admittance V DG = V = ma g fg b fg b rg g fg g rg +g rg... Common-Gate Output Admittance V DG = V = ma b og g og en Noise Voltage nv / Hz Noise Voltage vs. Frequency V DS = V = ma = ma. k k k f Frequency (Hz) Output Conductance vs. Drain Current Transconductance vs. Drain Current V DS = V f = khz V DS = V f = khz g os Output Conductance (µs) C C Forward Transconductance C C.... Document Number: 7 S- Rev. D, -Jun- 8-