PIERS ONLINE, VOL. 4, NO. 2, 2008 151 A High Linearity and Efficiency Doherty Power Amplifier for Retrodirective Communication Xiaoqun Chen, Yuchun Guo, and Xiaowei Shi National Key Laboratory of Antennas and Microwave Technology, Xidian University Xi an 710071, China Abstract This paper presents a Doherty power amplifier with advanced design methods for high efficiency and linearity applied to retrodirective communication system for high peak to average power ratio (PAR). A special inverted Doherty topology is proposed in order to optimize the average efficiency of Doherty amplifier. Also we develop Doherty power amplifier with uneven power drive which is provided more input power to the peak amplifier than carrier amplifier for full power operation and appropriate load modulation. These methods are applied to implement Doherty power amplifier using GaAs FET. The amplifier is optimized at large power back-off. The power added efficiency (PAE) and adjacent channel leakage ratio (ACLR) are 33.1% and 47 dbc, which improves about 3.2% and 5 db respectively, its third-order intermodulation distortion (IMD3) has 2.5 db improvement compared with conventional Doherty power amplifier. 1. INTRODUCTION Recently, microwave retrodirective wireless communication has become a hot research area. It shows that the retrodirective array can simultaneously respond to each individual signal proving its usefulness in mobile wireless applications where multiple signal tracking is required [1]. Phase conjugation is a known key technique that applied to retrodirective communication systems [2]. The classical approach to achieve the phase conjugation necessary for these antennas is to use a low noise amplifier, a high linear power amplifier and a mixer arrangement [2]. Highly efficient and linear Power amplifier is a key component in the systems. However, there is an obstacle in such system makes the use of amplifier difficult, the high peakto-average power ratio (PAPR) caused by the large number of independent subcarriers with random phase and amplitude added together at the modulator [3]. The communication systems are reduced in both size and cost, but required the quality of communication [4, 5]. According to IEEE 802.11a, so a power amplifier with high linearity and efficiency is great of importance. The simplest method is to back-off signals form the saturation region to the linear region at the cost of power efficiency, usually in an efficiency form 12% to 20%. Another may use predistortion methods or elimination and restoration techniques or feedforward [6]. However, these techniques which need additional Carrier Amplifier Power Splitter Z 0=50Ω Z 0=50Ω Z 0 =35Ω Z =50Ω L Peak Amplifier Figure 1: The classical Doherty power amplifier.
PIERS ONLINE, VOL. 4, NO. 2, 2008 152 components result in an increase in cost, size, and power dissipation [7]. In order to solve these problems, a Doherty amplifier is the most promising candidate with simple fabrication and high efficiency for the application, as Fig. 1 shown. The fundamental operation theory has been well described in [8 11]. The simplest Doherty amplifier operation can be achieved using two cells with a class-ab biased carrier amplifier cell and a class-c biased peak amplifier cell with respective input matching network and output matching network. It has a high linearity and efficiency across the wideband signal has been studied extensively for the application due to its high efficiency. However, the conventional Doherty power amplifier has its limitation. Due to its lower bias point, the current level of the peaking cell is always lower than that of the carrier cell. The load impedances of both cells cannot be fully modulated to the value of the optimum impedance for a high power match. Thus, neither cell can generate full output power. In this paper, two advanced methods are good approaches to solve these problems well. The implementation of the amplifier is simple and results show excellent performance. 2. ADVANCE DESIGN METHODS 2.1. Inverted Doherty Power Amplifier As it is mentioned above, carrier amplifier operational theories indicated that the best efficiency at average envelop power actually occurred with load impedance closer to 25 Ω than 100 Ω. In order to achieve maximum efficiency at 100 Ω, approximately one-quarter wavelength of 50 Ω line will be applied to the carrier amplifier s output matching network in Fig. 1. Similarly, the offstate impedance presented by the peak amplifier is so low that this also suggests appending λ/4 wavelength of 50 Ω line to peak amplifier s output matching network to guarantee high impedance at the combining node. Size and loss constraints make this approach undesirable. By reversing the Doherty combining point, a 25 Ω maximum efficiency load is provided for the carrier amplifier at average envelop power. The impedance inversion previously accomplished with the 50 Ω, λ/4 line is incorporated into peak output matching network, which constrains θs21 = 90 deg. As the peak cell, a 50Ω, λ/4 line becomes the off-state impedance rotation appended to. Then output is taken from the carrier amplifier side of the combining node as shown in Fig. 2, called inverted Doherty topology. Carrier Amplifier Power Splitter Z 0 =50Ω Z 0= =35Ω L λ/4 Z 0=50Ω Z L = 50Ω Peak Amplifier Figure 2: Inverted Doherty power amplifier topology. This inverted Doherty will guarantee the high efficiency at the low drive lever. But most challenge of the Doherty design is the carrier amplifier output match. In addition to the 90 degree phase requirement mentioned above, the gain of the carrier amplifier must decrease by 3 db as its output power transitions between average envelope power and half of peak envelope power. This can be understood by noting the carrier amplifier s input power ranges from average envelope power to peak envelope power, while the required output power range is average envelope power to half of peak envelope power. The gain reduction is necessary to accommodate the half of peak envelope power of the peaking amplifier. With uneven drive, more power will deliver to the peak cell. This creates a constant gain for the composite Doherty amplifier at lower power regain, which is an important linearity consideration. To optimize the Doherty amplifier s average efficiency, the carrier amplifier s output match must be designed for best efficiency performance at
PIERS ONLINE, VOL. 4, NO. 2, 2008 153 average envelope power. For the inverted topology, this occurs at 25 Ω. Maximum carrier amplifier efficiency is limited by the linearity which results when it is operated together with the Class C peaking amplifier. The carrier amplifier design is thus constrained by gain, phase, efficiency, linearity, and absolute power requirements. When peak amplifier operates at class C, its transfer characteristic must be smooth, without evidence of discontinuities. The adjacent channel leakage and IMD problems are obvious with two tone test. Design of bypassing and decoupling networks as well as the bias circuit are crucial to avoiding this problem with bypassing capacitors. The output contribution of the peaking amplifier is expected to range from zero to half of peak envelope power for the same drive range which causes the carrier amplifier to deliver average envelope power to half of peak envelope power. It is set to provide equal phase lengths in both signal paths. The final phase length is optimized for best linearity and gain flatness. 2.2. Uneven Power Drive The basic operation principle of Doherty power amplifier has been well described in [12, 13]. Fig. 3 depicts the load impedance of both amplifiers versus input voltage. Z C = Z T 2 Z L, 0 < V in < V in, max/2 2 Z ( T (1) Z L 1 + I ), V in, max/2 < V in < V in, max P I C, ( 0 < V in < V in, max/2 Z P = Z L 1 + I ) P (2), V I in, max/2 < V in < V in, max C where Z L is the load impedance of the Doherty amplifier; I C and I P represent the fundamental currents of the carrier and peaking amplifiers, respectively; and Z C and Z P are the output load impedances of the carrier and peaking amplifiers, respectively, as Fig. 3 shown. In the low power region, the linearity of the amplifier is entirely determined by the carrier cell. Therefore, the carrier cell should be highly linear for its careful optimized load impedance. In the high-power region, the current level of the peaking cell plays an important role in determining the load modulation of the amplifier. For the asymmetric amplifier with even power drive, the fundamental current of the peaking cell is insufficient to achieve the full load modulation. The load impedances of both cells are larger than the optimum values in the high-power region. As a result, Load Impedence (Ohm) 6Zopt 5Zopt 4Zopt 3Zopt 2Zopt Zopt Zc,Carrier Amplifier Zp, Peak Amplifier Vin,max/2 Voltage Amplitude Vin,max Figure 3: Load impedance versus input drive.
PIERS ONLINE, VOL. 4, NO. 2, 2008 154 the carrier and peaking cells are driven into saturation without producing full power. Thus, the amplifier is seriously affected by linearity, as well as power level. In order to enhance the output power from the peak amplifier, a Doherty amplifier with uneven power drive is proposed, applied more power to the peak cell. As the amplifier with uneven power drive, the linearity of the amplifier is improved due to proper power operation without severe saturation. The linearity is further enhanced by the harmonic cancellation of from the two cells at appropriate gate biases. The carrier cell, which is biased at class AB, has the gain compression at high output power levels, while the class-c biased peak cell has the gain expansion. Hence, the gain expansion of the peak cell can compensate the gain compression of the carrier cell. Specifically, the third-order intermodulation (IM3) level from the carrier cell increases and the phase of IM3 is decreased because the gain of the carrier cell is compressed. On the other hand, when the gain of the peak cell is expanded with uneven drive, both the IM3 level and phase increase. To cancel out IM3s from the two cells, the components must be 180 deg. out-of-phase with the same amplitudes. Therefore, the peak cell should be designed appropriately to cancel the harmonics of the carrier cell. 3. AMPLIFIER IMPLEMENTATION AND RESULTS The proposed Doherty power amplifier is designed with cascaded structure. It consists of three stages pre-driver, driver and final stage, the novel Doherty amplifier. The pre-driver and driver two stages are used to enhance higher output and power gain. They both work in class A, since this method makes the two stages under the small signal situation [14]. We put the emphases on the final stage. Although power amplifiers vary in saturation output power by changing drain dc voltage, this dc-voltage change preserves the power added efficiency (PAE) for the various saturation, and PAE is P AE total = P out P in P DC = For P DC is the total power consumption of the DPA P out P in P DC1 + P DC2 + P DC3 (3) P DC = V DDC I DQC + V DDP I DQP (4) In Equation (4), V DDC and V DDP represent voltage supply for carrier and peak amplifiers, I DDC and I DDP represent current supply for carrier and peak amplifier respectively. The power amplifier is shown in Fig. 4 and the performance of the Doherty power amplifier not only considers the linearity, but also its efficiency. To satisfy these demands, we use Freescale MFR6S21050L. We also fabricated a conventional Doherty amplifier for comparison. Figure 4: The photograph of cascaded Doherty power amplifier. Figure 5 depicted the gain and the PAE of the proposed Doherty power amplifier and an ordinarily Doherty power amplifier with even drive. Its gain achieves 44 db and keeps a good flat performance than the conventional Doherty s. As uneven power drive (1 : 2.5), the carrier cell is compressed early and the peaking cell expanded early and the region is wider than the usual Doherty amplifier. Therefore, the amplifier with an uneven drive generates more linear power because the early gain expansion of the peaking cell compensates the gain compression of the carrier cell over the wide power range although the power gain of the uneven case keeps a better linearity
PIERS ONLINE, VOL. 4, NO. 2, 2008 155 compared to the even drive case. The PAE of the uneven drive achieves 33.1% at the output of 45 dbm which enhances 3.2% at the average output of 37 dbm with the inverted structure due to load impedance modulation optimum. Gain (db) Even Drive Uneven Driven Even Drive Uneven Driven PAE(%) IMD3 (dbc) and ACLR (dbc) IMD3 of Even Drive IMD3 of Uneven Drive ACLR of Even Drive ACLR of Uneven Drive Output Power (dbm) Output Power (dbm) Figure 5: Gain and power added efficiency (PAE) for two types of Doherty power amplifier. Figure 6: IMD3 and ACLR performances for twotone signal with 5 MHz tone-spacing. Figure 6 shows the measured IMD3 and ACLR of two types Doherty amplifier. In comparison with even case, the uneven case with inverted output structure delivers ACLR performance at 47 dbc at 45 dbm output with 5 db improvement for two-tone test at 5 MHz. IMD3 has 2.5 db improvements too. These results that represent the proposed bypassing and decoupling networks in output matching network provides better output with adjacent channel leakage performance. Output Back-off (db) Figure 7: PAE versus EVM with output back-off. Figure 7 shows that the power added efficiency of the cascaded Doherty power amplifier with different output back-off and error-vector-magnitudes (EVM). According to the specification of the IEEE 802.11a WLAN, which requires an Error Vector Magnitude (EVM) no greater than 25 db (i.e., less than or equal 5.6%) in order to meet consortium specifications. The efficiency of the inverted Doherty amplifier achieves 32.8% with 5.6% EVM. The PAE maintains 31.5% with 10 db output power back-off and 30% with 12 db back-off. The power amplifier performance evident demonstrates an excellent performance than a conventional Doherty power amplifier. 4. CONCLUSIONS In this paper, a high linearity and efficiency three stages cascaded Doherty power amplifier is proposed and fabricated with uneven power drive and inverted topology. Its PAE achieves 33.1%, which performs 3.2% better in the whole range than even drive case. With the inverted structure and the offset line in output matching network, it performs better in linearity and efficiency than even case. The ACLR presents 47 dbc at 45 dbm output power which has 5 db improvements
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