AUIRFR540Z AUIRFU540Z

AUTOMOTIVE GRADE AUIRFR540Z AUIRFU540Z Application Automatic Voltage Regulator (AVR) Solenoid Injection Body Control Low Power Automotive Applications V DSS HEXFET Power MOSFET 0V R DS(on) typ. 22.5m I D max. 28.5m 35A Description Specifically designed for Automotive applications, this HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175 C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. D G S D-Pak AUIRFR540Z D S D G I-Pak AUIRFU540Z G D S Gate Drain Source Standard Pack Base part number Package Type Orderable Part Number Form Quantity AUIRFU540Z I-Pak Tube 75 AUIRFU540Z Tube 75 AUIRFR540Z AUIRFR540Z D-Pak Tape and Reel Left 3000 AUIRFR540ZTRL Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25 C, unless Symbol Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V (Silicon Limited) 35 I D @ T C = 0 C Continuous Drain Current, V GS @ V (Silicon Limited) 25 A I DM Pulsed Drain Current 140 P D @T C = 25 C Maximum Power Dissipation 91 W Linear Derating Factor 0.61 W/ C V GS Gate-to-Source Voltage ± 20 V E AS Single Pulse Avalanche Energy (Thermally Limited) 39 E AS (Tested) Single Pulse Avalanche Energy Tested Value 75 mj I AR Avalanche Current A See Fig.15,16, 12a, 12b E AR Repetitive Avalanche Energy mj T J Operating Junction and -55 to + 175 T STG Storage Temperature Range C Soldering Temperature, for seconds (1.6mm from case) 300 Thermal Resistance Symbol Parameter Typ. Max. Units R JC Junction-to-Case 1.64 R JA Junction-to-Ambient ( PCB Mount) 50 C/W R JA Junction-to-Ambient 1 HEXFET is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 1 2017--03

Static @ T J = 25 C (unless otherwise specified) AUIRFR/U540Z Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 0 V V GS = 0V, I D = 250µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 0.092 V/ C Reference to 25 C, I D = 1mA R DS(on) Static Drain-to-Source On-Resistance 22.5 28.5 m V GS = V, I D = 21A V GS(th) Gate Threshold Voltage 2.0 4.0 V V DS = V GS, I D = 50µA gfs Forward Trans conductance 28 S V DS = 25V, I D = 21A I DSS Drain-to-Source Leakage Current 20 V µa DS = 0V, V GS = 0V 250 V DS = 0V,V GS = 0V,T J =125 C Gate-to-Source Forward Leakage 200 V I GSS na GS = 20V Gate-to-Source Reverse Leakage -200 V GS = -20V Dynamic Electrical Characteristics @ T J = 25 C (unless otherwise specified) Q g Total Gate Charge 39 59 I D = 21A Q gs Gate-to-Source Charge 11 nc V DS = 50V Q gd Gate-to-Drain Charge 12 V GS = V t d(on) Turn-On Delay Time 14 V DD = 50V t r Rise Time 42 I D = 21A ns t d(off) Turn-Off Delay Time 43 R G = 13 t f Fall Time 34 V GS = V Between lead, L D Internal Drain Inductance 4.5 6mm (0.25in.) nh from package L S Internal Source Inductance 7.5 and center of die contact C iss Input Capacitance 1690 V GS = 0V C oss Output Capacitance 180 V DS = 25V C rss Reverse Transfer Capacitance 0 ƒ = 1.0MHz pf C oss Output Capacitance 720 V GS = 0V, V DS = 1.0V ƒ = 1.0MHz C oss Output Capacitance 1 V GS = 0V, V DS = 80V ƒ = 1.0MHz C oss eff. Effective Output Capacitance 190 V GS = 0V, V DS = 0V to 80V Diode Characteristics Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol I S 35 (Body Diode) showing the A Pulsed Source Current integral reverse I SM 140 (Body Diode) p-n junction diode. V SD Diode Forward Voltage 1.3 V T J = 25 C,I S = 21A, V GS = 0V t rr Reverse Recovery Time 32 48 ns T J = 25 C,I F = 21A, V DD = 50V Q rr Reverse Recovery Charge 40 60 nc di/dt = 0A/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S +L D ) Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11) Limited by T Jmax, starting T J = 25 C, L = 0.17mH, R G = 25, I AS = 21A, V GS =V. Part not recommended for use above this value. Pulse width 1.0ms; duty cycle 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS Limited by T Jmax, see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population, 0% tested to this value in production. When mounted on 1" square PCB (FR-4 or G- Material). For recommended footprint and soldering techniques refer to application note #AN-994 R is measured at T J approximately 90 C. 2 2017--03

I D, Drain-to-Source Current ) G fs, Forward Transconductance (S) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) AUIRFR/U540Z 00 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 60µs PULSE WIDTH Tj = 25 C 00 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 4.5V 1 0.1 1 0 V DS, Drain-to-Source Voltage (V) 60µs PULSE WIDTH Tj = 175 C 1 0.1 1 0 V DS, Drain-to-Source Voltage (V) Fig. 1 Typical Output Characteristics Fig. 2 Typical Output Characteristics 00 70 60 T J = 25 C 0 50 T J = 175 C 40 30 T J = 175 C 1 0.1 T J = 25 C V DS = 25V 60µs PULSE WIDTH 2 3 4 5 6 7 8 V GS, Gate-to-Source Voltage (V) 20 0 V DS = V 380µs PULSE WIDTH 0 20 30 40 50 I D,Drain-to-Source Current (A) Fig. 3 Typical Transfer Characteristics Fig. 4 Typical Forward Trans conductance Vs. Drain Current 3 2017--03

I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) C, Capacitance(pF) V GS, Gate-to-Source Voltage (V) AUIRFR/U540Z 3000 2500 2000 V GS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd C iss 20 16 12 I D = 21A V DS = 80V VDS= 50V VDS= 20V 1500 00 8 500 C oss 4 0 C rss 1 0 0 0 20 30 40 50 60 V DS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 00.0 00 OPERATION IN THIS AREA LIMITED BY R DS (on) 0.0 T J = 175 C 0 0µsec 1msec.0 T J = 25 C 1.0 V GS = 0V 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 V SD, Source-to-Drain Voltage (V) 1 0.1 Tc = 25 C Tj = 175 C Single Pulse msec DC 0 1 0 00 V DS, Drain-toSource Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 2017--03

I D, Drain Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) AUIRFR/U540Z 40 2.5 I D = 21A V GS = V 30 2.0 20 1.5 1.0 0 25 50 75 0 125 150 175 T C, CaseTemperature ( C) 0.5-60 -40-20 0 20 40 60 80 0 120 140 160 180 T J, Junction Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig. Normalized On-Resistance Vs. Temperature Thermal Response ( Z thjc ) 1 0.1 0.01 0.001 D = 0.50 0.20 0. 0.05 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE ) R 1 R 1 R 2 R 2 R 3 R 3 J J 1 1 2 2 3 3 Ci= i Ri Ci= i Ri 1E-006 1E-005 0.0001 0.001 0.01 0.1 t 1, Rectangular Pulse Duration (sec) C C Ri ( C/W) i (sec) 2.626 0.000052 0.6611 0.001297 0.7154 0.01832 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 2017--03

V GS(th) Gate threshold Voltage (V) E AS, Single Pulse Avalanche Energy (mj) AUIRFR/U540Z 15V V DS R G 20V tp L D.U.T I AS 0.01 DRIVER + - V DD A 160 120 80 I D TOP 6.5A 9.4A BOTTOM 21A Fig 12a. Unclamped Inductive Test Circuit 40 V (BR)DSS tp 0 25 50 75 0 125 150 175 Starting T J, Junction Temperature ( C) I AS Fig 12c. Maximum Avalanche Energy vs. Drain Current Fig 12b. Unclamped Inductive Waveforms Vds Vgs Id 4.5 4.0 I D = 1.0mA ID = 250µA I D = 50µA 3.5 Vgs(th) 3.0 2.5 Qgs1 Qgs2 Qgd Qgodr 2.0 Fig 13a. Gate Charge Waveform 1.5 1.0-75 -50-25 0 25 50 75 0 125 150 175 T J, Temperature ( C ) Fig 14. Threshold Voltage Vs. Temperature Fig 13b. Gate Charge Test Circuit 6 2017--03

E AR, Avalanche Energy (mj) AUIRFR/U540Z 0 Avalanche Current (A) 1 Duty Cycle = Single Pulse 0.01 0.05 0. Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25 C due to avalanche losses 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current Vs. Pulse width Notes on Repetitive Avalanche Curves, Figures 15, 16: 40 30 20 TOP Single Pulse BOTTOM 1% Duty Cycle I D = 21A 0 25 50 75 0 125 150 175 Starting T J, Junction Temperature ( C) Fig 16. Maximum Avalanche Energy Vs. Temperature (For further info, see AN-05 at www.infineon.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25 C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) P D (ave) = 1/2 ( 1.3 BV I av ) = T/ Z thjc I av = 2 T/ [1.3 BV Z th ] E AS (AR) = P D (ave) t av 7 2017--03

AUIRFR/U540Z Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs Fig 18a. Switching Time Test Circuit Fig 18b. Switching Time Waveforms 8 2017--03

AUIRFR/U540Z D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches)) D-Pak (TO-252AA) Part Marking Information Part Number IR Logo AUIRFR540Z YWWA XX XX Date Code Y= Year WW= Work Week Lot Code 9 2017--03

AUIRFR/U540Z I-Pak (TO-251AA) Package Outline (Dimensions are shown in millimeters (inches) I-Pak (TO-251AA) Part Marking Information Part Number IR Logo AUIRFU540Z YWWA XX XX Date Code Y= Year WW= Work Week Lot Code 2017--03

AUIRFR/U540Z D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TR TRR TRL 16.3 (.641 ) 15.7 (.619 ) 16.3 (.641 ) 15.7 (.619 ) 12.1 (.476 ) 11.9 (.469 ) FEED DIRECTION 8.1 (.318 ) 7.9 (.312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH NOTES : 1. OUTLINE CONFORMS TO EIA-481. 16 mm 11 2017--03

AUIRFR/U540Z Qualification Information Qualification Level Moisture Sensitivity Level Machine Model ESD Human Body Model Charged Device Model RoHS Compliant Automotive (per AEC-Q1) Comments: This part number(s) passed Automotive qualification. Infineon s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. D-Pak MSL1 I-Pak Class M2 (+/-200V) AEC-Q1-002 Class H1B (+/-00V) AEC-Q1-001 Class C5 (+/-2000V) AEC-Q1-005 Yes Highest passing voltage. Revision History Date Comments 06/06/2014 Updated part number by the pictures of the parts to AU nomenclature on page 1. Updated datasheet with corporate template 12/02/2015 Corrected ordering table on page 1. Corrected typo RthJA (PCB Mount) from 40 C/W to 50 C/W on page 1 /03/2017 Corrected typo error on package outline and part marking on page 9 and. Published by Infineon Technologies AG 81726 München, Germany Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ( Beschaffenheitsgarantie ). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s products and any use of the product of Infineon Technologies in customer s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 12 2017--03