SN54AC04, SN74AC04 HEX INVERTERS

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SN54AC04, SN74AC04 HEX INVERTERS 2-V to 6-V V CC Operation Inputs Accept Voltages to 6 V Max t pd of 7 ns at 5 V SN54AC04...J OR W PACKAGE SN74AC04...D, DB, N, NS, OR PW PACKAGE (TOP VIEW) 1A 1Y 2A 2Y 3A 3Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 V CC 6A 6Y 5A 5Y 4A 4Y 2A NC 2Y NC 3A SCAS519E JULY 1995 REVISED OCTOBER 2003 SN54AC04...FK PACKAGE (TOP VIEW) 1Y 1A NC V CC 6A 3 4 2 1 20 19 18 5 6 7 17 16 15 8 14 9 10 11 12 13 6Y NC 5A NC 5Y 3Y GND NC 4Y 4A description/ordering information NC No internal connection The AC04 devices contain six independent inverters. The devices perform the Boolean function Y = A. ORDERING INFORMATION T A PACKAGE ORDERABLE TOP-SIDE PART NUMBER MARKING PDIP N Tube SN74AC04N SN74AC04N Tube SN74AC04D SOIC D Tape and reel SN74AC04DR AC04 40 C to 85 C SOP NS Tape and reel SN74AC04NSR AC04 SSOP DB Tape and reel SN74AC04DBR AC04 TSSOP PW Tube Tape and reel SN74AC04PW SN74AC04PWR AC04 CDIP J Tube SNJ54AC04J SNJ54AC04J 55 C to 125 C CFP W Tube SNJ54AC04W SNJ54AC04W LCCC FK Tube SNJ54AC04FK SNJ54AC04FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each inverter) INPUT OUTPUT A Y H L L H Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2003, Texas Instruments Incorporated On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 DALLAS, TEXAS 75265 1

SN54AC04, SN74AC04 HEX INVERTERS SCAS519E JULY 1995 REVISED OCTOBER 2003 logic diagram, each inverter (positive logic) A Y absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, V CC.......................................................... 0.5 V to 7 V Input voltage range, V I (see Note 1)........................................... 0.5 V to V CC + 0.5 V Output voltage range, V O (see Note 1)......................................... 0.5 V to V CC + 0.5 V Input clamp current, I IK (V I < 0 or V I > V CC )................................................. ±20 ma Output clamp current, I OK (V O < 0 or V O > V CC )............................................. ±20 ma Continuous output current, I O (V O = 0 to V CC )............................................... ±50 ma Continuous current through V CC or GND.................................................. ±200 ma Package thermal impedance, θ JA (see Note 2): D package................................... 86 C/W DB package................................. 96 C/W N package................................... 80 C/W NS package................................. 76 C/W PW package................................ 113 C/W Storage temperature range, T stg................................................... 65 C to 150 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) SN54AC04 SN74AC04 MIN MAX MIN MAX UNIT V CC Supply voltage 2 6 2 6 V V CC = 3 V 2.1 2.1 V IH High-level input voltage V CC = 4.5 V 3.15 3.15 V V CC = 5.5 V 3.85 3.85 V CC = 3 V 0.9 0.9 V IL Low-level input voltage V CC = 4.5 V 1.35 1.35 V V CC = 5.5 V 1.65 1.65 V I Input voltage 0 V CC 0 V CC V V O Output voltage 0 V CC 0 V CC V V CC = 3 V 12 12 I OH High-level output current V CC = 4.5 V 24 24 ma V CC = 5.5 V 24 24 V CC = 3 V 12 12 I OL Low-level output current V CC = 4.5 V 24 24 ma V CC = 5.5 V 24 24 Δt/Δv Input transition rise or fall rate 8 8 ns/ V T A Operating free-air temperature 55 125 40 85 C NOTE 3: All unused inputs of the device must be held at V CC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

SN54AC04, SN74AC04 HEX INVERTERS SCAS519E JULY 1995 REVISED OCTOBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) T A = 25 C SN54AC04 SN74AC04 PARAMETER TEST CONDITIONS V CC MIN TYP MAX MIN MAX MIN MAX UNIT 3 V 2.9 2.99 2.9 2.9 I OH = 50 μa 4.5 V 4.4 4.49 4.4 4.4 5.5 V 5.4 5.49 5.4 5.4 I OH = 12 ma 3 V 2.56 2.4 2.46 V OH 4.5 V 3.86 3.7 3.76 I OH = 24 ma 5.5 V 4.86 4.7 4.76 I OH = 50 ma 5.5 V 3.85 I OH = 75 ma 5.5 V 3.85 3 V 0.002 0.1 0.1 0.1 I OL = 50 μa 4.5 V 0.001 0.1 0.1 0.1 5.5 V 0.001 0.1 0.1 0.1 I OL =12 ma 3 V 0.36 0.5 0.44 V OL 4.5 V 0.36 0.5 0.44 I OL = 24 ma 5.5 V 0.36 0.5 0.44 I OL = 50 ma 5.5 V 1.65 I OL = 75 ma 5.5 V 1.65 I I V I = V CC or GND 5.5 V ±0.1 ±1 ±1 μa I CC V I = V CC or GND, I O = 0 5.5 V 2 40 20 μa C i V I = V CC or GND 2.8 pf Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms. switching characteristics over recommended operating free-air temperature range, V CC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) V V FROM TO T A = 25 C SN54AC04 SN74AC04 PARAMETER (INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX t PLH 1.5 4.5 9 1 11 1 10 A Y t PHL 1.5 4.5 8.5 1 10 1 9.5 UNIT ns switching characteristics over recommended operating free-air temperature range, V CC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) FROM TO T A = 25 C SN54AC04 SN74AC04 PARAMETER (INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX t PLH 1.5 4 7 1 8.5 1 7.5 A Y t PHL 1.5 3.5 6.5 1 7.5 1 7 UNIT ns operating characteristics, V CC = 5 V, T A = 25 C PARAMETER TEST CONDITIONS TYP UNIT C pd Power dissipation capacitance C L = 50 pf, f = 1 MHz 45 pf POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3

SN54AC04, SN74AC04 HEX INVERTERS SCAS519E JULY 1995 REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION TEST t PLH /t PHL S1 Open Input (see Note B) 50% V CC 50% V CC V CC 0 V t PLH t PHL From Output Under Test C L = 50 pf (see Note A) 2 V CC 500 Ω S1 Open 500 Ω In-Phase Output Out-of-Phase Output t PHL 50% V CC 50% V CC V OH 50% V CC V OL t PLH V OH 50% V CC V OL LOAD CIRCUIT VOLTAGE WAVEFORMS NOTES: A. C L includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z O = 50 Ω, t r 2.5 ns, t f 2.5 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) 5962-87609012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-87609012A SNJ54AC 04FK Device Marking 5962-8760901CA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8760901CA SNJ54AC04J 5962-8760901DA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8760901DA SNJ54AC04W SN74AC04D ACTIVE SOIC D 14 50 Green (RoHS SN74AC04DBR ACTIVE SSOP DB 14 2000 Green (RoHS SN74AC04DE4 ACTIVE SOIC D 14 50 Green (RoHS SN74AC04DR ACTIVE SOIC D 14 2500 Green (RoHS SN74AC04N ACTIVE PDIP N 14 25 Green (RoHS SN74AC04NE4 ACTIVE PDIP N 14 25 Green (RoHS SN74AC04NSR ACTIVE SO NS 14 2000 Green (RoHS SN74AC04PW ACTIVE TSSOP PW 14 90 Green (RoHS SN74AC04PWR ACTIVE TSSOP PW 14 2000 Green (RoHS SN74AC04PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS SN74AC04PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 AC04 CU NIPDAU Level-1-260C-UNLIM -40 to 85 AC04 CU NIPDAU Level-1-260C-UNLIM -40 to 85 AC04 CU NIPDAU Level-1-260C-UNLIM -40 to 85 AC04 CU NIPDAU N / A for Pkg Type -40 to 85 SN74AC04N CU NIPDAU N / A for Pkg Type -40 to 85 SN74AC04N CU NIPDAU Level-1-260C-UNLIM -40 to 85 AC04 CU NIPDAU Level-1-260C-UNLIM -40 to 85 AC04 CU NIPDAU Level-1-260C-UNLIM -40 to 85 AC04 CU NIPDAU Level-1-260C-UNLIM -40 to 85 AC04 CU NIPDAU Level-1-260C-UNLIM -40 to 85 AC04 SNJ54AC04FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-87609012A SNJ54AC 04FK (4/5) Samples Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) Device Marking SNJ54AC04J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8760901CA SNJ54AC04J SNJ54AC04W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8760901DA SNJ54AC04W (4/5) Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54AC04, SN74AC04 : Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 Catalog: SN74AC04 Automotive: SN74AC04-Q1, SN74AC04-Q1 Enhanced Product: SN74AC04-EP, SN74AC04-EP Military: SN54AC04 NOTE: Qualified Version Definitions: Catalog - TI's standard catalog product Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Enhanced Product - Supports Defense, Aerospace and Medical Applications Military - QML certified for Military and Defense Applications Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant SN74AC04DBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74AC04DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74AC04PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AC04DBR SSOP DB 14 2000 367.0 367.0 38.0 SN74AC04DR SOIC D 14 2500 367.0 367.0 38.0 SN74AC04PWR TSSOP PW 14 2000 367.0 367.0 35.0 Pack Materials-Page 2

SCALE 0.900 PACKAGE OUTLINE J0014A CDIP - 5.08 mm max height CERAMIC DUAL IN LINE PACKAGE PIN 1 ID (OPTIONAL) A 4X.005 MIN [0.13].015-.060 TYP [ 0.38-1.52] 12X.100 [2.54] 1 14 14X.045-.065 [ 1.15-1.65] 14X.014-.026 [ 0.36-0.66].010 [0.25] C A B.754-.785 [ 19.15-19.94] 7 8 B.245-.283 [ 6.22-7.19].308-.314 [ 7.83-7.97] AT GAGE PLANE.2 MAX TYP [5.08] C.13 MIN TYP [3.3] SEATING PLANE.015 GAGE PLANE [0.38] 0-15 TYP 14X.008-.014 [0.2-0.36] 4214771/A 05/2017 NOTES: 1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This package is hermitically sealed with a ceramic lid using glass frit. 4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only. 5. Falls within MIL-STD-1835 and GDIP1-T14. www.ti.com

J0014A EXAMPLE BOARD LAYOUT CDIP - 5.08 mm max height CERAMIC DUAL IN LINE PACKAGE SEE DETAIL A (.300 ) TYP [7.62] SEE DETAIL B 1 14 12X (.100 ) [2.54] SYMM 14X (.039) [1] 7 8 SYMM LAND PATTERN EXAMPLE NON-SOLDER MASK DEFINED SCALE: 5X.002 MAX [0.05] ALL AROUND (.063) [1.6] SOLDER MASK OPENING METAL (.063) [1.6] METAL (R.002 ) TYP [0.05] DETAIL A SCALE: 15X SOLDER MASK OPENING DETAIL B 13X, SCALE: 15X.002 MAX [0.05] ALL AROUND 4214771/A 05/2017 www.ti.com

MECHANICAL DATA MSSO002E JANUARY 1995 REVISED DECEMBER 2001 DB (R-PDSO-G**) 28 PINS SHOWN PLASTIC SMALL-OUTLINE 0,65 0,38 0,22 0,15 M 28 15 5,60 5,00 8,20 7,40 0,25 0,09 Gage Plane 1 14 0,25 A 0 8 0,95 0,55 2,00 MAX 0,05 MIN Seating Plane 0,10 DIM PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065 /E 12/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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