Internatonal Journal of Research n Engneerng and Scence (IJRES) ISSN (Onlne): 2320-9364, ISSN (Prnt): 2320-9356 Volume 5 Issue 7 ǁ July. 2017 ǁ PP. 01-05 Implementaton of Fan6982 Sngle Phase Apfc wth Analog Controller Huacheng Tao College Of Automotve EngneerngShangha Unversty Of Engneerng Scence,Shangha 201600,Chna ABSTRACT:Actve power factor orrecton technque can mprove the nput power factor and reduce the harmonc component of the nput current. In small power applcatons, the sngle-phase actve power factor correcton crcut of hgh frequency swtchng (APFC), reducton of the boost nductance decreases the boost nductor and flter capactor volume, reducng the net sde current rpple, mprove effcency. On the bass of descrbng the prncple of sngle-phase sngle-stage boost APFC double closed loop control, a new duty cycle compensaton method s proposed, whch s based on the FAN6982 smulaton and the sngle phase APFC of the rated output power 500W s acheved. The results show that the effect of current rpple rejecton s obvous, and the nput current s consstent wth the nput voltage phase. Keywords: Actve power factor correcton, Analog controller, Double-loop Control, FAN6982,Duty rato compensaton I. INTRODUCTION In sngle phase power grd,wth the rapd development of power electronc technology, more and more power electronc equpments are put nto the power grd,especally, the swtchng power supply and AC / DC frequency converson crcut usng rectfer brdge and electrolytc capactor as the front crcut are wdely used,serous harmonc polluton has been caused to the power grd,in order to mprove the nput power factor of the swtchng power supply and reduce the harmonc of the nput current, APFC technology s wdely used n varous electronc devces to meet the lmts of harmonc current n the IEC61000-3-2 D class standards [1].APFC power crcut adopts Boost converter, and the control strategy ncludes voltage and current double closed loop control, sngle cycle control, output voltage follow and so on.accordng to whether the nductor current s contnus, t s dvded nto nductor current contnus operaton mode (CCM) and nductor current dscontnus operaton mode (DCM) [2].A new zero crossng dstorton compensaton method s proposed n ths paper.the advantages of the sngle-phase actve power factor corrector are to reduce rpple current, reduce component loss n the power grd and mprove the effcency of equpment.at present, sngle-phase small power APFC analog control chp has many knds, such as L4981, FAN9672 and so on. Ths artcle uses Farchld's FAN6982 analog control chp, ts swtchng frequency s hgh, the crcut desgn s smple, the prce s relatvely cheap. Based on the descrpton of sngle stage Boost APFC prncple, usng Matlab/Smulnk smulaton, and proposes a new dstorton compensaton method, analyss and desgn of FAN6982 crcut realzaton of actve power factor correcton. 1. Sngle phase APFC crcut and prncple 1.1 power crcut The sngle-phase APFC power crcut s a step-up sngle-phase AC-DC crcut, and the system structure s shown n fgure 1.Fgure: S1 for IGBT; L1 for step-up nductance; Rs for shunt resstance; FRD1 for reverse fast recovery dode; power dode D1, D2, D3 and D4 consttute rectfer crcut. L1 FRD1 DCP D1 D3 ACL C1 R1 S1 E1 R2 ACN D2 D4 Rs Fgure 1 sngle phase APFC power crcut DCN 1 Page
Implementaton Of FAN6982 Sngle Phase APFC Wth Analog Controller 1.2 double closed loop control prncple FAN6982 control crcut adopts voltage outer loop, current nner loop and double closed loop control, and works n CCM mode.as shown n Fgure 2, the output DC voltage of the resstor dvder to the voltage error compensator after samplng, and the reference voltage multpled by the reference current as current loop, the same to the nput end of the reference current to the current error compensator. Another nput of the current loop s the actual nductance current waveform, whch s sent to the reverse nput of the current error compensator, and ts output s connected to the PWM comparator to form a trgger sgnal to control the PWM space. uac u o u n K 1 ( ) 2 uacg 1/ uacg Iref L 电流误差补偿器 PWM 发生器 电压误差补偿器 U ref u o Fgure 2 prncple of double closed loop control 1.3 duty cycle compensaton method There are many knds of compensaton methods for control crcut duty cycle, such as voltage external loop constant compensaton, or current loop constant compensaton.ths artcle s based on readng lterature [3] [4],a new compensaton method s desgned:voltage loop dynamc compensaton,the power nput voltage s u,output DC voltage s u 0,the voltage dynamc compensaton value s as follows: u K u n 1 ( ) (1) u K u 1 ( ) n (2) Type 1, type 2 can represent the dynamc compensaton value of voltage loop. In desgn, the K value s selected accordng to the requrement, and the K value s generally smaller.in desgn, the ndex n s n prncple desrable for postve numbers, such as 1, 1.2, 10, and so on, wth a general value of 1 or 2. The method of dynamc compensaton of voltage loop s analyzed. Take a power frequency cycle, the rato of the nput voltage to the output voltage s snusodal. Accordng to formula (1) and (2), the voltage dynamc compensaton value s an nverted sne. At zero pont, more compensaton, less compensaton at peak. The sgnal wave of PWM s shown n fgure 3. 1 y 0 0.01 t/ s 0.02 Fgure 3 zero crossng compensaton for PWM sgnal wave 2 Page
Implementaton Of FAN6982 Sngle Phase APFC Wth Analog Controller Fgure 4 shows a zero offset PWM sgnal wave II. SIMULATION ANALYSIS AND EXPERIMENTAL RESULTS 2.1smulaton Analyss Accordng to the nternal functonal dagram of the FAN6982, usng Matlab/Smulnk to desgn the smulaton crcut as shown n Fgure 4, the control crcut ncludes a current loop and an outer voltage loop, the basc prncple of double closed loop control s the nductor current to follow the rectfer voltage waveform, so as to acheve the objectve of power factor correcton.the current loop and voltage loop through a multpler assocated multpler nput has two parts: (1) a half sne wave sgnal gven AC sne wave voltage of the rectfer obtaned; (2) the DC bus voltage output samplng the output sgnal value wth a gven value by one order nertal loop by lmtng the festval [5].The output of the multpler s also a AC half sne wave sgnal, DC bus voltage regulaton of the ampltude, the multpler output current loop as the reference value, ts output voltage and nput current detecton by PI regulator s obtaned after the drve sgnal of the PWM and IGBT control power off. Fgure 5 smulaton crcut based on Smulnk The smulaton parameters are as follows: the sngle-phase AC nput voltage s 220V, the average output voltage s expected to be 385V, and the output power s 500W. 380μH boost nductor, swtch frequency 60kHz, K=0.0262, n=1. Fg. 6 s the nput voltage and current smulaton waveform, n whch the voltage waveform s 1/20 [6] of the actual voltage value, and the nput current waveform can be observed to track the voltage waveform better. Usng tools Powegu, FFT, Analyss analyss, the nput current harmonc dstorton THD=5.42%, can be PF=0.99. The smulaton results show that the power factor correcton s effectve and the rpple suppresson effect s obvous. u / V / A u Fgure 6 APFC nput voltage and nput current smulaton waveform 3 Page
Implementaton Of FAN6982 Sngle Phase APFC Wth Analog Controller 2.2expermental analyss The sngle-phase APFC s realzed based on FAN6982, and the crcut board s shown n fgure 8. Rated AC nput voltage 220V, nput voltage range 85~264V, power frequency 50Hz. No-load output voltage 388V, rated output power 500W.IGBT swtchng frequency 60kHz. [7] The boost nductor value of 100μH, flter capactor value s 680μF, IGBT type FCH041N60F, reverse fast recovery dode model FFP08H60S.Tested under rated load, the current effectve value s 2.31A, nput power p 508w, output power Po=489W, effcency η=96.25%, power factor PF=0.99, THD=10.74%, and the expermental waveform s shown n fgure 9. Fgure 7 sngle phase APFC crcut board based on FAN6982 / (3 A / 格 ) u / (5 V / 格 ) u t / (5 ms / 格 ) Fgure 8 expermental waveforms of nput voltage and nput current at rated power III. CONCLUSION In ths paper, a sngle-phase sngle-stage PFC devce based on FAN6982 s analyzed and mplemented. The prncple of voltage and current double closed loop control s adopted, and the method of detectng nductance current wth seres shunt resstance s adopted. The expermental results show that the sngle-phase sngle-stage APFC can meet the requrements of small power applcatons, and can obvously mprove the rpple of nput current, and the effcency can reach more than 96%. REFERENCE [1]. IEC1000-3-2: 2005, Electromagnetc compatblty Part3: lmts-set.2: lmts for harmonc current emsson (equpment nput current 16A per phase). [2]. Wang Han. Research and mplementaton of [D].hgh power sngle-phase dgtal APFC Shangha: Shangha Jao Tong Unversty, 2009. [3]. Mwa B A, Otten D M, Schlecht M F. Hgh effcency power factor correcton usng nterleavng technques[c]. Appled Power Electroncs Conference and Exposton, 1992.APEC'92. Conference 4 Page
Implementaton Of FAN6982 Sngle Phase APFC Wth Analog Controller Proceedngs 1992., Seventh Annual. IEEE, 1992: 557-568. [4]. O Loughln M. An nterleavng PFC pre-regulator for hgh-power converters [J]. Texas Instruments, 2006: 1-14. [5]. Balogh L, Redl R. Power-factor correcton wth nterleaved boost converters n Contnus-nductorcurrent mode[c]. Appled Power Electroncs Conference and Exposton, 1993.APEC'93.Conference Proceedngs 1993, Eghth Annual. IEEE, 1993: 168-174. [6]. Wang Zhaoan, Huang Jun. Power electroncs technology. Bejng. Chna Machne Press, 2000 [7]. Yang Xjun, Chen Hongpng, Ye Peng Sheng. Study on a unt power factor of sngle-phase AC/DC converter. The power electronc technology.in October 2004 thrty-eghth.volume ffth. 5 Page