NTKN Power MOSFET V, 8 ma, N Channel with ESD Protection, SOT 7 Features Enables High Density PCB Manufacturing % Smaller Footprint than SC 89 and 8% Thinner than SC 89 Low Voltage Drive Makes this Device Ideal for Portable Equipment Low Threshold Levels, V GS(TH) <. V Low Profile (<. mm) Allows It to Fit Easily into Extremely Thin Environments such as Portable Electronics Operated at Standard Logic Level Gate Drive, Facilitating Future Migration to Lower Levels Using the Same Basic Topology These are Pb Free and Halogen Free Devices Applications Interfacing, Switching High Speed Switching Cellular Phones, PDAs V (BR)DSS R DS(on) TYP I D Max V. @. V. @. V. @.8 V 8 ma 6.8 @.6 V Top View MAXIMUM RATINGS ( unless otherwise stated) Parameter Symbol Value Unit Drain to Source Voltage V DSS V Gate to Source Voltage V GS V Continuous Drain Current (Note ) Power Dissipation (Note ) Continuous Drain Current (Note ) Power Dissipation (Note ) T A = C T A = 8 C I D 8 t s T A = C 8 T A = C P D t s T A = C I D T A = 8 C T A = C P D Pulsed Drain Current t p = s I DM ma Operating Junction and Storage Temperature T J, T STG to Source Current (Body Diode) (Note ) I S 86 ma Lead Temperature for Soldering Purposes (/8 from case for seconds) ma mw ma mw C T L 6 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Surface mounted on FR board using in sq pad size (Cu area =.7 in sq [ oz] including traces). Surface mounted on FR board using the minimum recommended pad size. SOT 7 CASE 6AA STYLE KA M Gate Source Drain MARKING DIAGRAM KA ORDERING INFORMATION Device Package Shipping NTKNTG SOT 7* / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8/D. *These packages are inherently Pb Free. = Device Code = Date Code M NTKNTG SOT 7* 8 / Tape & Reel Semiconductor Components Industries, LLC, January, Rev. Publication Order Number: NTKN/D
NTKN THERMAL RESISTANCE RATINGS Parameter Symbol Max Unit Junction to Ambient (Note ) R JA 8 Junction to Ambient t = s (Note ) R JA 8 Junction to Ambient Minimum Pad (Note ) R JA. Surface mounted on FR board using in sq pad size (Cu area =.7 in sq [ oz] including traces). Surface mounted on FR board using the minimum recommended pad size. C/W ELECTRICAL CHARACTERISTICS ( unless otherwise specified) Parameter Test Condition Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain to Source Breakdown Voltage V GS = V, I D = A V (BR)DSS V Drain to Source Breakdown Voltage Temperature Coefficient I D = A, Reference to C V (BR)DSS /T J 7 mv/ C Zero Gate Voltage Drain Current V GS = V, I DSS V DS = 6 V T J = C A Gate to Source Leakage Current V DS = V, V GS = V I GSS A ON CHARACTERISTICS (Note ) Gate Threshold Voltage V GS(TH).. V Gate Threshold Temperature Coefficient V GS = V DS, I D = A V GS(TH) /T J. mv/ C Drain to Source On Resistance V GS =.V, I D = ma R DS(ON).. V GS =.V, I D = ma.6.8 V GS =. V, I D = ma.. V GS =.8 V, I D = ma. V GS =.6 V, I D = ma 6.8 Forward Transconductance V DS = V, I D = ma g FS.7 S CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance C ISS Output Capacitance V GS = V, f = MHz, V DS = V C OSS 8. Reverse Transfer Capacitance C RSS.7 SWITCHING CHARACTERISTICS, VGS=. V (Note ) Turn On Delay Time t d(on) Rise Time V GS =. V, V DD = V, I D = ma, t r Turn Off Delay Time R G = 6 t d(off) 9 Fall Time t f DRAIN SOURCE DIODE CHARACTERISTICS Forward Diode Voltage V GS = V, I S = 86 ma Reverse Recovery Time V SD.8. T J = C.69 t RR 9. Charge Time V GS = V, V DD = V, disd/dt = A/ s, t a 7. Discharge Time I S = 86 ma t b. Reverse Recovery Charge Q RR.7 nc. Pulse Test: pulse width s, duty cycle % 6. Switching characteristics are independent of operating junction temperatures pf ns V ns
NTKN TYPICAL PERFORMANCE CURVES... V GS = V to V.. V V DS V. V.. V. T J = C.8 V.6 V. V T J = C. V DS, DRAIN TO SOURCE VOLTAGE (VOLTS) V GS, GATE TO SOURCE VOLTAGE (VOLTS). Figure. On Region Characteristics Figure. Transfer Characteristics R DS(on), DRAIN TO SOURCE RESISTANCE ( ) I D =. A 6 7 8 9... V GS, GATE TO SOURCE VOLTAGE (VOLTS) Figure. On Resistance vs. Gate to Source Voltage R DS(on), DRAIN TO SOURCE RESISTANCE ( ) 6 V GS =. V V GS =. V Figure. On Resistance vs. Drain Current and Gate Voltage R DS(on), DRAIN TO SOURCE RESISTANCE 9. 8. 7. 6...... V GS =.8 V, I D = ma V GS =. V, I D = ma V GS =.6 V, I D = ma V GS =. V, I D = ma 7 T J, JUNCTION TEMPERATURE ( C) Figure. On Resistance Variation with Temperature I DSS, LEAKAGE (na) V GS = V T J = C T J = C V DS, DRAIN TO SOURCE VOLTAGE (VOLTS) Figure 6. Drain to Source Leakage Current vs. Voltage
NTKN TYPICAL PERFORMANCE CURVES C iss C, CAPACITANCE (pf) C rss C iss C oss V DS = V V GS = V C rss V GS V DS GATE TO SOURCE OR DRAIN TO SOURCE VOLTAGE (V) Figure 7. Capacitance Variation V DD = V I D = ma V GS =. V t, TIME (ns) t d(off) t f t r t d(on) R G, GATE RESISTANCE (OHMS) Figure 8. Resistive Switching Time Variation vs. Gate Resistance I S, SOURCE CURRENT (AMPS). V GS = V... T J = C T J = C T J = C...6.7.8.9. V SD, SOURCE TO DRAIN VOLTAGE (VOLTS) Figure 9. Diode Forward Voltage vs. Current
NTKN PACKAGE DIMENSIONS SOT 7 CASE 6AA ISSUE D b X e D TOP VIEW X X L BOTTOM VIEW E Y X b.8 X Y X L A H E C SIDE VIEW RECOMMENDED SOLDERING FOOTPRINT* X. NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y.M, 99.. CONTROLLING DIMENSION: MILLIMETERS.. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MILLIMETERS DIM MIN NOM MAX A... b...7 b...7 C.7..7 D... E.7.8.8 e. BSC H E... L.9 REF L... STYLE : PIN. GATE. SOURCE. DRAIN X.7 PACKAGE OUTLINE. X..6 DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 6, Denver, Colorado 87 USA Phone: 67 7 or 8 86 Toll Free USA/Canada Fax: 67 76 or 8 867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 8 8 98 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 79 9 Japan Customer Focus Center Phone: 8 87 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NTKN/D