1). An encapsulated component is known to consist of a resistor and a capacitor. It has two input terminals and two output terminals. A 5V, 1kHz square wave signal is connected to the input terminals and the output terminals are connected to an oscilloscope. The arrangement is shown below along with the oscilloscope trace. encapsulated components y scale is 1V/div input output timebase speed 200 s/div (a) Draw in the space below a possible arrangement for the resistor and capacitor. encapsulated components input output (b) Showing your working, estimate the time constant of the resistor and capacitor network. (4) (4) (8)
2). In an experiment to investigate the acceleration due to gravity a metal ball rolls along an inclined runway. At the top of the slope it makes a connection between two contacts just as it starts to roll which sets the bistable circuit. Two metres further along the runway it makes a second connection which resets the bistable. A diagram of the arrangement and the circuit is shown below. metal ball start runway stop +12V R Q bistable S Q reset + 560 k + 8.2 k 100 F 1 k ma 1mA 800 0V (a) (i) Draw the circuit diagram of a NAND gate bistable and label the SET and RESET inputs and the Q output. (ii) With reference to your diagram, explain how the NAND gate bistable functions. (4)
The timer is an analogue circuit. (b) Explain what is meant by analogue compared with digital. (c) When Q is at logic 1 its output voltage is +12V. (i) Assuming that the 100 F capacitor is completely discharged, calculate the initial current that passes into it. (b) (ii) Explain why the maximum voltage that the 100 F capacitor can charge to in this circuit is only approximately 1.4V. Explain what is meant by analogue compared with digital. (iii) Asuming that the value of the current calculated in (i) does not change significantly, estimate the time taken for the capacitor to charge up to 1.0V. (d) (4) The voltage across the capacitor is measured using the op-amp and meter circuit. (i) Explain why it is essential for the op-amp and meter circuit to have a very high input resistance. (ii) (1) Estimate the input resistance of the op-amp and meter circuit. (1)
(iii) Show that the voltage gain of the op-amp circuit is 10 (e) The system is reset and the ball allowed to roll down the slope. To calibrate the timer the time taken to roll the 2m down the runway was also measured with a stop watch as 3.6s. Calculate the reading on the meter. (25)
3). The system represented below is used for the remote measurement of temperature via an optical fibre. thermistor astable optical fibre receiver monostable ma (a) The characteristic for the thermistor is shown below. resistance / ohms 10 5 50k 10 4 3k 10 3 10 2 10 10 What is the resistance of the thermistor at: (i) 10 o C (ii) 40 o C? 0 10 20 30 40 temperature / o C (b) The thermistor is connected to a NAND gate astable as shown below. +12V X 2k Y 100nF R to optical fibre 0V
(i) Explain how a NAND gate astable operates. (ii) (4) If the frequency of the astable is given by the formula f 1, 2RC calculate the frequency of the astable when the thermistor is at a temperature of 40 o C. (c) (i) What is the function of the transistor? (ii) (1) When the output of the astable is at logic 1, the transistor is saturated at 0.2V. The LED has a maximum current of 50mA at a forward voltage of 1.8V. Calculate a suitable value for R. (d) The circuit diagram for the receiver is shown below. +12V 10k 10k 1M 100nF + output 10k 100 F + 0V
(i) Calculate the voltage gain of the op-amp circuit. (ii) Below is drawn the input waveform, point X. Draw the corresponding output waveform. +12V 6.1V 6.0V 5.9V 0 (e) The output from the receiver op-amp is connected to the monostable and meter circuit shown below. +12V (4) 100k 100nF from receiver X 100nF Y 10k Z 100 F + 11.1k ma 1mA 200 0V
(i) Show that the period of the monostable is approximately 1ms. (ii) What is the function of the NAND gate Z? (iii) (1) Explain how the meter is able to give a steady reading of the temperature. (iv) State, with a reason, the maximum temperature that can be indicated on the meter. 25
4). To enable three guitars to be played through the same amplifier the following circuit is used. The output voltage of a guitar is 200mV peak and has a resistance of 47k. The amplifier requires an input signal of 1V peak. 100nF 100nF 100nF 100k 100k 100k _ + R f V out 0V (a) What value of R f is needed to amplify each input by 5? (b) With the aid of a calculation justify the use of 100nF capacitors on each input. (5)
5). A capacitor is connected in series with an a.c. ammeter and a variable frequency alternating supply of amplitude 5V. The amplitude of the current is measured as the frequency of the alternating supply is changed. The measurements are shown in the table below. Frequency (Hz) current amplitude (ma) 50 0.74 100 1.48 200 3.00 400 5.91 600 8.86 800 11.81 1000 14.77 1200 17.72 (a) (b) Choose suitable scales and plot a graph of current against frequency. Determine the slope (gradient) of the graph.... (c)... Calculate the value of the capacitor....... (7)
6). A restricted range thermometer uses a thermistor with the characteristic shown below. resistance / ohms 10 5 10 4 10 3 10 2 10 0 10 20 30 40 50 temperature / o C The thermistor is incorporated into the circuit diagram shown below. +15V _ 200 k A 4.7k + V 0 V -15V (a) What is the voltage at point A? (b)... (1) What is the resistance of the thermistor at (i) 30 o C. (ii). 40 o C.
(c) Calculate the reading on the voltmeter at 30 o C..... (d) What will be the reading on the voltmeter at 40 o C?...... (1) (7)
7). In order to measure the velocity of sound in a laboratory a student devises the arrangement represented below in a block diagram form. The two microphones are placed 1m apart. A loud sound is made near to microphone 1 by striking together two hammers. timer set Q S S-R latch R reset amplifier 1 amplifier 2 BANG 1m microphone 1 microphone 2 The electrical signal from microphone 1 is amplified and used to SET the latch and start the timer. When the loud sound is received by microphone 2 it is also amplified and used to RESET the latch, so stopping the timer. The speed can then be calculated. a). The latch is made from two NAND gates. Draw the circuit diagram of a NAND gate latch and label the SET input and the Q output. b). Draw a truth table for a NAND gate latch.
c). The amplifier circuit originally designed by the student is shown below. +12V 1k 1M input 100nF 4.7M 5k 1k + output 0V (i) Calculate the voltage gain of the amplifier............. (ii) The microphone circuit requires an amplifier with a high input resistance. Explain why this circuit has a high input resistance and estimate its value............. (iii) What is the purpose of the 4.7M resistor?...... (1) (iv) What is the phase relationship between the input and output signals?...... (1)
d). The microphone and amplifier circuits are found to give unreliable results since they respond to ambient noise. The amplifier circuit was modified as shown below. +12V 1k 1M input 100nF 4.7M 5k 1k + 100nF output 0V Explain why this modification enables the circuit to respond better to short duration sounds....... e).... The timer used was an oscilloscope that could store the trace. The Q output of the latch was connected to the Y input and the oscilloscope was adjusted so that it triggered on a positive going input signal. (i) Explain what is meant by triggered on a positive going input signal....... (ii) The trace obtained is shown below.
If the vertical sensitivity is set to 5V/div and the timebase to 0.5ms/div, what is the amplitude of the output from the latch and the time taken for the sound to travel 1m?............ 24
8). Bats emit sounds in the range 20 khz to 100 khz which they use as a radar system to help navigate. A system to detect these sounds made by the bats is shown in block form. Pre-amplifier Frequency divider Power amplifier (a) The microphone used is particularly sensitive to sounds at a frequency of 40 khz and gives a typical output voltage of 4 mv peak to peak. The frequency divider needs an input of 4 V peak to peak to operate successfully. (i) Determine the voltage gain needed from the pre-amplifier....... (ii) Explain why this voltage gain cannot be obtained from a single frequency compensated op-amp with a gain-bandwidth product of 1 MHz. (1)......... (iii) Draw a circuit diagram of a pre-amplifier, using three frequency compensated op-amps, which would provide the necessary voltage gain.
(b) The frequency divider in the block diagram consists of eight D-type flip-flops each connected as a divide by two counter and connected in series. (i) Draw a circuit diagram to show how a D-type flip-flop can be connected to divide by two. ii). Calculate the frequency of the sound heard from the speaker when there is an input frequency of 40 khz......... (7)
9). A hot wire anemometer is an instrument used to measure wind speed. It consists of a small piece of wire heated to a temperature of approximately 300 o C, in still air, by passing an electric current through it. As the wind blows air past it the hot wire is cooled and the resistance of the wire changes. Figure 1 shows how the resistance of the hot wire changes with wind speed. resistance / 200 190 180 170 160 150 140 130 0 10 20 30 40 50 air speed / m s -1 Figure 1 The hot wire is connected to the circuit shown in figure 2. +12V 5 k hot wire 100 k 20 k _ + 1 k 20 12 V V out Figure 2 0V (a) (i) Calculate the power dissipated in the hot wire when it is in still air.......... (ii) What would be a suitable power rating for the 20 resistor?...... (1)
(b) (i) Determine the value of the variable resistor so that V out is zero when the air speed is zero....... (ii) What will be the resistance of the hot wire when the wind speed is 50m/s. (1)...... (iii) Calculate V out when the wind speed is 50m/s. (1)............ (5) (11)
10). The circuit shows a regulator for a 5 V power supply unit. +10V to +15V 470 V in 5 V P Q + _ 1k V out 0 V 0 V The operational amplifier has a low frequency open loop voltage gain of 10 5. (a) Explain how the regulator produces the stabilised output voltage, V out.......... (b) The supply voltage changes from +10 V to +15 V. Estimate the likely change in V out.......... (c) In normal operation, the regulator is to supply a current of 1A. If the maximum air temperature is 30 o C and the maximum temperature of the series MOSFET is 70 o C, calculate the maximum thermal resistance of the heat sink for the series MOSFET............. (9)
11). A public address system mixer, shown below, combines the outputs from a microphone, a cassette tape deck and a CD player. The microphone has an output of 50mV, the cassette tape deck 200mV and the CD player 500mV. R 1 1 M Microphone R 2 +12 V Cassette CD 500 k _ + -12 V V out 0 V 0 V (a) What will be the value of V out when only the CD player is working?...... (1) (b) What value of R 2 is needed for the cassette tape player to give the same output from the mixer as the CD player?...... (c) If the microphone is also to be able to give the same output from the mixer, what will be the input resistance of the microphone circuit?......... (5)
12). Monostables with a long time period tend to be unreliable and inaccurate. A better method of achieving long time periods is to use the circuit shown below. +V s 1 2 0.5 F 1 M astable latch 3 Start 0V 4 6 5 gate counter using D-type flip-flops 7 8 9 10 Q Q Q Q CK D Q _ CK D Q _ CK D Q _ CK D Q _ R R R R output (a) (i) Calculate the period of the astable....... (ii) How long after pressing the start switch will the output become logic 1?......... (iii) If 10 D-type falling edge triggered flip-flops had been used instead of 4, how long would the time delay have been?...... (1)
(b) Explain how the delay circuit works. (The logic gates have been numbered to help you refer to them in your explanation.)..................... (4) (9)
13). A logic probe has the circuit diagram shown below. 10 k red +V s 1 k input probe 1 k 10 k green 0 V (a) State, giving a reason, the state of the LED(s) when:- (i) the input of the probe is connected to logic 0, (ii) the input is unconnected, (ii) (1) the input is connected to a square wave of frequency 2kHz. (b) (1) Such a logic probe will not register very short duration pulses. To overcome this problem a monostable is added to the probe. The circuit of the monostable is shown below. from input probe 1nF 1M 100 nf A B C +V s 10 k 0 V
(i) Calculate the period of the monostable. (ii) Describe what happens to the monostable circuit when there is a positive going pulse at the input. (9)
14). The diagram shows part of the block diagram of an environmental monitoring system. input amplifier Analogue to Digital converter start / stop data 32 Kbytes memory R/W sample rate generator address memory address counter (a) The input amplifier circuit, shown below, has three input ranges with the most sensitive, position A, being 0-250mV. The output of the amplifier is 0-1V and is connected to the Analogue to Digital Converter. +5 V A + B 900 k C V in 5V 90 k R 1 k to A/D converter 10 k 100 k 0 V 0 V (i) What is the function of the two diodes? (1) (ii) Calculate the value of R.
(iii) What is the input range when the switch is set to B and C respectively? (b) The diagram below shows the sample rate generator which allows the unit to be set to make samples every 1 s, 10 s, or 100 s. crystal oscillator 32768 Hz frequency divider 10 10 1 s 10 s 100 s output (i) How many flip-flops are needed in the frequency divider to give an output of 1 Hz from the 32768 Hz crystal oscillator? (iii) Draw a diagram to show how four rising-edge triggered D-type flip-flops can be connected so as to divide the input frequency by 10 and provide a mark to space ratio of 1:1. (5) (14)
15). The circuit diagram for a guitar amplifier is shown below. A guitar can produce a peak input signal of 100mV. +12V R +12V input 47 k +12V + + 12V 1M 12V 10 k 100 k 8 0 V 0 V 12V (a) Mark onto the diagram a virtual earth point using an X. (b) Calculate a value for R so that the pre-amp has a voltage gain of 6. (1)... (c)... Show that the voltage gain of the power amplifier is 11, stating an assumption made.... (d)... By considering the power delivered to the loudspeaker and the power delivered at the input, estimate the overall power gain of the system............. (4) (9)
16). The circuit diagram below is for a control unit for an electric motor. +15 V S1a V 1 k D to electric motor 0 V S1b (a) What is the function of: (i) switch, S1 (ii) diode, D (b) The characteristic curve of the MOSFET is shown below. I (A) D 6 5 4 3 2 1 1 2 3 VGS (V) (i) Show that the mutual transconductance (g) of the MOSFET is 2 siemens.
(ii) Show that the power dissipated by the MOSFET is approximately 4.7W when the voltage supplied to the electric motor is 6.5V at a current of 0.553A. (c) The MOSFET is mounted on a heatsink with a thermal resistance of 6.5 o C/W. Calculate the temperature rise of the MOSFET when it is dissipating 4.7W.... (d)... (1) Explain why MOSFETs do not suffer from thermal runaway. (9)
17). (a) In the space below draw a circuit diagram for a 4-bit serial in, parallel out shift register using rising-edge-triggered D-type flip-flops. (b) Describe one practical application of such a shift register. (4)............ (6)
18). A metronome is required to produce audible clicks ranging from 20 to 240 per minute. A 555 timer IC is used for this purpose, as shown below. R +12 V VR RESET +V s DISCHARGE 555 OUTPUT 15 k THRESHOLD TRIGGER GND CONTROL 10 F + 10 nf 0 V (a) Show that the time for which the output is low is approximately 0.1s.... (b)... (1) Calculate a suitable value for R if the maximum speed is 240 beats per minute, i.e. 4 beats per second.......... (c)... Calculate a suitable maximum value for VR if the slowest speed is 20 beats per minute, i.e. 1 beat every 3 seconds................ (7)
19). The diagram below shows part of the timing circuit for a serial interface for a computer. astable oscillator 1.8432MHz divide by 6 counter (a) Apart from changing component values, state two physical changes that will alter the frequency of a free running astable.......... (b)... The output from the counter is to be at one-sixth of the frequency of the astable, with a mark to space ratio of 1:1. Complete the circuit diagram below to show how the rising edge triggered D-type flip-flops would be connected. Clearly label the output. Add any other logic gates that you require. D Q D Q D Q >CK R Q >CK R Q >CK R Q (6) (8)
20). An audio power amplifier is being tested using the arrangement shown below. top trace of oscilloscope signal generator amplifier bottom trace of oscilloscope 8 load 0 V With an input signal of amplitude 0.5V at 1kHz, the input and output traces from the oscilloscope are shown below. The Y sensitivity is the same for both traces. (a) (i) The output waveform is distorted. Explain how the distortion arises and how it may be eliminated. Detailed circuit diagrams are not required................
(a) (ii) Calculate the voltage gain of the amplifier.... (b)... (5) The previous distortion is corrected and the input signal is increased to an amplitude of 1.0V. The new input and output traces are shown below. What is the cause of the distortion now visible on the output waveform?... (c)... Estimate the maximum undistorted rms output power from the amplifier. Both traces have the same sensitivity and the load resistor remains at 8............. (10)
21). The circuit diagram below is for a 4-bit parallel in, serial out shift register using rising-edgetriggered D-type flip-flops. load D 0 D 1 D 2 D 3 to 0V PRESET PRESET PRESET PRESET D Q D Q D Q D > CK CLEAR _ Q > CK CLEAR _ Q > CK CLEAR _ Q > CK CLEAR Q _ Q clock in (a) (i) Label the which terminal from which the serial output obtained? (ii) How would you ensure that the shift register was set to 0 before loading in the parallel data?... (iii) Explain how you would load parallel data into the shift register... (b)... (4) The number represented by C 16 (=1100 2 ) is loaded into the shift register. Add to the diagram below the serial data output as four clock pulses are applied. clock input time serial output time (6)
22). The circuit diagram below represents an astable which can be controlled by a signal connected to the control input. +V s 4K7 1 F control input V out 0V (a) Why is 1 F likely to be the largest value of capacitor usable in this circuit?... (b)... Calculate the approximate frequency of the astable when it is oscillating.... (c)... When the control input is at logic 0 the astable stops oscillating, and restarts when it returns to logic 1. The control input has been at logic 0 for several minutes and is then set to logic 1. Draw a graph, on the axes below, to show the first three pulses produced by the astable. output +V s 0V control input set to logic 1 time (7)
23). (a) A transistor is dissipating 15W and is in good thermal contact with a heat sink rated at 2.5W / o C. What is meant by:- (i) good thermal contact,...... (ii) 2.5W / o C... (b)... If the air temperature around the transistor is 28 o C, what is the steady operating temperature of the transistor.......... (7)
24). (a) State a use for a shift register. (b)... (1) The diagram below shows a shift register made from four rising-edge-triggered D-type flip-flops. Q A Q B Q C Q D data in D Q D Q D Q D Q > CK Q _ > CK Q _ > CK Q _ > CK Q _ CLEAR CLEAR CLEAR CLEAR Logic 0 clock in At time t = 0 all of the outputs of the flip-flops are set to 0 and the input is as shown in the timing diagram below. Complete the timing diagram to show the subsequent states of Q A, Q B, Q C and Q D. CLOCK DATA IN Q A Q B Q C Q D (6) (7)
25). (a) Draw a circuit diagram of a n-channel MOSFET source follower. (b) State approximate values for the following properties of a MOSFET source follower:- (i). Input resistance... (ii) Voltage gain... (iii) Current gain... (iv) Power gain... (4) (7)
26). State and explain three design features of a heat sink that ensure efficient dissipation of heat. (a)............ (b)............ (c)............ (4) (7)