Experiment 8 Dides Purpse: The bjective f this experiment is t becme familiar with the prperties and uses f dides. We will first cnsider the i-v characteristic curve f a standard dide that we can use in the classrm. We will als see hw the dide can wrk as a rectifier, which is an essential part f mst DC surces that are driven by AC vltages. A serius prblem with simple rectifiers is that the DC vltage they prduce is dependent n the lad. A cmmn way t make the rectifier less sensitive t the lad is t add sme regulatin. This we can d by utilizing the avalanching effect that ccurs if we reverse vltage the dide t much. We will als see what kind f vltage limitatin can be achieved with a frward biased dide. Such limitatin f vltages is usually applied t prtect circuit cmpnents. Backgrund: Befre ding this experiment, students shuld be able t Analyze simple circuits cnsisting f cmbinatins f resistrs, inductrs, capacitrs and p-amps. Measure resistance using a Multimeter and capacitance using a cmmercial impedance bridge. D a transient (time dependent) simulatin f circuits using Capture/PSpice D a DC sweep simulatin f circuits using Capture/PSpice. Build simple circuits cnsisting f cmbinatins f resistrs, inductrs, capacitrs, and p-amps n prtbards and measure input and utput vltages vs. time. Review the backgrund fr the previus experiments. Learning Outcmes: Students will be able t Generate I-V curves fr resistrs and dides, bth experimentally and with PSpice simulatin Make differential vltage measurements using Analg Discvery and WaveFrms. Generate theretical dide I-V curves using Matlab and plt them alng with experimental dide data. Characterize the peratin f dide rectifiers (half-wave and full-wave) and limiters bth experimentally and using PSpice simulatin. Build basic LED and phtdide/phttransistr circuits, mdulate the light frm the LED and detect it with a phtdide/phttransistr, displaying bth the input and utput signals n a scpe. Characterize the peratin f a Zener dide bth experimentally and using PSpice simulatin. Equipment Required: Analg Discvery (with Wavefrms Sftware) Oscillscpe (Analg Discvery) Functin Generatr (Analg Discvery) Prtbard Resistrs, Capacitrs, Dides, Zener Dides OrCAD Capture and PSpice Helpful links fr this experiment can be fund n the links page fr this curse: http://hibp.ecse.rpi.edu/~cnnr/educatin/eilinks.html#exp8 Pre-Lab Required Reading: Befre beginning the lab, at least ne team member must read ver and be generally acquainted with this dcument and the ther required reading materials listed under Experiment 8n the EILinks page. Hand-Drawn Circuit Diagrams: Befre beginning the lab, hand-drawn circuit diagrams must be prepared fr all circuits either t be analyzed using PSpice r physically built and characterized using yur Analg Discvery bard. K.A. Cnnr, P. Schch, H. Hameed - 1 -
Part A The I-V Characteristic Curve Backgrund Dides: An ideal dide is a device that allws current t flw in nly ne directin. The symbl f a dide, shwn in Figure A-1, lks like an arrw that pints in the directin f current flw. The current flws thrugh the dide frm the ande t the cathde. The cathde is marked n a real dide by a band. ANODE D1 DIODE CATHODE Figure A-1. A small psitive vltage is required t turn a dide n. This vltage is used up turning the device n s the vltages at the tw ends f the dide will differ. The vltage required t turn n a dide is typically arund.6 -.8V fr a standard silicn dide. I-V characteristic curve: In rder t understand hw a dide functins, it is useful t lk at a plt f the vltage acrss the dide vs. the current thrugh the dide. We call this type f curve and i-v characteristic curve. If we were t create an i-v curve f a resistr, where the current is directly prprtinal t the vltage (V=IR), we wuld see a straight line with a cnstant slpe r R -1. When we plt the characteristic curve f an ideal dide (that switches n when the vltage acrss it ges abve zer), we see zer current when v D is negative and infinite current as sn as v D tries t g psitive. This is shwn in Figure A-2. Nte that, when and ideal dide turns n, it is a shrt circuit and, therefre, the vltage acrss the ideal dide when it is n is always zer. Figure A-2. I-V curve f a dide: Figure A-3 shws typical characteristics f a real dide. Ideally, a dide is a device that allws current t flw in ne directin nly. In practice, dides allw large amunts f frward current t flw when the psitive vltage acrss them reaches a small threshld. They als have a small saturatin current and a breakdwn regin in which a large amunt f current will flw in the ppsite directin when a large negative vltage is applied. In small signal dides, the frward current will typically be up t a few tens f ma at a frward vltage f abut 1V. The reverse-breakdwn vltage might be abut 1V, and the saturatin current I s may be f the rder f 1nA. Pwer dides may allw frward currents up t many amps at frward vltage drps f.6 t 1.5V r s, depending n the type f dide. The reverse-breakdwn vltage f pwer dides may range frm as lw as 5V up t 1V r even much mre. K.A. Cnnr, P. Schch, H. Hameed - 2 -
Figure A-3. The dide equatin: The equatin belw gives a reasnably gd representatin f the i-v characteristics f a dide. i D v D I nvt S e 1 I s is the saturatin current usually measured in micramps, r nanamps. V T is the Thermal Vltage [K in yur bk] where V T = kt/q =.259V at 3K and n is a smewhat arbitrary parameter which depends n cnstructin and usually lies between 1 and 2. Nte that this equatin characterizes the basic features f the dide i-v curve, but leaves ut sme details like reverse breakdwn, junctin capacitance, etc. Experiment I-V Characteristic Curve f a Resistr Nw we will plt the vltage acrss a resistr vs. the current thrugh the resistr. The resistr f interest is labeled Ra2 in the figure belw. PSpice allws yu t plt currents, but Analg Discvery des nt. S we will add a 1kΩ current sensing resistr, Ra1. The current thrugh Ra1 is equal t the vltage acrss Ra1/1. Analg Discvery can be used t measure the vltage acrss the current sensing resistr. Wire the circuit shwn in Figure A-4 in PSpice. Ra1 1k Va 5V Ra2 1hms Figure A-4. Run a simulatin and create the i-v characteristic curve Set up a DC sweep frm -6 t +6V in increments f.1v. (When yu set up the DC sweep analysis, be sure that yu name yur surce. It is Va in this diagram but it maybe V1 in yur schematic.) Yu d nt need t add any prbes. Run the simulatin. K.A. Cnnr, P. Schch, H. Hameed - 3 -
Select Add Trace t plt the current thrugh resistr Ra2, I(Ra2). Recall that yu must chse this current frm the list yu see when yu use Trace and then Add Trace... Change the x-axis f yur plt as fllws: In the Plt menu Select Axis Settings. Then click n the X Axis tab. Click n the Axis Variable buttn at the bttm. Enter V(Ra2:1)-V(Ra2:2) as the new X Axis Variable. This sets yur x-axis t the vltage acrss the resistr Ra2. If the plt has a negative slpe, change the X Axis Variable t be V(Ra2:2)-V(Ra2:1). The resistr is just munted with nde 1 dwn. The plt prduced will shw the i-v characteristic curve fr resistr R1a2. Yur PROBE plt shuld lk smething like Figure A-5: 1mA Plt f i vs. v fr Ra2 A -1mA -6mV -4mV -2mV V 2mV 4mV 6mV I(Ra2) V(Ra2:1)- V(Ra2:2) Figure A-5. Nw add a trace t the PROBE, (V(Ra1:1)-V(Ra1:2))/1 Yu shuld nte that the new trace falls n tp f the ld trace. The vltage acrss Ra1 can be used t determine the current thrugh Ra1. The current thrugh Ra1 equals the current thugh Ra2. Just t make things visible, duble click n (V(Ra1:1)-V(Ra1:2))/1 and edit the trace t be: (V(Ra1:1)-V(Ra1:2))/1-.1. Ra1 can be used as a current sensing resistr. The Analg Discvery can t measure current but it can measure the vltage acrss the resistr Ra1 and use that value t determine the current. Even thugh PSpice can measure current, we will use a current sensing resistr. I-V Characteristic Curve f a Dide Nw we will plt the current thrugh a dide vs. the vltage acrss the dide. Mdify yur PSpice schematic by replacing Ra2 with D1, a D1N4148 dide, as shwn in Figure A-6. Yu will find this dide in the parts list. It is in the EVAL library. In this diagram, Ra1 has been replaced with R1. This was dne just fr cnvenience. R1 5V V2 1k D1 D1N4148 Figure A-6. Run a simulatin and create the i-v characteristic curve. Rerun the DC sweep simulatin, again frm -6 t +6V. Select Add Trace t plt the current thrugh the resistr, (V(R1:1)-V(R1:2))/1. K.A. Cnnr, P. Schch, H. Hameed - 4 -
Change the x-axis f yur plt as fllws (the same as with the resistr): Select Axis Settings under the Plt menu. Then click n the X Axis tab. Click n the Axis Variable buttn at the bttm. Enter V(D1:1)-V(D1:2) as the new X Axis Variable. This sets yur x-axis t the vltage acrss the dide. The plt prduced will shw the i-v characteristic curve fr dide D1. It shuld lk like the i-v curve fr a real dide. If it lks upside dwn r backwards, change the sign f ne r bth f the parameters. Mark yur plt Expand the part f the plt with interesting results. Click n the Plt menu. Click n Axis Settings. Click n X Axis tab. Chse Data Range as User Defined. Set the range t interesting values, such as V t 1V. Click n Y Axis tab. Chse Data Range as User Defined. Set the range t interesting values, such as t 5mV. Nte that by using R1 as a current sensr, the plt reads as mv but yu knw it represents ma. Using the cursrs, mark at least 5 pints ff f this plt. Yu will be using these 5 pints in Excel t help yu plt the characteristic curve f the dide. Chse pints that accurately represent the features f yur curve. Cpy yur plt and include it in yur reprt. I-V Curve f a Real Dide In this part, we will build the simple dide circuit n yur prtbard and use Analg Discvery t take a data sample frm the circuit itself. Then, yu can use Excel r MATLAB t generate the i-v curve f the dide using the data frm the dide itself. Wire the circuit shwn in Figure A-7 n yur prtbard. The utput f the Analg Discvery functin generatrs is limited t ±5V, which is nt quite enugh t identify the features f all f the dides we will be using yu will cnnect ne end f the dide t the V- pwer supply This allw an effective DC shift f the signal frm the Wavefrm Generatr 1. Nte: This is the nly circuit yu will build withut an explicit grund cnnectin. There certainly is a grund but it is internal t the Analg Discvery. Wav egen 1 2+ R1 1k 2-1+ V- pwer D1 D1N4148 1- R1 is current sensing resistr D1 is dide t be measured Figure A-7. Dides lk like very small resistrs with nly ne stripe. The stripe crrespnds t the straight line f the dide symbl at the cathde. The D1N4148 dide shuld have a 48 written n it. When yu wire the circuit, make sure yur dide is placed s that the cathde faces tward grund as shwn in the figure abve. Use 2+ and 2- t sense the current. Use 1+ and 1- t sense the vltage. Bth are differential measurements, neither side f R1 r D1 is cnnected t grund. K.A. Cnnr, P. Schch, H. Hameed - 5 -
Figure A-8. Analg Discvery. Set Functin Generatr 1(W1) t a 1kHz, triangle wave, 5V amplitude, (1Vp-p). Enable the pwer supplies. Fr Analg Discvery 2, set V- supply t -4V. Yu dn t have a vltage set ptin if yu are using the Analg Discvery. Observe the dide vltage n channel 1 f the Oscillscpe, (1+, 1-). Observe the dide current n channel 2 f the Oscillscpe, (2+, 2-). Remember that channel 2 is the current with a scale factr f 1mA/V because R2=1kΩ.. Set the scillscpe up t display a cuple f cycles f the signal, fr example set the time base t 25us/div. Save the data t a file nce yu have a clean plt n the screen. Yu will use the data with MATLAB later. Wavefrms is able t plt ne trace vs. anther trace, much as yu did with PSpice fr the resistr characteristics. In the Oscillscpe, with the traces shwn that were saved in the lines abve: View > Add XY A new plt shuld appear. Yu might need t change which channel is X: and which is Y: Save this plt and include it in yur reprt. Mark r hand write n the reprt that the vertical scale is a measure f the current, I=VR1/R1=VR1/1. The scale is the current in ma. Belw yu will plt the same data in MATLAB and cmpare the results t the dide equatin. Nte: if the dide current isn t clse t zer when the dide vltage is zer, yu need t calibrate yur Analg Discvery. K.A. Cnnr, P. Schch, H. Hameed - 6 -
MATLAB plts: Start MATLAB and Imprt the data file. The Imprt Data cmmand is fund under the File menu. Yu shuld see a windw that lks smething like this, with three clumns shwing fr time and the tw vltages. Figure A-9. In MATLAB, plt the dide current vs. the dide vltage. Yu nly want t display the useful data, s fr example there isn t a need t plt negative vltages because the current is zer. The m-file belw shws hw yu might d this. This is a guide. % LED r Other Dide I-V Plts fr Data Taken with the Analg Discvery % K. A. Cnnr, 4 April 214 % Imprt Data Frm Spreadsheet % Click n Imprt Data frm the File Menu in Matlab % Select the CSV File Yu Stred in the Directry Where This Prgram is % Lcated. Once yu have imprted the file, type 'whs' t see what the % default name is fr the array with the data in it. It might be 'data' and % it might be 'untitled.' % Identify the Time Data time=untitled(:,1);% The first clumn is the time vectr % Vltage Data v_dide=untitled(:,2);% The vltage acrss the dide % Current Data i_dide=untitled(:,3)/1; % The current is measured by finding the vltage acrss a 1 Ohm Resistr. % If a different resistr is used, this expressin must be changed. % There may be sme instrumental ffsets in the measurements. If they are % large enugh t cause prblems, they can be remved. Usually, this step % is nt necessary, s the expressins belw have been cmmented ut. K.A. Cnnr, P. Schch, H. Hameed - 7 -
% Eliminate current ffset; % i_dide=i_dide+8.3333e-4; % Eliminate vltage ffset % v_dide=v_dide-.55; % Plt the results plt(v_dide,i_dide,'.'); hld n; grid; % axis([-2 4-1e-3 21e-3]); % The axes can be adjusted t prduce a better plt. % Ideal Dide Equatin is=.8e-14;n=2; vd=[:.1:5]; id=is.*(exp(vd./(n.*.259))-1.); plt(vd,id,'linewidth',3,'clr','r'); axis([ 5.1]);% Fr mst dides, psitive vltages are all that we % need t plt. Hwever, yu may want t extend the range t negative % vltages in sme cases. Add a plt f the dide current equatin t the figure. (This is dne in the bttm part f the m-file.) Start with n=2, guess a value fr I s, plug in several values fr v D, and plt the pints. Use 25.9mV fr V T. Vary the value f I s until yu get a reasnable fit. The figure belw is the result f the MATLAB example n the utput frm the cde n the previus page. Yu shuld be able t get a better fit. Cnsider using the grid cmmand in MATLAB. If time permits, vary the value f n als. Fr real dides, n is in the range f 1 t 2. 6 x 1-3 5 4 3 2 1.1.2.3.4.5.6.7.8 Figure A-1. Dide current vs. dide vltage. Thin lines are plts f experimental data, thick lines are tw attempts t fit the dide equatin. One curve is fr n = 2 & Is = 1-1, the ther curve is fr n = 2 & Is = 1-9 A. Include a cpy f this plt in yur write-up. List the final n and Is. Summary K.A. Cnnr, P. Schch, H. Hameed - 8 -
A dide is a device that allws current t flw in nly ne directin. An ideal dide lks like a shrt when the current is flwing and an pen circuit when the current is nt flwing. A real dide has a small vltage acrss it when it is n, a small negative current thrugh it when it is ff, a regin in which it switches frm n t ff, and a breakdwn regin where it stps blcking the current entirely. As lng as the vltages we use d nt reach the vltage f the breakdwn regin, the dide will wrk clse t ideal. Part B Dide Circuits: Rectifiers and Limiters Backgrund Rectifiers: A rectifier is a circuit that cnverts an AC current t a DC current. At the very simplest level, a rectifier circuit is als a circuit that takes an AC vltage and mdifies it s that the utput vltage has nly ne sign. It will eliminate either all psitive vltage r all negative vltage. A true DC current requires a cnstant DC vltage. The rectifiers we can build with nly regular dides give a first apprximatin t this. We will cntinue t refine the rectifiers presented here in ther parts f this experiment. Half-wave rectifier: Yu will build a half-wave rectifier circuit. Build the circuit in Figure B-1. Be sure t use a 1kΩ resistr fr this circuit. Channel 1+ senses the input signal t the half-wave rectifier circuit. 2+ is cnnected t the utput f the rectifier circuit. Half-wave rectifier circuit D2 Wav e Gen 1 1+ D1N4148 R2 1k 2+ 1-2- Figure B-1. The half-wave rectifier uses the fact that the dide nly allws current in ne directin t eliminate the negative vltage f the input. Nte that the current and vltage aren t exactly DC, but the average f the signal is nw psitive. Experiment: Set the functin generatr n Analg Discvery t a triangle wave at 1kHz with a 5V amplitude. Prduce a plt f the scillscpe channels 1 and 2. Include this in the reprt. The plt can be a picture frm the Analg Discvery sftware, an Excel plt r a MATLAB plt - yur chice. Label the traces. K.A. Cnnr, P. Schch, H. Hameed - 9 -
Full-wave rectifier: We can use fur dides in a bridge cnfiguratin t create a rectifier that als uses the negative cycle f the signal. The utput is shwn in Figure B-2. Image frm www.allabutcircuits.cm Figure B-2. In a full-wave rectifier ne pair f dides allws current in ne directin t flw thrugh the lad resistr when the AC surce has a psitive vltage. The ther pair f dides is arranged such that when the AC surce is negative, the current flws thrugh the lad in the same directin. This keeps the psitive half f the input signal and inverts the negative half, resulting in the utput shwn. Nte that the average vltage frm this circuit is als psitive, and (assuming the same input) its average vltage is greater than that f the half-wave rectifier. Smthing capacitrs: Yu already knw that an RC circuit has a characteristic charge and discharge rate. Yu shuld als be aware that larger capacitrs charge and discharge mre slwly than smaller nes. We can take advantage f the charge and discharge rates f capacitrs in rder t make the signal frm ur rectifier mre like a DC vltage. As the signal in ur rectifier increases, it charges the capacitr. As it decreases, the capacitr discharges. If the capacitr has a sufficiently lng discharge rate, it will hld mst f its charge until the next psitive cycle f the input recharges it. This results in an utput signal much clser t a true DC signal. Figure B-3 shws an input that has been rectified and then, smthed with a capacitr. Input Rectified Rectified and Smthed Figure B-3. Limiters: The purpse f a vltage limiter is t prevent the vltage in a circuit frm exceeding a certain level. These circuits are als called clippers because they clip the vltage signal ff at a given level as shwn in Figure B-4. When yu perfrmed the triangular wave sweep f the 1N4148 dide, yu shuld have bserved that the vltage acrss the dide remained near.7v when it was n. We can take advantage f this effect t build a circuit that permits small vltages t pass withut distrtin, but clips any vltage utside the range f abut -.7 t.7v. Signal befre vltage limitatin Figure B-4. Signal after vltage limitatin Experiment K.A. Cnnr, P. Schch, H. Hameed - 1 -
PSpice Simulatin f a Half-wave Rectifier with Smthing In this sectin, we will use a half-wave rectifier t create a signal which maintains a fairly cnstant DC value by adding a smthing capacitr. Create the circuit shwn in Figure B-5 in PSpice: D1 VOFF = VAMPL = 5 FREQ = 1 V1 D1N4148 R1 1k Figure B-5. Use VSIN fr the surce. Use the fllwing parameters fr VSIN: VAMPL = 5 (1Vp-p), VOFF = and FREQ = 1Hz. Run the simulatin Perfrm a transient analysis fr 5ms in increments f 1us. Obtain a graph f the input and utput vltages, V in (V1) and V ut (vltage acrss R1), vs. time. Include this plt in yur reprt. Add a capacitr acrss the resistr as shwn in Figure B-6 belw: V D1 V VOFF = VAMPL = 5 FREQ = 1 V1 D1N4148 C1 4.7uF R1 1k Figure B-6. Mdify yur PSpice circuit by adding capacitr C1 in parallel with R1. Perfrm a transient analysis as yu did in the previus part. Obtain a graph f the input and utput vltages vs. time. Include this plt in yur reprt. (Yu will als be adding 5 experimental pints t this plt based n the circuit yu build in the next sectin.) Mdify the frequency f the input surce and bserve the utput. Mdify the frequency f the surce t 1kHz and run the simulatin fr 2ms. Generate a plt f the V in and V ut. Nte the time at which the utput vltage reaches arund 4V. Keeping the time and step size the same, mdify the frequency f the surce t 1kHz and rerun the simulatin. Run the simulatin fr 5us with a maximum step size f 1us. Nte the time at which the utput reaches arund 4V. What is happening as the frequency increases? Prduce a plt f the utput frm the secnd case nly and include it in yur reprt. K.A. Cnnr, P. Schch, H. Hameed - 11 -
Hardware Implementatin f a Rectifier Nw wire the rectifier n yur prtbard and bserve the utput with and withut the capacitr. Return t the circuit in Figure B-1, redrawn belw D2 Wav e Gen 1 1+ D1N4148 R2 1k 2+ 1- Figure B-7. 2- Use the wavefrm generatr t supply an input sinusidal signal f 1Hz, 5V amplitude, (1Vp-p) signal applied t the rectifier circuit. Observe bth the input and the utput vltages with the scpe. Take a picture with Analg Discvery r plt the data using either Excel r MATLAB (yur chice). Include this plt with yur reprt. This is very similar t ne f the previus plts except nw the signal is a 1Hz sine wave. Repeat the prcedure abve with a 4.7uF capacitr in parallel with the resistr R, as shwn in Figure B-8. If yur kit desn t include a 4.7uF capacitr, ask the instructr r TA. Wave Gen 1 1+ D2 D1N4148 C2 4.7uF R2 1k 2+ 1-2- Figure B-8. Nte that the sine vltage frm the generatr may becme distrted when yu add the large capacitr. Recrd the input and utput signals (Channels 1 and 2) with Analg Discvery and include it in yur reprt. Again yu may chse t use a picture r plt the data using Excel r MATLAB. Measure the utput vltage at apprximately 5 pints during ne cycle. The data pints can be selected frm the Excel r MATLAB data files r the cursrs can be used in Analg Discvery Get a gd trace f Vut, (2+) n the scpe. Stp the scpe. Click the Zm Buttn n the Oscillscpe display. Mve and resize the zm windw t fcus n an area f interest. Open the zm windw by right clicking n it. Use the cursrs t read 5 vltages and times, including the minimum and maximum vltages, and 3 ther pints. Clse the zm windw. Add the experimentally measured pints t the plt generated with PSpice. This can be dne by hand. Vary the frequency f the functin generatr and bserve bth the input and utput vltage f the rectifier with the capacitr. Try cnnecting and discnnecting the capacitr as yu vary the frequency. Try a larger capacitr, such as a 1uF capacitr. K.A. Cnnr, P. Schch, H. Hameed - 12 -
PSpice Simulatin f Vltage Limitatin Nw we can use PSpice t build a limiter using a pair f dides. Draw the circuit shwn in Figure B-9. A R1 1k B V1 D1 D1N4148 D2 D1N4148 Figure B-9. Use VSIN fr the surce (VAMPL = 5, FREQ = 1Hz, everything else = ). Perfrm a transient analysis in increments f 5us fr 25ms. Plt the input (pint A) and utput (pint B) vltages. The input is the vltage surce while the utput is taken acrss the dide pair, as shwn. Cpy yur plt and include it in yur reprt. (Yu will als be adding 5 experimental pints t this plt based n the circuit yu build in the next sectin.) Change the amplitude f the sinusidal input, Vin, t 2V. Repeat the transient analysis. Cpy this plt als and include it in yur reprt. Hardware Implementatin f a Limiter Nw build the limiter n yur prtbard. WaveGen 1 1+ 1- R1 1k D1 D1N4148 2+ D2 D1N4148 Figure B-1. Wire the limiter circuit shwn abve Use the functin generatr t supply a 1Hz, 5V amplitude, sinusidal input. Observe V ut (2+) and V in (1+) with the scillscpe. Take an Analg Discvery picture f this circuit r save and plt the data in Excel r MATLAB. Include it in yur reprt. Recrd at least 5 experimental vltages and add them t yur PSpice utput. The data pint may be hand written n the PSpice plt. What is the effect f altering the amplitude f yur circuit? Repeat the measurements with a 1Hz, 2V sinusidal input. Take an Analg Discvery picture f this circuit with 2V amplitude and include it in yur reprt. Alter the circuit t limit vltage in nly ne directin. Return the amplitude f the functin generatr t 5V. Remve ne f the dides frm yur limiter and bserve the utput. What part f the signal is being limited? Take a picture f this utput r plt it and include it in yur reprt. Nw reverse the plarity f the remaining dide in the circuit. (Turn it arund). What part f the signal is being limited nw? 2- Summary Dides can be used as rectifiers, which cnvert an AC signal int a signal with an average nn-zer DC vltage. The desired result f a rectifier is t create a DC signal frm an AC signal. The signal frm a simple rectifier circuit built with a dide can be imprved by the additin f a smthing capacitr. Dides can als be used t limit vltage. This device is called a limiter. These can be used t limit vltage in ne directin, r in bth directins. K.A. Cnnr, P. Schch, H. Hameed - 13 -
Part C LEDs, Phtdides and Phttransistrs Backgrund LEDs: An LED is a device that emits light when it is subjected t a vltage. Just like a regular dide, an LED will nt turn n (and emit light) until a certain threshld vltage is reached. This threshld depends upn the clr f the LED and the dide manufacturing prcess. Red LEDs turn n when the vltage acrss them exceeds abut 2.2V. With green LEDs, the vltage can vary ver a large range frm abut that required fr Red up t 4V. Blue is abut 3.5-4V. Nte that, althugh dides ften have a plastic cating that matches the clr f the light emitted, the light that cmes frm a dide is nt white. It is light f the wavelength f the desired clr, i.e. a red dide (even with a clear plastic cvering) will put ut light in the red regin f the electrmagnetic spectrum. The fllwing equatin can be used t decide what resistance t use with an LED, given its threshld vltage and the desired current thrugh the dide. 2mA is a reasnable value t use fr the current thrugh the dide, althugh that als depends n the manufacturing prcess and the size f the dide. A handy calculatr fr determining the series resistance fr a particular LED can be fund at http://led.linear1.rg/1led.wiz. Vin V R I The amunt f light emitted by an LED is rughly prprtinal t dide current. There is a well-written activity (meant fr a science fair prject) that addresses illuminatin. http://www.sciencebuddies.rg/science-fairprjects/prject_ideas/elec_p37.shtml Phtdides: A phtdide is a device that generates a current in the presence f light. As phtns f light excite the PN junctin inside the dide, a current is generated thrugh the junctin. The mre light that shines n the pht-reactive surface, the mre current flws thrugh the device. In the equatin fr i D, the saturatin current I s, increases with the amunt f light hitting the dide. Phtdides are reverse-biased and perate in the lwer left quadrant f the i-v characteristic (bth vltage and current are negative), as d Zener dides. We d nt use slar cells in this curse, but they als have an I s prprtinal t light and perate in the lwer right quadrant. Phttransistrs: A phttransistr is similar t a phtdide except that it takes advantage f the ability f the transistr t amplify current in the active regin. The current it generates is still prprtinal t the amunt f incident light, but it is amplified by the prperties f the transistr. The graph in Figure C-1 shws the linear relatinship between incident light and current thrugh a phttransistr similar t the ne we will be using. In effect, the light plays the same rle as the base current I b in a standard transistr. Recall that the cllectr current I c is the rder f 1 times the base current (the amplificatin). LED LED Figure C-1. K.A. Cnnr, P. Schch, H. Hameed - 14 -
Experiment Transmit a Signal using Light Here we will build tw circuits. The first circuit will cause an LED t blink. A current will be created in the secnd circuit when the phttransistr detects the light frm the blinking LED. Wire the circuit in Figure C-2 n yur prtbard. Please nte that the dc pwer supplies f the Analg Discvery are bth used. Fr the LED side, this allws fr larger applied vltages. V+ pwer R2 WaveGen 1 1+ 33hms R3 56k 2+ 1- LED Pht Transistr V- pwer 2- Figure C-2. The phttransistr lks like a clear LED. It is a transistr but the base desn t have an external lead. Light supplies the base current. There is a flat side n the phttransistr. The lead next t the flat (cllectr) ges t the resistr. Nte that resistr R3 is 56kΩ and resistr R2 is nly 33Ω. When yu wire yur circuits, pint the LED and the phtdide twards ne anther s that the runded tips (lenses) face each ther. Recall that the light frm the dide is mst visible frm the tp. The phtdide takes in light primarily at the tp as well. Having them face each ther prvides the maximum light transmissin and als minimizes the secndary effects caused by ther lights in the rm. Adjust the functin generatr t prduce a square wave with a frequency f 1Hz. Set the amplitude f the functin generatr t 5V, this will result in a 1Vp-p signal with a 5V ffset prvided by V- pwer. Observe the utput f yur circuit. Cnnect the surce vltage t ne channel f yur scpe. Cnnect the utput (the vltage acrss the phttransistr) t the ther channel f yur scpe. If the utput signal desn t shw a significant square wave then: Make sure the phttransistr is crrectly installed. Simply reverse the phttransistr and see if the signal increases. Make sure that the tip f the LED pints tward the tip f the phttransistr. Take yur data. Save a picture f the utput when the circuit is wrking well. Include this plt in yur reprt. After btaining a clear signal with this ptical link, blck the light by placing a piece f paper, yur finger, r smething similar between the transmitter and receiver. D yu bserve anything n the scillscpe? Change the frequency f the square wave t 5Hz and 2kHz. Des the utput lk like the input? Summary Phtdetectin is a very imprtant use f dides. LEDs and phtdides can be used t emit and detect light in the visible spectrum and als in the infrared. These devices are used in remte cntrl devices t transmit mdulated signals f certain frequencies. They are als used t sense and/r display infrmatin in cuntless ther applicatins. A phttransistr is very much like a phtdide, but it als has the gain f at transistr. We use the phttransistr fr this reasn. K.A. Cnnr, P. Schch, H. Hameed - 15 -
Part D Zener Dides Backgrund The reverse breakdwn regin: In a semicnductr dide, charge carriers (hles and electrns) are cntinually being thermally generated, which results in the small, vltage independent reverse saturatin current when a dide is reverse biased. If the reverse vltage becmes t large, tw phenmena ccur t dramatically increase current. As the reverse bias vltage increases, s des the size f the depletin regin (the insulating regin between the hles and electrns). In this regin, the charge carriers experience an electric field frce which increases their energy. If this energy is large enugh, the cllisin f a carrier with an in will generate a new hle-electrn pair. The electric field itself can als pull electrns frm the ins nce it becmes large enugh. Bth prcesses increase the number f charge carriers and thus increase the ability f the dide t carry current in the reverse directin. Zener dides: By apprpriate dping, it is pssible t design a Zener dide that breaks dwn at anywhere frm a few vlts t a few hundred vlts. If yu recall the figure abve shwing the i-v characteristic curve f a dide, yu will see that, if a dide is sufficiently reverse biased, it will cnduct in the reverse directin. Furthermre, the dide vltage will remain apprximately cnstant ver a wide range f currents. This prperty is knwn as breakdwn; the negative f the breakdwn vltage is called the Zener vltage (V Z). Dides that are designed t wrk in the breakdwn state are usually knwn as Zener dides. Figure D-1 shws the symbl fr a Zener dide. Figure D-1. Characteristic curve f a Zener dide: The characteristic curve f a Zener dide is similar t that f a regular dide. The difference is that, whereas regular dides will reach the breakdwn regin at vltages way beynd the perating range f yur circuit, Zener dides are designed t break dwn at (minus) the Zener vltage. Yu use this feature f the Zener dide as part f the design f yur circuit. The characteristic curve fr an ideal Zener dide is shwn in Figure D-2. In a real Zener dide, the frward bias regin ccurs at the same vltage as a regular dide,.7v. The reverse bias vltage f a Zener dide is knwn as the Zener vltage. Althugh the breakdwn regin ccurs at a negative vltage, the Zener vltage is always a psitive number (the abslute value (r negatin) f the actual breakdwn vltage.) Zener dides are rated by this Zener vltage. Fr example, a 1V Zener dide will reach breakdwn at arund -1V and a 5V Zener dide will reach breakdwn at abut -5V. Ideal Zener Dide I -V Z V Figure D-2. K.A. Cnnr, P. Schch, H. Hameed - 16 -
Experiment I-V Characteristic Curve f a Zener Dide Nw we will plt the vltage acrss a Zener dide vs. the current thrugh the Zener dide. Wire the circuit in Figure D-3 in PSpice. The Zener dide is D1N751. It is in the DIODE PSpice library. If yu can t find the D1N751 in the DIODE library, yu can use the D1N75 in the EVAL library but the results will be different than thse fr the experiment. V I R1 1Vdc V1 1k D1 D1N751 Figure D-3. Run a simulatin and create the i-v characteristic curve. Perfrm a DC sweep analysis f vltage surce V1 frm -1 t +1V in increments f.1v. Select Add Trace t plt current thrugh dide D1, I(D1), r use the marker shwn. Change the x-axis f yur plt as fllws (same as with the regular dide): In the Plt menu, chse Axis Settings. Then click n the X Axis tab. Click n the Axis Variable buttn at the bttm. Enter the vltage at pint B as the new X Axis Variable. (Example: V(R1:2). Nte that the vltage at this pint is the vltage acrss the dide.) After yu get the plt, remve all vltage markers, s that nly I(D1) is displayed. The plt prduced will shw the i-v characteristic curve fr dide D1. It shuld lk like the i-v curve fr a Zener dide. Cpy this plt and include it in yur experiment. Determine the knee current Lk up the typical Zener vltage in the spec sheet fr the 1N751A dide. (Yu can find a link t this spec sheet n the links page.) Draw a vertical line in the reverse bias regin n yur utput plt crrespnding t the negatin f the rated Zener vltage. Nte that this dide will keep its reverse bias vltage quite clse t -V Z fr a wide range f currents. The smallest current fr which the bias vltage is abut equal t -V Z is called the knee current. What is the maximum current (r knee current) fr which the reverse bias vltage is within.1v f -V Z? Mark the knee current n the plt. Hardware Implementatin In the final part f this experiment, yu will build a Zener dide vltage regulatr n yur prtbard. In this experiment, yu will be measuring current. Current is always measured in series with a circuit. Assemble the circuit shwn in Figure D-4 n yur prtbard. The Zener dide lks like the regular dide, except it shuld have 75 written n it. This is the same circuit as Figure A-7 with the 1N4148 replaced with the 1N751. 2-2+ K.A. Cnnr, P. Schch, H. Hameed - 17 -
WaveGen 1 2+ R1 1k 2-1+ D3 D1N751 V+ pwer 1- Figure D-4. Measure the current vs. vltage characteristics f the 1N751 Zener dide. Nte: the V+ supply is used in this case t allw larger reverse vltages t be applied. Set Functin Generatr 1 t a 1kHz, triangle wave, 5V amplitude. If yu have the Analg Discvery 2, set V+ pwer t 3V. This will yu t see bth the frward and reverse dide current. With the riginal Analg Discvery the vltage is set t +5V n yu will nly measure the reverse, Zener, current. Observe the dide vltage n channel 1 f the Oscillscpe. Observe the dide current n channel 2 f the Oscillscpe. Remember that channel 2 is the current with a scale factr f 1mA/V. Set the scillscpe up t display a cuple f cycles f the signal, fr example set the time base t 25us/div. Save the data t a file nce yu have a clean plt n the screen. Start MATLAB and Imprt the data file. See Figure A-9 fr help in pltting the data in MATLAB. Include the experimental plt f i vs. v in yur reprt. Summary Zener dides explit the breakdwn regin f dides t create a device that allws current t flw freely in ne directin at a level abve the Zener vltage. Yu can use a Zener dide t hld a vltage t the Zener vltage. An AC t DC cnverter f a desired vltage can be created by cmbining a Zener dide (rated at that vltage) with a rectifier and a smthing capacitr. Checklist and Cnclusins The fllwing shuld be included in yur experimental checklist. Everything shuld be labeled and easy t find. Credit will be deducted fr pr labeling r unclear presentatin. ALL PLOTS SHOULD INDICATE WHICH TRACE CORRESPONDS TO THE SIGNAL AT WHICH POINT AND ALL KEY FEATURES SHOULD BE LABELED. Hand-Drawn Circuit Diagrams fr all circuits that are t be analyzed using PSpice r physically built and characterized using yur Analg Discvery bard. Part A The I-V Characteristic Curve (16 pints) Include the fllwing plts: 1. I-V Characteristic curve f a dide, the PSpice Plt with 5 pints marked. (3 pt) 2. Wavefrm plt f dide current vs. vltage. (2pt) 3. MATLAB plt f dide current vs. vltage frm data taken using Analg Discvery sftware. This shuld include the data pints and a line fund using the dide characteristic equatin. (3 pt) Answer the fllwing questins: 1. Use the data yu tk fr the i-v characteristic curve f the 1N4148 dide t determine the mathematical representatin f the i-v curve. What values did yu find fr I S and n (curve n the MATLAB plt)? (4 pt) 2. Why d yu knw that the current thrugh the dide is V ut/r2? (2 pt) 3. What differences, if any, did yu ntice between the i-v characteristic curve given by PSpice and the ne yu measured experimentally? (2 pt) K.A. Cnnr, P. Schch, H. Hameed - 18 -
Part B - Dide Circuits: Rectifiers and Limiters (32 pints) Include the fllwing plts: 1. Picture r plt f the Analg Discvery data fr the circuit in Figure B-1, the half-wave rectifier. This figure has a triangle wave input signal. (2 pt) 2. PSpice plt f the half-wave rectifier circuit, Figure B-5. (2 pt) 3. PSpice plt f the rectifier with smthing with 5 experimentally btained pints marked. (4 pt) 4. PSpice plt f the rectifier (utput nly) at 1kHz. (2 pt) 5. Analg Discvery plt f the rectifier (with n smthing capacitr, sinusidal wavefrm). (2 pt) 6. Analg Discvery plt f the rectifier (with a smthing capacitr). (2 pt) 7. PSpice plt f the vltage limiter at 1V (with 5 experimental pints marked). (2 pt) 8. PSpice plt f the vltage limiter at 4Vp-p (2V amplitude). (2 pt) 9. Analg Discvery plt f the limiter circuit with 1Vp-p input. (2 pt) 1. Analg Discvery plt f the limiter circuit with 4Vp-p input amplitude. (1 pt) 11. Analg Discvery plt f the limiter with nly ne dide. (1 pt) Answer the fllwing questins: 1. Explain why V ut changes when yu add the capacitr t the rectifier in parallel with R. Explain why this circuit wuld be better fr use as a DC surce than the circuit withut the capacitr. (3 pt) 2. Did the circuit with the capacitr wrk better (mre like a DC surce) at high r lw frequencies? (1 pt) 3. Cmment n the similarities and differences between the PSpice and experimental results fr the rectifier. (2 pt) 4. At what values (psitive and negative) des the limiter cut ff the vltage f the 1Vp-p input signal? (2 pt) 5. Why is this circuit called a limiter? (2 pt) Part C LEDs, Phtdides and Phttransistrs (1 pints) Include the fllwing plt: 1. Analg Discvery plt f the input and utput fr the ptical link. (5 pt) Answer fllwing questins/cmments: 1. What are the minimum and maximum vltages f the utput wavefrm under the best signal cnditins? (2 pt) 2. Describe what happens t the utput wavefrm at the higher frequencies. (1 pt) 3. Cmment n tw f the fllwing: a) the effect f misalignment f the LED and transistr, b) the effect f the rm lights, c) signal level thrugh paper, skin, r ther bjects. (2 pt) Part D Zener Dides (14 pints) Include the fllwing plts: 1. PSpice Zener dide characteristic curve with vertical line and knee current marked. (5 pt) 2. Plt f Zener dide i vs. v frm the experiment. (5 pt) Answer the fllwing questins: 1. What are the Zener vltage and knee current fr the dide yu simulated? (2 pt) 2. Shwn belw is the i-v characteristic curve f the 1N4148 nn-zener dide we lked at in part A, but btained ver a much wider vltage range. Cmpare this plt with the ne yu btained fr the Zener dide. (2 pt) K.A. Cnnr, P. Schch, H. Hameed - 19 -
Summary (8 pints) 1. Organizatin (6 pt) 2. List member respnsibilities. (2 pt) K.A. Cnnr, P. Schch, H. Hameed - 2 -
List grup member respnsibilities. Nte that this is a list f respnsibilities, nt a list f what each partner did. It is very imprtant that yu divide the respnsibility fr each aspect f the experiment s that it is clear wh will make sure that it is cmpleted. Respnsibilities include, but are nt limited t, reading the full write up befre the first class; cllecting all infrmatin and writing the reprt; building circuits and cllecting data (i.e. ding the experiment); setting up and running the simulatins; cmparing the thery, experiment and simulatin t develp the practical mdel f whatever system is being addressed, etc. Summary/Overview ( t -1 pts) There are tw parts t this sectin, bth f which require revisiting everything dne n this experiment and addressing brad issues. Grading fr this sectin wrks a bit differently in that the verall reprt grade will be reduced if the respnses are nt satisfactry. 1. Applicatin: Identify at least ne applicatin f the cntent addressed in this experiment. That is, find an engineered system, device, prcess that is based, at least in part, n what yu have learned. Yu must identify the fundamental system and then describe at least ne practical applicatin. 2. Engineering Design Prcess: Describe the fundamental math and science (ideal) picture f the system, device, and prcess yu address in part 1 and the key infrmatin yu btained frm experiment and simulatin. Cmpare and cntrast the results frm each f the task areas (math and science, experiment, simulatin) and then generate ne r tw cnclusins fr the practical applicatin. That is, hw des the practical system mdel differ frm the riginal ideal? Be specific and quantitative. Fr example, all systems wrk as specified in a limited perating range. Be sure t define this range. Ttal: 8 pints fr experiment packet t -1 pints fr Summary/Overview 2 pints fr attendance 1 pints Attendance (2 pssible pints) 2 classes (2 pints), 1 class (1 pints), class ( pints) Minus 5 pints fr each late. N attendance at all = N grade fr this experiment. K.A. Cnnr, P. Schch, H. Hameed - 21 -
Experiment 8 Sectin: Reprt Grade: Name Name Checklist w/ Signatures fr Main Cncepts Fr all plts that require a signature belw, yu must explain t the TA r instructr: the purpse f the data (using yur hand-drawn circuit diagram), what infrmatin is cntained in the plt and why yu believe that the plt is crrect. Any member f yur grup can be asked fr the explanatin. PART A: The I-V Characteristic Curve 1. PSpice I-V Characteristic curve f a dide (5 pints marked) 2. Wavefrms plt f dide current vs. vltage 3. Matlab plt f dide current vs. vltage frm Analg Discvery data Questins 1-3 PART B: Dide Circuits: Rectifiers and Limiters 1. Picture r plt f the Analg Discvery data fr the circuit in Figure B-1, the half-wave rectifier. This figure has a triangle wave input signal 2. PSpice plt half-wave rectifier circuit, Figure B-5 3. PSpice plt rectifier with smthing with 5 experimentally btained pints marked 4. PSpice plt rectifier (utput nly) at 1kHz 5. Analg Discvery plt rectifier (with n smthing capacitr, sinusidal wavefrm) 6. Analg Discvery plt rectifier (with a smthing capacitr) 7. PSpice plt vltage limiter at 1V (with 5 pints marked) 8. PSpice plt vltage limiter at 4Vp-p (2V amplitude) 9. Analg Discvery plt limiter circuit with 1Vp-p input 1. Analg Discvery plt limiter circuit with 4Vp-p input amplitude 11. Analg Discvery plt limiter with nly ne dide Questins 1-5 PART C: LEDs, Phtdides and Phttransistrs 1. Analg Discvery plt input and utput fr the ptical link Questins 1-3 K.A. Cnnr, P. Schch, H. Hameed - 22 -
PART D: Zener Dides 1. PSpice Zener dide characteristic curve with vertical line and knee current marked 2. Plt f Zener dide i vs. v frm the experiment Questin 1-2 Member Respnsibilities Summary/Overview K.A. Cnnr, P. Schch, H. Hameed - 23 -