CA3012. FM IF Wideband Amplifier. Description. Features. Applications. Ordering Information. Schematic Diagram. Pinout.

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Transcription:

SEMICONDUCTOR CA30 November 99 FM IF Wideband Amplifier Features Exceptionally High Amplifier Gain - Power Gain at.mhz.....................7db Excellent Input Limiting Characteristics - Limiting Voltage (Knee) at 0.7MHz.... 00µV (Typ) Wide Frequency Capability: - Bandwidth.................... 00kHz to 0MHz Applications FM IF Amplifiers FM Communication Receivers TV IF Amplifiers Description The CA30 is an FM IF wideband amplifier with 3 limiter gain stages in a bipolar monolithic technology. The pin input is an open base and has a separate feedback bias. The feedback bias pin, DC FB BYPASS, is externally bypassed and provides the means for a tuned coil input to the IF IN pin. The output is a high impedance open collector which may be matched to a tuned transformer, driving an FM detector. Internal regulation circuits provide DC bias to the gain stages and DC feedback circuit. The CA30 is intended for FM limiting applications requiring high gain. Ordering Information TEMP. PKG. PART NUMBER RANGE ( o C) PACKAGE NO. CA30 - to 0 Ld Metal Can T0.C Pinout CA30 (METAL CAN) TOP VIEW Schematic Diagram 0 V CC V CC INPUT 0 9 NC DC IN REF DC FB BYPASS 3 REF BIAS OUTPUT GROUND 7 NC NC Internal connection, do not use. 3 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright Harris Corporation 99 - File Number.

CA30 Absolute Maximum Ratings T A = o C Thermal Information Maximum Supply Voltage V CC, Pin 0.................... 0V Maximum Output Voltage, Pin......................... 3V Maximum Input Signal Voltage between Pin and Pin..... ±3VV Operating Conditions Temperature Range........................ - o C to o C Supply Voltage Range (Typical)....................V to 0V Thermal Resistance (Typical, Note ) θ JA ( o C/W) θ JC ( o C/W) Metal Can Package............... 7 00 Maximum Junction Temperature....................... 7 o C Maximum Storage Temperature Range......... - o C to 0 o C Maximum Lead Temperature (Soldering 0s)............ 300 o C CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE:. θ JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications TEST CONDITIONS SETUP AND DC SUPPLY PROCEDURE FREQUENCY VOLTAGE TEMP PARAMETER SYMBOL (FIGURE) f (MHz) V CC (V) ( o C) MIN TYP MAX UNITS Total Device Dissipation (Note ) P T - - 0 3 mw 90 mw 70 mw - 7. - 97 30 90 mw 97 0 7 mw 9 00 7 mw - 0-0 0 7 mw 0 90 mw 0 0 mw Voltage Gain (Note 3) A 3-0 - db 0 - db 0 - db 3 7. - 9 - db 70 - db - db 3 0 - - db 7 - db - db 3. 7. 0 7 - db 0.7 7. - db Input Impedance Components Parallel Input Resistance R IN. 7. - 3 - kω Parallel Input Capacitance C IN. 7. - 7 - pf Output Impedance Components Parallel Output Resistance R OUT. 7. - 3. - kω Parallel Output Capacitance C OUT. 7. -. - pf Noise Figure NF 0. 7. -.7 - db Input Limiting Voltage (Knee) V I(LIM ) 3. 7. - 300 00 µv NOTES:. The total current drain may be determined by dividing P T by V CC. 3. Recommended minimum DC supply voltage (V CC ) is.v. Nominal load current flowing into terminal is.ma at 7.V. -9

CA30 Typical Performance Curves and Test Setups 0 0Ω + 0 CA30 TOTAL DEVICE DISSIPATION (mw) 00 0 00 0 V CC = 0 7. I - 7 0-7 -0-0 0 7 00 0 TEMPERATURE ( o C) FIGURE. DISSIPATION TEST SETUP FIGURE. DISSIPATION vs TEMPERATURE R OUT kω Procedures A. Voltage Gain.Set input frequency at desired value, V I = 00µV RMS SIGNAL SOURCE R G = 0Ω V I 0Ω 0 CA30 V O RF VOLTMETER. Record V O 3. Calculate Voltage Gain A from A = 0 log 0 V O /V I. Repeat steps, and 3 for each frequency and/or for temperature desired B. Input Limiting Voltage (Knee) 3.Repeat steps A and A, using V I = 00mV. Decrease V I to the level at which V O is 3dB below its value for V I = 00mV 3. Record V I as Input Limiting Voltage (Knee) FIGURE 3. VOLTAGE GAIN TEST SETUP 0 V CC = 7., f = MHz, R S = 0Ω, R L = kω 00 7 T A = o C, V CC = 7., R S = 0Ω, R L = kω 700 VOLTAGE GAIN (db) 7 70 0 VOLTAGE GAIN INPUT LIMITING 00 00 300 00 00 INPUT LIMITING VOLTAGE (µv) VOLTAGE GAIN (db) 70 VOLTAGE GAIN INPUT LIMITING VOLTAGE 00 00 00 300 00 INPUT LIMITING VOLTAGE (µv) 0 0-7 -0-0 0 7 00 0 TEMPERATURE ( o C) 0 0. 0 00 FIGURE. VOLTAGE GAIN AND INPUT LIMITING VOLTAGE vs TEMPERATURE FIGURE. VOLTAGE GAIN AND INPUT LIMITING VOLTAGE vs FREQUENCY -0

CA30 Typical Performance Curves and Test Setups (Continued) R-X METER HI LO V I 00mV 0 CA30 3 PARALLEL INPUT CAPACITANCE (pf) 0 T A = o C, V CC = 7. C IN 3 R IN 0 0 PARALLEL INPUT RESISTANCE (kω) FIGURE. INPUT IMPEDANCE TEST SETUP FIGURE 7. INPUT IMPEDANCE vs FREQUENCY CA30 3 0. µf 0 HI R-X METER LO PARALLEL OUTPUT CAPACITANCE (pf) T A = o C, V CC = 7. 0 C OUT 0 R OUT 3 30 0 0 PARALLEL OUTPUT RESISTANCE (kω) FIGURE. OUTPUT IMPEDANCE TEST SETUP FIGURE 9. OUTPUT IMPEDANCE vs FREQUENCY 0 T A = o C, f =.MHz, R S = 00Ω R S = 00Ω L L C 9..MHz NOISE SOURCE C CA30 3 0. µf RF VOLTMETER NOISE FIGURE (db) 9.0. L = µh, CENTER TAPPED L =.3µH C, C = ARCO TYPE 3 PADDER, OR EQUIVALENT FIGURE 0..0 7 9 0 DC SUPPLY VOLTS (V CC ) FIGURE. NOISE FIGURE vs DC SUPPLY VOLTAGE -

CA30 Typical Application 0 0.MHz -0MHz TUNER 0.7MHz SELECTIVITY FM DETECTOR AF AMPLIFIER SPEAKER CA30 3 FIGURE. BLOCK DIAGRAM OF TYPICAL FM RECEIVER USING THE CA30 INTEGRATED CIRCUIT WIDEBAND AMPLIFIER All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries. Sales Office Headquarters NORTH AMERICA Harris Semiconductor P. O. Box 3, Mail Stop 3-0 Melbourne, FL 390 TEL: -00--777 (07) 79-9 FAX: (07) 79-3 For general information regarding Harris Semiconductor and its products, call -00--HARRIS EUROPE Harris Semiconductor Mercure Center 00, Rue de la Fusee 30 Brussels, Belgium TEL: (3).7. FAX: (3).7..0 ASIA Harris Semiconductor PTE Ltd. No. Tannery Road Cencon, #09-0 Singapore 33 TEL: () 7-00 FAX: () 7-000 SEMICONDUCTOR -