IN THE modern integrated circuit (IC) industry, threedimensional

458 IEEE TRANSACTIONS ON RELIABILITY, VOL. 66, NO. 2, JUNE 2017 R 2 -TSV: A Repairable and Reliable TSV Set Structure Reutilizing Redundancies Jaeseok Park, Minho Cheong, and Sungho Kang, Senior Member, IEEE Abstract Recently, three-dimensional integrated circuit (3-D IC) design has attracted much attention, and the reliability of these systems has become increasingly important. In this paper, a new repairable and reliable through-silicon via (TSV) set structure is proposed. This proposed TSV set structure can be applied to the previous TSV repair structures which require TSV redundancies, and detects a defect or error reutilizing residual TSV redundancies for high reliability of 3-D ICs. Both online test and soft error detection/analysis are supported by the proposed approach. Furthermore, a redundancy-sharing structure is introduced to guarantee a balanced detection rate among TSV sets and a reasonable full detection rate. The experimental results prove that the new approach guarantees high redundancy utilization efficiency and reliability of TSV. Also, they show that defect or error detection is achieved by the proposed TSV set structure. Index Terms 3-D IC, compactor, through-silicon via (TSV), TSV redundancy, TSV redundancy reutilization. ACRONYMS AND ABBREVIATIONS IC Integrated circuit. 3 D Three dimensional. 2 D Two dimensional. TSV Through-silicon via. MISR Multiple-input shift register. 1 D One dimensional. MUX Multiplexer. R 2 -TSV Repairable and reliable TSV. SOC Single-output compactors. IP Intellectual property. NOTATIONS CI max Maximum number of compactor inputs. m Number of compactor outputs. s Number of signal TSVs in a TSV set. r Number of redundant TSVs in a TSV set. R Comparison result between compactor outputs. en Enable signal. OR function output of all R values. E T Manuscript received August 18, 2016; revised November 30, 2016; accepted February 9, 2017. Date of publication March 28, 2017; date of current version May 31, 2017. This work was supported in part by the Ministry of Trade, Industry & Energy (10052875) and in part by the Korea Semiconductor Research Consortium support program for the development of the future semiconductor device. (Corresponding author: Sungho Kang.) Associate Editor: M. Zuo. The authors are with the Computer System and Reliable SOC Laboratory, Department of Electrical and Electronic Engineering, Yonsei University, Seoul 120-749, South Korea (e-mail: bbajaepjs@soc.yonsei.ac.kr; cmh9292@soc.yonsei.ac.kr; shkang@yonsei.ac.kr). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TR.2017.2681103 E U p n s x N SOC C T Serial data output of all R values. Number of TSV test patterns. Number of TSV sets. Number of XOR stages. Number of single-output compactors. Total defect or error coverage. I. INTRODUCTION IN THE modern integrated circuit (IC) industry, threedimensional (3-D) IC design has become an important area of circuit design as the demand for higher performance and density of ICs increases. The through-silicon via (TSV) is one of the main components of the 3-D IC structure, and it is a vertical electrical link between two layers penetrating through the silicon substrate of a layer [1]. To monitor the quality of components of 3-D ICs including TSVs, all 3-D ICs should pass proper tests; a 3-D IC test is commonly composed of two processes: prebond and postbond tests [2] [8]. The prebond test is executed on each layer when all layer implementations are complete. On the other hand, the postbond test is executed whenever the layers proved in the prebond test are stacked. TSVs should also pass these two test steps. Through these TSV test processes, faulty TSVs are found if any defects exist on the TSVs. The TSV repair process is required to raise yield because even one faulty TSV can cause chip malfunction. In the TSV repair process, the faulty TSVs are interchanged by extra TSVs inserted in TSV sets, which are called TSV redundancies, as in the memory repair procedure. Lots of TSV repair techniques have been researched recently [9] [15]. Commonly, a TSV set contains a fixed number of signal TSVs and TSV redundancies which deliver functional signals, through switches or fuses, from the one layer to the other layer, and the matches between TSVs and functional signals are determined according to the test results that inform the addresses of faulty TSVs. When the TSV repair processes are completed, some TSV redundancies may not be consumed in the TSV repair, and then these residual TSV redundancies remain with no function of signal delivery. As the complexity of ICs rises, such as in 3-D ICs, malfunctions and system failures from overheating and signal interference, happen more often in operation [16]. Therefore, to minimize the loss from these phenomena, the significance of reliability research is emphasized remarkably, not only for components in 2D ICs but also for TSVs between stacked layers in 3-D ICs. Even in dies passing proper tests, some problems such as soft errors and defects from aging may be observed. Therefore, soft error treatment schemes have been proposed and 0018-9529 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications standards/publications/rights/index.html for more information.

PARK et al.: R 2 -TSV: A REPAIRABLE AND RELIABLE TSV SET STRUCTURE REUTILIZING REDUNDANCIES 459 improved to enhance the reliability of 2-D ICs. Commonly, these soft error treatment schemes request additional connections to transmit check bits. But, only TSVs can be the additional connections to apply soft error detection techniques to TSVs in 3-D ICs because there is no other signal connection between the layers. Thus, the circuits for TSV reliability should secure additional TSVs. Response compactors are usually used to save output pins which drive the test results from scan-outs [17] [21]. The test stimulus compression techniques that are applied for efficient injection of test stimulus into scan chains must guarantee full recovery after decompression because the values in scan chains should be exactly identical to test pattern before compression. However, in the response compaction techniques, it can be irreversible since the test results compressed by response compaction do not require full recovery. As a result, response compaction reduces the number of compactor outputs. The data collected through the compactor is compared to the reference data, and then the defects are detected from the mismatch between the compacted data and the reference data. The response compaction techniques are commonly divided into two categories: the space compaction and the time compaction. The compactors of space compaction techniques are combinational logical circuits composed of XOR gates, while time compaction techniques apply multiple-input shift registers as compactors. This paper proposes a new TSV set structure which is reliable as well as repairable. It can repair faulty TSVs by using TSV redundancies as in the previous repairable TSV sets, and it can recognize the occurrence of aging defects and soft errors by the reutilization of residuary TSV redundancies. These residuary TSVs are utilized as additional signal routes for detecting defects or errors on TSVs. Section II reviews the previous TSV repair structures and test result compaction schemes, and Section III proposes a reliability-advanced TSV set structure. Section IV evaluates the efficiency of the proposed TSV set and proves that the proposed TSV set performs defect or error detection. Finally, Section V summarizes this paper. II. PREVIOUS WORKS A. TSV Repair Structure To repair faulty TSVs, the circuit designers construct TSV sets including TSV redundancies and a routing logic, as shown in Fig. 1(a) [11], [13] [15]. Many repair structures have been introduced, and they have differences in the switch/fuse box. The yield manager and 3-D IC designer determine the ratio between the signal TSVs and redundant TSV by considering the 3-D IC specification and manufacturing process. For example, in the low-quality TSV implementation process, the TSV defect rate is relatively high, so high-performing TSV repair system is required. To raise repair performance, fewer signal TSVs per one redundant TSV are arranged in a TSV set. The TSV repair schemes assume that TSVs are arranged in plural TSV blocks, and all TSV blocks have no delay problem for TSV repair structure implementation in this TSV arrangement. There are two categories for the TSV repair structure: 1-D and 2-D TSV repair. In the 1-D repair structure, two typical TSV repair structures are proposed: signal switching [11] and signal shifting [13], [14], as shown in Fig. 1(b). Only the TSVs which Fig. 1. Repairable TSV set structure. (a) Overall structure. (b) Signalswitching/shifting structure (1-D TSV repair) [11], [13], [14]. (c) Router-based structure (2-D TSV repair) [15]. include defects are interchanged by the specific extra TSVs in the signal-switching structure. Thus, the good TSVs have no change of routing in this repair structure. However, in the signalshifting structure, links of TSVs including faulty TSVs are rearranged by serial shifting. The signal shifting should reroute much more connections compared to the signal switching, but reduces timing imbalance problem from rerouting connections. In the 2-D repair structure, as shown in Fig. 1(c), the faulty TSVs are replaced by using routers that are composed of three 3-to-1 multiplexers (MUXes), and the router can change connections between signals and TSVs in two directions [15]. From these characteristics, the 2-D repair schemes are superior to 1-D repair schemes in the repair of clustered faults, but require a much higher hardware cost. In all repair concepts, residual TSV redundancies exist if any TSV redundancies are not occupied in the repair step. Practically, almost all TSV redundancies are not used because the TSV defect rate is commonly quite low. In [14], Hsieh and Hwang report that the TSV defect rate value in practical 3-D IC implementation environment exist between 10 4 and 10 5. However, TSV redundancies are required in cost-efficiency terms. In the case of no TSV redundancy, the 3-D IC should be discarded even though only one TSV has a defect. Even if the defect rate of one TSV is very low, the de-

460 IEEE TRANSACTIONS ON RELIABILITY, VOL. 66, NO. 2, JUNE 2017 B. Compaction Compaction schemes are applied to reduce the channel width for data observation. Fig. 2(a) shows a structure example of single-output compactor (SOC). In the compaction theory, the compactor matrix represents the connection among compactor inputs and outputs. The number of rows in the compactor should be equal to that of compactor inputs, while columns match compactor outputs. Therefore, each row or each column in the compactor matrix signifies an input or an output of the compactor. And, each value stands for whether the corresponding input and output are directly connected or not ( connected : 1, unconnected : 0). The compactor shown in Fig. 2(a) is composed of eight inputs and one outputs, and so the compactor matrix of this compactor should contain eight rows and only one column. All values in the matrix should be 1 s because all inputs affect the output in this compactor. This compactor is able to detect odd-numbered defects or errors with no diagnosis. On the other hand, the multiple-output compactors support defect or error diagnosis. To prove that a multiple-output compactor ensures defect or error diagnosis, the corresponding compactor matrix must satisfy the following conditions. Condition 1: Each row contains at least one 1. Condition 2: All rows are distinct. Condition 3: Each row includes odd-numbered 1 s. A row filled with only 0s which does not meet Condition 1 stands for that the corresponding compactor input has no influence on any compactor outputs, and it also means that the defects or errors through this input are undetectable with this compactor. If some rows violate Condition 2, the defects or errors through the corresponding inputs are impossible to be classified. Furthermore, the defects or errors are undetectable when the defects or errors are propagated simultaneously to even-numbered compactor inputs. The compactor matrix containing some rows with even-numbered 1 s against Condition 3 cannot guarantee defect or error detection when defects or errors are propagated to the plural compactor inputs over three. Fig. 2(b) describes a multiple-output compactor satisfying all conditions. The compactors under all conditions guarantee defect or error detection if defects or errors are propagated simultaneously to two- or odd-numbered inputs. In [19], the maximum number of compactor inputs (CI max ) with m compactor outputs is defined as CI max =2 m 1. (1) Fig. 2. Compactors. (a) Example of SOCs. (b) Example of multiple-output compactors. fect occurrence probability on at least one TSV in a 3-D IC is not ignorable. In other words, removing repair system can take immediate cost saving, but it calls eventually huge loss from the yield drop of 3-D IC integration. Therefore, redundant TSVs are mandatory even if the TSV defect rate is quite low. After the TSV repair process, these residual TSV redundancies descend to unnecessary metal lines in the IC. C. Motivation The need for reliability enhancements in 3-D ICs has increased, and some defect or error detection circuits are required to satisfy that need. For this detection circuit, additional connection lines are required for transmitting comparison data from a layer to another layer. Incidentally, the TSV defect rate is quite low, and many TSV redundancies are abandoned. This fact is called the inefficiency in TSV redundancy utilization [22]. This paper proposes a repairable and reliable TSV set (R 2 - TSV) structure that supports all previous TSV repair processes. R 2 -TSV reduces the inefficiency of TSV redundancies by reutilizing residual TSV redundancies, and it raises the reliability of TSV sets by comparing the compacted data of inputs and outputs. III. PROPOSED TSV SET STRUCTURE R 2 -TSV proposes a TSV set structure that supports TSV repair and can detect defects or errors. This paper proposes the following two concepts, which are indicated in Sections III-A and III-B. The concept proposed in Section III-A uses SOCs to compact data, whereas the other concept adopts a multiple-output compactor. The main purpose of R 2 -TSV is the defect/error detection during the operation of 3-D IC products, and defects from aging or soft errors which cause system malfunction can be detected if they affect TSV values. A. R 2 -TSV at the Set Level For easy application to previous repair TSV sets, R 2 -TSV can be applied to TSV sets individually. Fig. 3(a) shows an overall TSV set structure of set-level R 2 -TSV; this TSV set is the jth set of s TSV sets. A TSV set includes s signal TSVs and r TSV redundancies, so the maximum number of available

PARK et al.: R 2 -TSV: A REPAIRABLE AND RELIABLE TSV SET STRUCTURE REUTILIZING REDUNDANCIES 461 Fig. 3. Proposed TSV set structure. (a) TSV set structure. (b) Result collection. SOCs is r. The comparison result (R) is obtained by comparing the compacted input data with the compacted output data. The comparison results are 0s in the case of no defect or error, but 1 s can be observed at defect or error occurrences. For this comparison, a connection line between two layers is required because the compacted data of the one layer should be transmitted to the other layer. A residual TSV redundancy is adopted as that connection line if any TSV redundancies are unused in the repair process. The switch/fuse boxes that are composed of transistors or MUXes determine the connections between inputs/outputs and TSVs for supporting TSV repair; they also assign the route of the compactor output. All comparisons are executed if the number of residual TSV redundancies is m or more. However, some comparisons cannot be available if fewer than m TSV redundancies are left after the repair process. For that case, an enable signal for the final XOR function, en, is designed. If there are any invalid comparisons, the corresponding enable signals are set to 0 to hold the related comparison results at 0. The results of comparison (Rs) ofs TSV sets are collected, as shown in Fig. 3(b). An error or defect occurrence is detected by analyzing E T, which is an OR function output of all R values from all TSV sets. E T sends 1 whenever at least one bit of comparison results from all TSV sets contains 1. After observing 1onE T, the TSV sets where defects or errors are involved can be diagnosed by serially shifting out the results in a register through E U, if the analysis is necessary. Fig. 4 presents two examples of set-level R 2 -TSV.Fig.4(a) describes an example with a TSV set structure that contains Fig. 4. Examples of set-level R 2 -TSV. (a) One compactor, two redundancies. (b) Three compactors, three redundancies. six signal TSVs and two TSV redundancies. In this example, one SOC with six inputs is inserted into both layers to compact the TSV inputs and outputs, and the compacted 1-bit-data of the inputs is compared with that of the outputs. This simple example can detect the odd-numbered defects or errors because a SOC is applied. Therefore, only one residual TSV redundancy is required to achieve the comparison. The set-level R 2 -TSV structure can be extended when improved defect or error coverage is requested. The compactors as many as residual TSV redundancies can be available and additional XOR modules increase the defect/error detection coverage. Fig. 4(b) describes another example composed of six TSVs and

462 IEEE TRANSACTIONS ON RELIABILITY, VOL. 66, NO. 2, JUNE 2017 Fig. 5. Redundancy-sharing structure. three TSV redundancies with three SOCs. To guarantee coverage increment, all SOCs should cover different input/output combinations. The first compactor, which has the highest priority, should be connected to all TSV inputs or outputs. This requirement guarantees the detection of odd-numbered defects or errors even if only one comparison is available. Then, the detection of half of the even-numbered defects or errors is covered with an additional compactor that covers three inputs or outputs (second XOR module) if two TSV redundancies are available. In the ideal case, a third compactor can cover more than half of the remaining undetectable cases when all comparisons are accomplished. This concept is proved in Section IV. B. Redundancy-Sharing R 2 -TSV There are some limits in the R 2 -TSV structure that was introduced in Section III-A. First, full comparison circuit implementation can fail because some TSV sets can have no residual TSV redundancy. Thus, an imbalance in secure reliability can occur. Second, SOCs can guarantee limited defect or error coverage. If multiple-output compactors are applied, high and stable coverage will be obtained. However, the number of TSV redundancies in a TSV set is not enough to build comparison circuits with multiple-output compactors. To overcome these limits, R 2 -TSV presents an enhanced TSV set structure that shares the redundancies of multiple TSV sets. Fig. 5 shows the overall TSV set structure of redundancy-sharing R 2 -TSV. Multiple-output compactors are located in both layers, and the switch/fuse box assigns connections between compactor and residual TSV redundancies, not of a TSV set but of multiple TSV sets. This structure can use much more residual TSV redundancies for a compactor. Some examples of redundancy-sharing R 2 -TSV are shown in Fig. 6. In the example of Fig. 6(a), with 128 signal TSVs and 32 TSV redundancies, a 1-D repair technique is applied, and a TSV set is composed of four signal TSVs and one redundant TSV. From (1), 128 signals can be covered by an eight-output Fig. 6. Examples of redundancy-sharing R 2 -TSV. (a) 1-D repair (128 STSVs, 32 RTSVs). (b) 2-D repair (128 STSVs, 32 RTSVs). (c) 2-D repair (128 STSVs, 64 RTSVs). compactor. Thus, each compactor output can be assigned to one of the four TSV redundancies. Full comparison will also fail if the four TSV redundancies are all occupied in the TSV repair step. However, the occurrence of full-comparison failure is extremely low in the redundancy-sharing structure, as will be discussed in Section IV. Fig. 6(b) and (c) describes the examples of redundancy-sharing R 2 -TSV with a 2-D repair scheme. Two TSV sets with 2-D repair structures (8 8) share TSV redundancies in Fig. 6(b), and eight TSV sets (4 4) with an identical number of signal TSVs exist in a group of Fig. 6(c). With the second 2-D repair structure, there are 64 redundant TSVs in an R 2 -TSV group, so each compactor output can be assigned to one of the eight TSV redundancies. This enhanced TSV set guarantees the detection of not only an odd number but also of two defects or errors, because the multiple-output compactors are implemented in it.

PARK et al.: R 2 -TSV: A REPAIRABLE AND RELIABLE TSV SET STRUCTURE REUTILIZING REDUNDANCIES 463 TABLE I EXAMPLES OF EXTENDED R 2 -TSV Fig. 7. Online test flow with R 2 -TSV. C. Implementation and Application To build a repair system, all TSVs are divided into sets which contain the fixed number of signal TSVs and redundant TSVs, as shown in Fig. 1(a). The application of R 2 -TSV is based on this assumption, and the proposed scheme is applied to all TSV sets. Therefore, regardless of the total number of TSVs in the circuits, intellectual properties (IPs), or processors, R 2 -TSV can be easily implemented. On the contrary, the more the R 2 -TSV required, the more TSVs are constructed in a chip. In the case of huge number of TSVs in a 3-D IC, the adoption of reliability guarantee techniques of TSV is strongly recommended because malfunction threat from TSVs becomes larger. R 2 -TSV is a viable solution with no additional TSV implementation for this problem. R 2 -TSV can be applied to any repair structures which contain TSV redundancies. TSV test techniques which are involved in wafer-level tests are very dependent on the 3-D IC integration process. But, this proposed TSV set structure is utilized for both online test and soft error detection after manufacturing. Therefore, this proposed scheme is independent of the integration methods. R 2 -TSV can improve the reliability of TSV sets through soft error detection and online test. At first, R 2 -TSV can conduct simple and fast online test by the comparison between compactor outputs. As shown in Fig. 7, an online test with R 2 -TSV is executed through the following three steps. Step 1: Monitoring E T E T is observed constantly in the test time, and the occurrence of defects or errors in whole TSV sets can be recognized. Thus, the online test with p test patterns requests p observations through E T for only the fault-existence check. Step 2: Finding faulty TSV sets For faulty TSV set diagnosis, all bits of R values are necessary to be checked. These bits are stored in a serial flip- flop chain which has an output E U, as shown in Fig 3(b). Assume that n TSV sets which contain compactors with s x outputs are constructed in the target 3-D IC. Then, n s x clocks are required for shift-out of R values. This step is executed only after 1 value is collected on E T in Step 1. Step 3: Detail diagnosis (optional) A detail TSV diagnosis can be fulfilled to find faulty TSVs by utilizing test circuits that are built in for TSV test. This step is not necessary if detail fault location is not requested. Some sporadic malfunctions may be generated even though the target ICs include no defect. This phenomenon usually results from soft errors which occur by external causes. This malfunction from soft errors is impossible to be blocked with normal tests because this malfunction occurs intermittently. To detect and block this problem, the relevant signals should be always monitored in system operation. R 2 -TSV is able to detect soft errors of TSVs because signals connected to TSVs can be observed all the time by checking simple data from R 2 -TSV. The involved tasks stop and restart to block malfunctions whenever the occurrences of soft errors are detected. To reduce the range of involved tasks, faulty TSV set diagnosis can be performed just like Step 2 of online test flow. The analysis of R provides the information that indicates which TSV sets generated soft errors; then, the parts or IPs related with those TSV sets can be found. From this analysis, fewer tasks should restart, so unnecessary task executions can be avoided. IV. EXPERIMENTAL RESULTS Set-level R 2 -TSV can raise the defect or error coverage and utilization ratio of unused TSV redundancies by using more SOCs, as shown in Fig. 4(b). Table I shows the defect or error coverage in the set-level R 2 -TSV example including six TSVs and three TSV redundancies, as shown in Fig. 4(b). The defect or error detection coverage is more improved as more unused TSV redundancies are available. Thirty-two cases of occurrence of defect or error can be recognized with only one fully covered SOC because the only odd-numbered defects or errors are possible to be detected. In addition, 16 and 8 additional defect or error cases are covered, respectively, if one and two outputs which are partially covered are available. Thus, R 2 -TSV ensures almost 90% detection coverage when three residual TSV redundancies are available in the example. If N SOC SOC are used for a TSV set that includes s TSVs, the total defect or error coverage (C T ) is defined as ( C T = 2s 2 N SOC 1 ) 2 N SOC (2s 1). (2) The detection coverages according to the number of defects or errors vary in different characteristics of the partial compactor

464 IEEE TRANSACTIONS ON RELIABILITY, VOL. 66, NO. 2, JUNE 2017 TABLE II COMPARISON ACCORDING TO THE NUMBER OF SECOND XOR TREE INPUTS IN THE CASE OF A SIX-TSV SET TABLE IV HARDWARE COST COMPARISON (CELLS) TABLE V COMPARISON BETWEEN SET-LEVEL AND R-SHARING R 2 -TSV TABLE III DEFECT COVERAGE ACCORDING TO THE NUMBER OF TSVS IN THE CASE OF TWO RESIDUAL TSV REDUNDANCIES when two residual TSV redundancies are available. Table II shows the coverage difference when the number of inputs of partial compactors is two, three, and five in the case of a TSV set that includes six TSVs. The result of a four-input compactor is the same as that of a two-input compactor. The compactors receive only mismatched values simultaneously in the case of six defects or errors occurrence because the mismatched values are transmitted to all the signals. Therefore, the compactors which have odd-numbered inputs receive odd-numbered mismatched values, and they detect the six defect or error occurrence. With afullxor tree and a second XOR tree, different second XOR trees result in different detectable cases, but the total number of detectable cases is constant when the number of signals in a TSV set is fixed and also identical. Therefore, the overall defect or error coverage is fixed at 76.2%, as shown in Table I. The compactor with three inputs will be the most useful if the probability is higher that fewer defects or errors occur. However, the compactor with five inputs can be the best one if defects or errors are usually generated in an assembled group. Table III shows the defect or error coverage results with various numbers of TSVs in a TSV set when there are two remaining TSV redundancies. The compactors that can catch fewer defects or errors are chosen. The overall coverage of all cases is similar, approximately 50%. In addition, the defect or error coverages according to the number of defects or errors are steady near 50%. Area cost comparison is presented in Table IV. To verify hardware cost for the proposed scheme, the SAED 32/28 nm EDK, which is an open educational design kit, is employed. The number of signal TSVs is assumed to be 128, 256, and 512. For the redundancy-sharing R 2 -TSV, all signal TSVs are included in a group. Additionally, it is assumed that a TSV set composed of four signal TSVs and one redundant TSV, as shown as Fig. 6(a). The 1-D repair structure is small compared to the 2-D repair structure because 2-D repair requires three 3-to-1 MUXes for the signal TSVs. HW1 add stands for the additional hardware cost of the basic R 2 -TSV, and HW2 add means that of redundancy-sharing R 2 -TSV. HW2 add is much greater than HW1 add because the redundancy-sharing R 2 -TSV includes multiple-output compactors that are much larger than the SOCs. As shown in Table V, a simulation was executed to compare the redundancy-sharing R 2 -TSV with the set-level R 2 -TSV. In this simulation, a TSV set is composed of four signal TSVs and one redundant TSV, and a redundancy-sharing R 2 -TSV group includes 128 signal TSVs and 32 redundant TSVs, as shown in Fig. 6(a). The TSV defect rate is assumed to be 0.001 in this simulation. The redundancy-sharing R 2 -TSV uses multiple-output compactors, so it detects all two defects or errors additionally. Commonly, the defect rate and error probability for TSVs is low, and so the occurrence of four or more defects or errors is extremely rare. For a full detection, all redundancies should be available for the basic R 2 -TSV, but only eight redundancies are required for redundancy-sharing R 2 -TSV. Thus, there is a large difference in full detection probability. In fact, the probability value for redundancy-sharing R 2 -TSV is close to 100%. To clarify this point, the full detection failure probabilities are calculated in Table VI. Defect rate of the TSVs was varied from 0.0001 to 0.03 within the practical TSV defect rate range mentioned in [6]. Table VI shows how small the full detection failure probability is. In the identical condition of simulation related to Table V, the full detection failure probability depends strongly

PARK et al.: R 2 -TSV: A REPAIRABLE AND RELIABLE TSV SET STRUCTURE REUTILIZING REDUNDANCIES 465 TABLE VI PROPORTION ANALYSIS OF FULL DETECTION FAILURE IN R-SHARING R 2 -TSV TABLE VIII HARDWARE COST ANALYSIS IN SAMPLE CIRCUITS TABLE VII PROPORTION ANALYSIS OF FULL DETECTION FAILURE IN MASS TSVS TABLE IX YIELD ANALYSIS on the IC process quality. Full detection probability is degenerated as the TSV defect rate becomes worse. However, even in the worst case, the failure probability is still very low. Table VII shows that the R-sharing R 2 -TSV set can be applied practically to products even if the products contain huge number of TSVs. The TSV defect rate is varied from 0.0001 to 0.01 for evaluation in various condition of 3-D IC process quality. In the same manner with Table VI, the full detection failure rate is estimated, and a group of R-sharing R 2 -TSV set includes 128 signal TSVs and 32 redundancies, as shown in Fig. 6(a). In the high-quality process, the failure rate is ignorable even with 2560 signal TSVs. On the other hand, low-quality process causes much higher failure rate, but this rate values are still not enough to bring big concerns. The additional hardware cost can bring reliability degradation. It is known that this degradation increases in linear proportion to physical hardware overhead [23]. Table VIII shows physical hardware cost estimation of three cases of TSV set structures. For this hardware cost analysis, three 3-D IC designs, CKT_A, CKT_B, and CKT_C are employed, and all designs contain hundreds of TSVs. At first, the repair structure requires about 1% hardware overhead compared with the design with only signal TSVs. This overhead includes additional area for redundant TSVs. R-sharing R 2 -TSV set needs extra hardware for building reliability enhancement circuits, and the increment rate of hardware area is estimated as shown in the last column. In this experiment, the R-sharing R 2 -TSV requires around 2% more hardware area, and then the reliability degradation is expected as much as the area increment. This cost is not an ignorable drawback from the proposed TSV set implementation. However, the yield enhancement from the TSV repair solution is enormous, as shown in Table IX. In this simulation, the TSV defect rate is set up as 0.001. This enhancement is much higher than the cost from additional hardware area, so the TSV repair structure is highly efficient in the view of cost. In the TSV set structures which support TSV repair, the R-sharing R 2 -TSV structure requires more hardware area by about 0.7% than the only repairable TSV set. But, the online test after IC manufacturing is available in the R-sharing R 2 -TSV structure. Furthermore, the proposed scheme raises system reliability by soft error detection. Therefore, the proposed scheme is cost effective even though the additional hardware area is required. V. CONCLUSION In the 3-D IC manufacturing flow, the TSVs that contain defects are repaired by using TSV redundancies after faulty TSVs are analyzed in the TSV test. In the previous repairable TSV set, there is no other use for unused TSV redundancies in a TSV repair. These residual TSV redundancies can be utilized with a new TSV set. In this paper, a new TSV set structure, R 2 -TSV is proposed, which raises the reliability of 3-D ICs by reutilizing residual TSV redundancies. R 2 -TSV is still repairable by supporting any TSV repair structure, and it is reliable by supporting online test and soft error detection. At first, set-level R 2 -TSV is introduced, and it is applied to an each TSV set with a SOC. Moreover, the extended set-level structure is suggested to increase defect or error detection coverages. Finally, to maximize the efficiency of TSV redundancy utilization, the redundancy-sharing structure is proposed using multiple-output compactors. This TSV set structure guarantees full detection possibility over 99.9% in the practical TSV implementation environment.

466 IEEE TRANSACTIONS ON RELIABILITY, VOL. 66, NO. 2, JUNE 2017 TABLE X PROPORTION ANALYSIS OF FULL DETECTION FAILURE IN R-SHARING R2-TSV As mentioned in Table X, R 2 -TSV including set-level and redundancy-sharing structures supports TSV repair for satisfying yield, and utilizes unused TSV redundancies to improve reliability of TSV set. In addition, the reliability improvement results from online test and soft error detection with R 2 -TSV, and, especially practical and stable reliability guarantee can be achieved in redundancy-sharing R 2 -TSV. In the proposed TSV set structure, test results are collected from two outputs of set structure, E T and E U, and the data from the two outputs can be analyzed in different priority according to time cost importance. However, an extra hardware area is requested for compactors and switch or fuse boxes. R 2 -TSV is expected to be more promising as the significance of system reliability rises. [12] L. Jiang, Q. Xu, and B. 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Wu, A built-in selftest scheme for the post-bond test of TSVs in 3D ICs, in Proc. VLSI Test Symp., 2011, pp. 20 25. [5] B. Noia, K. Chakrabarty, S. K. Goel, E. J. Marinissen, and J. Verbree, Test-structure optimization and test scheduling for TSV-based 3-D stacked ICs, IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 30, no. 11, pp. 1705 1718, Nov. 2011. [6] C. Wang et al., BIST methodology, architecture and circuits for pre-bond TSV testing in 3D stacking IC systems, IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 62, no. 1, pp. 139 148, Jan. 2015. [7] C. Chi, E. J. Marinissen, S. K. Goel, and C. Wu, Low-cost post-bond testing of 3-D ICs containing a passive silicon interposer base, IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 22, no. 11, pp. 2388 2401, Nov. 2014. [8] B. Noia, S. Panth, K. Chakrabarty, and S. Lim, Scan test of die logic in 3-D ICs using TSV probing, IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 23, no. 2, pp. 317 330, Feb. 2015. [9] Q. Xu, L. Jiang, H. Li, and B. Eklow, Yield enhancement for 3D-stacked ICs: recent advances and challenges, in Proc. Des. Autom. Conf., 2012, pp. 731 737. [10] J. Zhang, L. Yu, H. Yang, Y. L. Xie, and F. B. Zhou, Self-test method and recovery mechanism for high frequency TSV array, in Proc. IEEE/IFIP 19th Int. Conf. VLSI Syst.-Chip, 2011, pp. 260 265. [11] U. Kang et al., 8 Gb 3-D DDR3 DRAM using through-silicon-via technology, IEEE Trans. J. Solid-State Circuits, vol. 45, no. 1, pp. 111 119, Jan. 2010. Jaeseok Park received the B.S. degree in electrical and electronic engineering from Yonsei University, Seoul, South Korea, in 2008. He is currently working toward the combined Ph.D. degree in the Department of Electrical and Electronic Engineering, Yonsei University. His current research interests include design for testability, built-in self-test, reliability, test algorithms, through-silicon via test, through-silicon via repair, and very large scale integration design. Minho Cheong received the B.S. degree in electrical and electronic engineering from Yonsei University, Seoul, South Korea, in 2015. He is currently working toward the combined Ph.D. degree in the Department of Electrical and Electronic Engineering, Yonsei University. His current research interests include through-silicon via repair, reliability, and very large scale integration design. Sungho Kang (M 89 SM 15) received the B.S. degree from Seoul National University, Seoul, South Korea, and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of Texas at Austin, Austin, TX, USA, in 1992. He was a Research Scientist in the Schlumberger Laboratory for Computer Science, Schlumberger Inc., Austin, and a Senior Staff Engineer with Semiconductor Systems Design Technology, Motorola Inc., Austin. Since 1994, he has been a Professor in the Department of Electrical and Electronic Engineering, Yonsei University. His current research interests include very-large-scale integration/system-on-chip/3-d IC design and testing, design-for-testability, design-for-manufacturability, and fault tolerant computing.