TL61 TL61A - TL61B LOW POWER J-FET SINGLE OPERATIONAL AMPLIFIERS VERY LOW POWER CONSUMPTION : µa WIDE COMMON-MODE (UP TO V + CC ) AND DIFFERENTIAL VOLTAGE RANGES LOW INPUT BIAS AND OFFSET CURRENTS OUTPUT SHORT-CIRCUIT PROTECTION HIGH INPUT IMPEDANCE J-FET INPUT STAGE INTERNAL FREQUENCY COMPENSATION LATCH UP FREE OPERATION HIGH SLEW RATE : 3.5V/µs DESCRIPTION The TL61, TL61A and TL61B are high speed J-FET input single operational amplifiers family. Each of these J-FET input operational amplifiers incorporates well matched, high voltage J-FET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient. PIN CONNECTIONS (top view) ORDER CODE N DIP8 (Plastic Package) D SO8 (Plastic Micropackage) Package Part Number Temperature Range N D TL61M/AM/BM -55 C, +125 C TL61I/AI/BI - C, +5 C TL61C/AC/BC C, +7 C Example : TL61IN N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) 1 2 3 8 7 6 5 1 - Offset null 1 2 - Inverting input 3 - Non-inverting input - - 5 - Offset null 2 6 - Output 7 - + 8 - N.C. November 1 1/9
SCHEMATIC DIAGRAM 2 Ω Inverting Input Non-inverting Input 6 Ω Output 5k Ω 27 Ω 3.2k Ω.2k Ω Ω Offset Null 1 Offset Null 2 INPUT OFFSET VOLTAGE NULL CIRCUIT TL61 N1 N2 k Ω ABSOLUTE MAXIMUM RATINGS Symbol Parameter TL61M, AM, BM TL61I, AI, BI TL61C, AC, BC Unit Supply voltage - note 1) ±18 V V i Input Voltage - note 2) ±15 V V id Differential Input Voltage - note 3) ±3 V P tot Power Dissipation 68 mw Output Short-circuit Duration - note ) Infinite T oper Operating Free-air Temperature Range -55 to +125 - to +5 to +7 C T stg Storage Temperature Range -65 to +15 C 1. All voltage values, except differential voltage, are with respect to the zero reference level (ground) of the supply voltages where the zero reference + level is the midpoint between and V - CC. 2. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts, whichever is less. 3. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded 2/9
ELECTRICAL CHARACTERISTICS = ±15V, (unless otherwise specified) Symbol Parameter Input Offset Voltage (R s = 5Ω) V io 3 6 T min T amb T max 9 DV io Temperature Coefficient of Input Offset Voltage (R s = 5Ω) I io Input Offset Current- note 1) T min T amb T max TL61M TL61I TL61C Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 3 6 9 3 15 Unit mv µv/ C 5 Input Bias Current -note 1 I ib 3 T min T amb T max 5 V icm V opp A vd Input Common Mode Voltage Range Output Voltage Swing (R L = kω) T min T amb T max Large Signal Voltage Gain R L = kω, V o = ±V, T min T amb T max ±11.5 +15-12 27 6 ±11.5 +15-12 5 3 27 6 3 3 ±11 +15-12 5 5 3 1. The input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible. pa na pa na V 27 V Gain Bandwidth Product GBP, R L =kω, C L = pf 1 1 1 MHz R i Input Resistance 12 12 12 Ω CMR SVR I CC P D SR t r Common Mode Rejection Ratio R S = 5Ω 8 86 8 86 7 76 Supply Voltage Rejection Ratio R S = 5Ω 8 95 8 95 7 95 Supply Current, no load, no load, no signal 25 25 25 Total Power Consumption, no load, no signal 6 7.5 6 7.5 6 7.5 Slew Rate V i = V, R L = kω, C L = pf, A v = 1 1.5 3.5 1.5 3.5 1.5 3.5 Rise Time V i = mv, R L = kω, C L = pf, A v = 1.2.2.2 Overshoot Factor (see figure 1) K ov V i = mv, R L = kω, C L = pf, A v = 1 e n Equivalent Input Noise Voltage R S = Ω, f = 1KHz 2 2 2 6 V/mV db db µa mw V/ µs % nv ----------- Hz 3/9
ELECTRICAL CHARACTERISTICS = ±15V, (unless otherwise specified) Symbol Parameter V io Input Offset Voltage (R s = 5Ω) T min T amb T max 3 6 7.5 TL61AC, AI, AM TL61BC, BI, BM Unit Min. Typ. Max. Min. Typ. Max. 2 3 5 DV io Temperature Coefficient of Input Offset Voltage (R s = 5Ω) µv/ C I io Input Offset Current - note 1) T min T amb T max 5 3 Input Bias Current -note 1 I ib 3 T min T amb T max 7 V icm V opp A vd Input Common Mode Voltage Range Output Voltage Swing (R L = kω) T min T amb T max Large Signal Voltage Gain R L = kω, V o = ±V, T min T amb T max ±11.5 +15-12 27 6 ±11 +15-12 5 3 3 7 Gain Bandwidth Product MHz GBP, R L =kω, C L = pf 1 1 R i Input Resistance 12 12 Ω CMR SVR I CC P D SR t r Common Mode Rejection Ratio R S = 5Ω 8 86 8 86 Supply Voltage Rejection Ratio R S = 5Ω 8 95 8 95 Supply Current, no load, no load, no signal 25 25 Total Power Consumption, no load, no signal 6 7.5 6 7.5 Slew Rate V i = V, R L = kω, C L = pf, A v = 1 1.5 3.5 1.5 3.5 Rise Time V i = mv, R L = kω, C L = pf, A v = 1.2.2 K ov Overshoot Factor (see figure 1) V i = mv, R L = kω, C L = pf, A v = 1 e n Equivalent Input Noise Voltage R S = Ω, f = 1KHz 2 2 1. The input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible. 27 6 mv pa na pa na V V V/mV db db µa mw V/µs µs % nv ----------- Hz /9
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE versus SUPPLY VOLTAGE MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE versus FREE AIR TEMPERATURE MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE versus LOAD RESISTANCE MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE versus FREQUENCY DIFFERENTIAL VOLTAGE AMPLIFICATION versus FREE AIR TEMPERATURE LARGE SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT versus FREQUENCY 5/9
SUPPLY CURRENT PER AMPLIFIER versus SUPPLY VOLTAGE SUPPLY CURRENT PER AMPLIFIER versus FREE AIR TEMPERATURE 25 25 SUPPLY CURRENT (µa) 15 5 T amb = +25 C No signal No load 2 6 8 12 1 16 SUPPLY VOLTAGE ( V) SUPPLY CURRENT (µa) 15 5 No signal No load = 15V -75-5 -25 25 5 75 125 FREE AIR TEMPERATURE ( C) TOTAL POWER DISSIPATED versus FREE AIR TEMPERATURE COMMON MODE REJECTION RATIO versus FREE AIR TEMPERATURE TOTAL POWER DISSIPATED (mw) 3 25 15 5-75 = 15V No signal No load -5-25 25 5 75 125 FREE AIR TEMPERATURE ( C) COMMON MODE REJECTION RATIO (db) 87 86 85 8 83 82 81-75 = 15V R L = kω -5-25 25 5 75 125 FREE AIR TEMPERATURE ( C) NORMALIZED UNITY GAIN BANDWIDTH SLEW RATE, AND PHASE SHIFT versus TEMPERATURE INPUT BIAS CURRENT versus FREE AIR TEMPERATURE NORMALIZED UNITY-GAIN BANDWIDTH AND SLEW RATE 1.3 1.2 1.1 1 UNITY-GAIN-BANDWIDTH (left scale) PHASE SHIFT (right scale) SLEW RATE (left scale) 1.3 1.2 1.1.9 = 15V.99.8 R L = kω f = B for phase shift 1.98.7.97-75 -5-25 25 5 75 125 FREE AIR TEMPERATURE ( C) 1 NORMALIZED PHASE SHIFT INPUT BIAS CURRENT (na) = 15V 1.1.1-5 -25 25 5 75 125 FREE AIR TEMPERATURE ( C) 6/9
VOLTAGE FOLLOWER LARGE SIGNAL PULSE RESPONSE OUTPUT VOLTAGE versus ELAPSED TIME INPUT AND OUTPUT VOLTAGES (V) 6 2-2 - -6 INPUT = 15V R = kω L C L = pf T amb = +25 C OUTPUT 2 6 8 TIME (µs) OUTPUT VOLTAGE (mv) 28 2 16 12 8 - OVERSHOOT 9% = 15V R % L = k Ω T t amb = +25 C r.2..6.8 1 12 1 TIME ( µs) EQUIVALENT INPUT NOISE VOLTAGE versus FREQUENCY EQUIVALENT INPUT NOISE VOLTAGE (nv/vhz) 9 8 7 6 5 3 = 15V R S = Ω T amb = +25 C 1k k k k k FREQUENCY (Hz) PARAMETER MEASUREMENT INFORMATION Figure 1 : Voltage Follower Figure 2 : Gain-of- inverting amplifier k Ω e I 1k Ω - TL61 e o R L C L = pf 7/9
PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP Millimeters Inches Dimensions Min. Typ. Max. Min. Typ. Max. A 3.32.131 a1.51. B 1.15 1.65.5.65 b.356.55.1.22 b1..3.8.12 D.92.3 E 7.95 9.75.313.38 e 2.5. e3 7.62.3 e 7.62.3 F 6.6 26 i 5.8. L 3.18 3.81.125.15 Z 1.52.6 8/9
PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO) L C c1 a2 A a3 b s a1 b1 e3 E D M 8 5 F 1 Millimeters Inches Dimensions Min. Typ. Max. Min. Typ. Max. A 1.75.69 a1.1.25.. a2 1.65.65 a3.65.85.26.33 b.35.8.1.19 b1.19.25.7. C.25.5.. c1 5 (typ.) D.8 5..189.197 E 5.8 6.2.228.2 e 1.27.5 e3 3.81.15 F 3.8..15.157 L. 1.27.16.5 M.6.2 S 8 (max.) Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 1 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom http://www.st.com 9/9
This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.