NTNS36NZ Small Signal MOSFET V, 36 ma, Single N Channel, SOT 883 (XDFN3). x.6 x. mm Package Features Single N Channel MOSFET Ultra Low Profile SOT 883 (XDFN3). x.6 x. mm for Extremely Thin Environments Such as Portable Electronics Low R DS(on) Solution in the Ultra Small. x.6 mm Package.5 V Gate Drive These Devices are Pb Free, Halogen Free/BFR Free and are RoHS Compliant Applications High Side Switch High Speed Interfacing Level Shift and Translate Optimized for Power Management in Ultra Portable Solutions V (BR)DSS R DS(on) MAX I D Max.7 @.5 V. @.5 V V 36 ma. @.8 V. @.5 V N CHANNEL MOSFET D (3) MAXIMUM RATINGS ( unless otherwise stated) Parameter Symbol Value Unit Drain to Source Voltage V DSS V Gate to Source Voltage V GS ±8 V Continuous Drain Current (Note ) Power Dissipation (Note ) Steady State T A = 5 C I D 36 ma T A = 85 C 6 t 5 s T A = 5 C 7 Steady State T A = 5 C P D 55 mw G () S () Pulsed Drain Current Operating Junction and Storage Temperature t 5 s 7 t p = s I DM 8 ma T J, T STG 55 to 5 Source Current (Body Diode) (Note ) I S 9 ma Lead Temperature for Soldering Purposes (/8 from case for s) C T L 6 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Surface mounted on FR board using the minimum recommended pad size, or mm, oz Cu.. Pulse Test: pulse width 3 s, duty cycle % 3 SOT 883 (XDFN3) CASE 56CB ORDERING INFORMATION Device Package Shipping NTNS36NZT5G MARKING DIAGRAM 6 = Specific Device Code M = Date Code SOT 883 (Pb Free) 6 M 8 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8/D. Semiconductor Components Industries, LLC, 3 March, 3 Rev. Publication Order Number: NTNS36NZ/D
NTNS36NZ THERMAL RESISTANCE RATINGS Parameter Symbol Max Unit Junction to Ambient Steady State (Note 3) R θja 86 Junction to Ambient t 5 s (Note 3) R θja 575 3. Surface mounted on FR board using the minimum recommended pad size, or mm, oz Cu. C/W ELECTRICAL CHARACTERISTICS ( unless otherwise stated) Parameter Symbol Test Condition Min Typ Max Unit OFF CHARACTERISTICS Drain to Source Breakdown Voltage V (BR)DSS V GS = V, I D = 5 A V Drain to Source Breakdown Voltage Temperature Coefficient V (BR)DSS / I D = 5 A, ref to 5 C 3 T J mv/ C Zero Gate Voltage Drain Current I DSS V GS = V, V DS = V A Gate to Source Leakage Current I GSS V DS = V, V GS = ±5 V ± A ON CHARACTERISTICS (Note ) Gate Threshold Voltage V GS(TH) V GS = V DS, I D = 5 A.. V Negative Threshold Temperature Coefficient V GS(TH) /T J.8 V GS =.5 V, I D = ma.5.7 mv/ C V GS =.5 V, I D = ma.7. Drain to Source On Resistance R DS(on) V GS =.8 V, I D = 5 ma.. V GS =.5 V, I D = ma.. Forward Transconductance g FS V DS = 5 V, I D = ma.6 S Source Drain Diode Voltage V SD V GS = V, I S = ma.75. V CHARGES & CAPACITANCES Input Capacitance C ISS Output Capacitance C OSS V GS = V, freq = MHz, V DS = V 5. pf Reverse Transfer Capacitance C RSS 3. Total Gate Charge Q G(TOT).8 Threshold Gate Charge Q G(TH) V GS =.5 V, V DS = V;. Gate to Source Charge Q GS I D = ma. nc Gate to Drain Charge Q GD. SWITCHING CHARACTERISTICS, VGS =.5 V (Note ) Turn On Delay Time t d(on) Rise Time t r V GS =.5 V, V DD = V, Turn Off Delay Time t d(off) I D = ma, R G = 67 ns Fall Time t f 3. Switching characteristics are independent of operating junction temperatures
NTNS36NZ TYPICAL CHARACTERISTICS..9.8.7.6.5..3...5 V. V 3.5 V.5.5 V 3. V..5. V GS =. V.8 V.5 V. V.5 3...9 V DS = 5. V.8.7.6.5..3...5. T J = 55 C.5..5 3. V GS, GATE TO SOURCE VOLTAGE (V) Figure. On Region Characteristics Figure. Transfer Characteristics R DS(on), DRAIN TO SOURCE RESISTANCE ( ) 5..5. 3.5 3..5..5..5..5 I D = ma..5 V GS, GATE VOLTAGE (V) 3. 3.5..5 Figure 3. On Resistance vs. Gate to Source Voltage R DS(on), DRAIN TO SOURCE RESISTANCE ( ) 5..5. 3.5 3..5..5..5. V GS =.5 V..3. V GS =.8 V.5.6.7 V GS =.5 V V GS =.5 V.8.9 Figure. On Resistance vs. Drain Current and Gate Voltage. R DS(on), NORMALIZED DRAIN TO SOURCE RESISTANCE ( ).8.7 V GS =.5 V.6 I D = ma.5..3....9.8.7.6 5 5 5 5 75 T J, JUNCTION TEMPERATURE ( C) V GS =.8 V I D = 5 ma 5 Figure 5. On Resistance Variation with Temperature 5 I DSS, LEAKAGE (na) 6 8 T J = 5 C T J = 85 C 6 8 Figure 6. Drain to Source Leakage Current vs. Voltage 3
NTNS36NZ TYPICAL CHARACTERISTICS C, CAPACITANCE (pf) 35 3 5 5 5 C RSS C ISS C OSS 6 8 6 8...3..5.6.7.8.9 Figure 7. Capacitance Variation V GS = V f = MHz V GS, GATE TO SOURCE VOLTAGE (V) 5 3 Q GS V DS Q GD Q T V GS V DS = V I D =. A Q G, TOTAL GATE CHARGE (nc) Figure 8. Gate to Source and Drain to Source Voltage vs. Total Charge 8 6 t, TIME (ns) V GS =.5 V V DD = V t d(off) t f I S, SOURCE CURRENT (A).. T J = 55 C t r t d(on)..3..5.6.7.8.9... R G, GATE RESISTANCE ( ) V SD, SOURCE TO DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure. Diode Forward Voltage vs. Current V GS(th) (V).85.8.75.7.65.6.55.5.5 5 I D = 5 A 5 5 5 75 5 T J, JUNCTION TEMPERATURE ( C) Figure. Threshold Voltage 5.... V GS 8 V Single Pulse T C = 5 C R DS(on) Limit Thermal Limit Package Limit Figure. Maximum Rated Forward Biased Safe Operating Area s s ms ms dc
NTNS36NZ R(t), EFFECTIVE TRANSIENT THERMAL RESPONSE ( C/W) 9 8 7 6 5 3 Duty Cycle =.5.. E 6 E 5.5.. TYPICAL CHARACTERISTICS Single Pulse E E 3 E E E+ t, TIME (s) Figure 3. FET Thermal Response R JA = 86 C/W Steady State E+ E+ E+3 5
NTNS36NZ PACKAGE DIMENSIONS SOT 883 (XDFN3),.x.6,.35P CASE 56CB ISSUE A 3X PIN ONE REFERENCE. C. C. C. C e/ e X b. M C A B.5 M C D TOP VIEW A SIDE VIEW D 3X L NOTE 3 BOTTOM VIEW A B E E A C SEATING PLANE NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y.5M, 99.. CONTROLLING DIMENSION: MILLIMETERS. 3. EXPOSED COPPER ALLOWED AS SHOWN. MILLIMETERS DIM MIN MAX A.3. A..3 b.75. D.95.75 D.6 BSC e.35 BSC E.55.675 E.5.55 L.7.3 RECOMMENDED SOLDER FOOTPRINT* X.3 X....55 PACKAGE OUTLINE DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 87 USA Phone: 33 675 75 or 8 3 386 Toll Free USA/Canada Fax: 33 675 76 or 8 3 3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 8 8 9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 33 79 9 Japan Customer Focus Center Phone: 8 3 587 5 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NTNS36NZ/D