SALLEN-KEY LOW PASS FILTER

DATASHEET ISL28325, ISL28345 40V Low Power Dual and Quad Operational Amplifier The ISL28325 and ISL28345 are dual and quad general purpose amplifiers featuring low noise vs power consumption. The combination of low noise and small footprint provides the user with outstanding value and flexibility relative to similar competitive parts. Applications for this amplifier include active filters, medical and analytical instrumentation, power supply controls, and industrial controls. The ISL28325 is offered in 8 Ld SOIC and MSOP packages and the ISL28345 is offered in the 14 Ld SOIC package and operates over the -40 C to +125 C temperature range. Features FN7854 Rev 0.00 Input Offset Voltage..........................1mV, Max. Input Bias Current.......................... ±5nA, Max. Low Current Consumption....................... 500µA Voltage Noise................................. 9nV/Hz Wide Supply Range.........................4.5V to 40V Operating Temperature Range...........-40 C to +125 C Pb-Free (RoHS Compliant) Applications Analytical Instrumentation Medical Instrumentation Spectral Analysis Equipment Active Filter Blocks Thermocouples and RTD Reference Buffers Data Acquisition Power Supply Control C 1 8.2nF V + V IN R 1 R 2 1.84k 4.93k - + OUTPUT 3.3nF C 2 V - SALLEN-KEY LOW PASS FILTER (10kHz) FIGURE 1. TYPICAL APPLICATION FN7854 Rev 0.00 Page 1 of 10

Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING TEMP RANGE ( C) PACKAGE (Pb-Free) PKG. DWG. # ISL28325FBZ 28325 FBZ -40 to +125 8 Ld SOIC M8.15E ISL28325FUZ 8325Z -40 to +125 8 Ld MSOP M8.118B ISL28345FBZ 28345 FBZ -40 to +125 14 Ld SOIC MDP0027 NOTES: 1. Add -T* suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pbfree products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28325, ISL28345. For more information on MSL please see techbrief TB363. Pin Configurations ISL28325 (8 LD SOIC, MSOP) TOP VIEW V OUT _A 1 8 V+ -IN_A 2 - + 7 V OUT _B +IN_A 3 + - 6 -IN_B V - 4 5 +IN_B ISL28345 (14 LD SOIC) TOP VIEW V OUT _A 1 14 V OUT _D -IN_A +IN_A 2 3 A D - + + - 13 -IN_D 12 +IN_D V + 4 11 V - +IN_B -IN_B 5 6 - + + - B C 10 +IN_C 9 -IN_C V OUT _B 7 8 V OUT _C FN7854 Rev 0.00 Page 2 of 10

Pin Descriptions ISL28325 (8 LD SOIC, MSOP) ISL28345 (14 LD SOIC) PIN NAME EQUIVALENT CIRCUIT DESCRIPTION 3 3 +IN_A Circuit 1 Amplifier non-inverting input 5 5 +IN_B - 10 +IN_C - 12 +IN_D 4 11 V- Circuit 3 Negative power supply 2 2 -IN_A Circuit 1 Amplifier inverting input 6 6 -IN_B - 9 -IN_C - 13 -IN_D 8 4 V+ Circuit 3 Positive power supply 1 1 V OUT _A Circuit 2 Amplifier output 7 7 V OUT _B - 8 V OUT _C - 14 V OUT _D IN- 500 500 V+ IN+ V+ OUT V+ CAPACITIVELY COUPLED ESD CLAMP CIRCUIT 1 V- CIRCUIT 2 V- V- CIRCUIT 3 FN7854 Rev 0.00 Page 3 of 10

Absolute Maximum Ratings Maximum Supply Voltage......................................42V Maximum Differential Input Current.......................... 20mA Maximum Differential Input Voltage............................ 42V Min/Max Input Voltage........................ V- - 0.5V to V+ + 0.5V Max/Min Input current for Input Voltage >V+ or <V-................ ±20mA Output Short-Circuit Duration (1 output at a time)................ Indefinite ESD Rating Human Body Model........................................ 5kV Machine Model........................................... 300V Charged Device Model...................................... 2kV Thermal Information Thermal Resistance (Typical Notes 4, 5) JA ( C/W) JC ( C/W) 8 Ld SOIC............................ 125 65 8 Ld MSOP........................... 160 55 14 Ld SOIC........................... 73 45 Maximum Storage Temperature Range..............-65 C to +150 C Maximum Junction Temperature (T JMAX ).....................+150 C Pb-Free Reflow Profile............................... see link below http://www.intersil.com/pbfree/pb-freereflow.asp Recommended Operating Conditions Ambient Temperature Range (T A )...................-40 C to +125 C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 5. For JC, the case temp location is taken at the package top center. Electrical Specifications V S ± 5V and V S ± 15V, V CM = 0, V O = 0V, T A = +25 C, unless otherwise noted. Boldface limits apply over the operating temperature range, -40 C to +125 C. PARAMETER DESCRIPTION CONDITIONS MIN (Note 6) TYP MAX (Note 6) UNIT V OS Input Offset Voltage -1 0.1 1 mv TCV OS Input V OS Temperature Coefficient 4 15 µv/c I B Input Bias Current -5 0.2 5 na I OS Input Offset Current -5 0.2 5 na V CM Input Voltage Range -13 13 V CMRR Common-Mode Rejection Ratio V CM = -13V to +13V 80 100 db PSRR Power Supply Rejection Ratio V S = ±2.25V to ±20V 80 100 db A VOL Open-Loop Gain V O = -13V to +13V, R L =10k to ground 100 110 db V OH Output Voltage High R L = 10k to ground 13.0 13.5 V V OL Output Voltage Low R L = 10k to ground -13.7-13.5 V I S Supply Current/Amplifier 0.5 0.7 ma 0.9 ma I SC Short-Circuit 40 ma V SUPPLY Supply Voltage Range ± 2.25 ± 20 V AC SPECIFICATIONS GBWP Gain Bandwidth Product A V = 1k, R L = 2k 1.2 MHz SR Slew Rate, V OUT 20% to 80% A V = 11, R L = 2k V O = 4V P-P 0.4 V/µs e nvp-p Voltage Noise V P-P 0.1Hz to 10Hz 0.4 µv P-P e n Voltage Noise Density f = 1kHz 9 nv/ Hz in Current Noise Density f = 1kHz 0.1 pa/ Hz NOTE: 6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. FN7854 Rev 0.00 Page 4 of 10

Typical Performance Curves V S = ±15V, V CM = 0V, R L = Open, unless otherwise specified. OPEN LOOP GAIN (db)/phase ( ) 200 180 160 140 120 PHASE 100 80 60 40 20 0 GAIN -20 R L = 10k -40 C L = 10pF -60 SIMULATION -80-100 0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FIGURE 2. OPEN-LOOP GAIN, PHASE vs FREQUENCY, R L =10k C L = 10pF OPEN LOOP GAIN (db)/phase ( ) 200 180 160 140 120 PHASE 100 80 60 40 20 0 GAIN -20 R L = 10k -40 C -60 L = 100pF -80 SIMULATION -100 0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FIGURE 3. OPEN-LOOP GAIN, PHASE vs FREQUENCY, R L =10k C L = 100pF CMRR (db) 220 200 180 160 140 120 100 80 V S = ±15V V S = ±2.5V V S = ±5V 60 40 R L = INF 20 C L = 10pF SIMULATION 0 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) -10 0 5 10 15 20 25 30 35 40 TIME (µs) FIGURE 4. CMRR vs FREQUENCY, V S = ±2.25, ±5V, ±15V FIGURE 5. SMALL SIGNAL TRANSIENT RESPONSE, V S = ±5V, ±15V SMALL SIGNAL (mv) 60 50 40 30 20 10 0 V S = ±15V RL = 10k CL = 4pF AV = +1 V OUT = 50mV P-P LARGE SIGNAL (V) 2.4 2.0 1.6 1.2 0.8 0.4 0-0.4-0.8-1.2-1.6-2.0 V S = ±15V, RL = 2k, 10k V S = ±5V, RL = 2k, 10k CL = 4pF AV = +1 V OUT = 4V P-P -2.4 0 10 20 30 40 50 60 70 80 90 100 TIME (µs) FIGURE 6. LARGE SIGNAL TRANSIENT RESPONSE vs R L V S = ±5V, ±15V FN7854 Rev 0.00 Page 5 of 10

Applications Information Functional Description The ISL28325 and ISL28345 are dual and quad general purpose amplifiers featuring low noise vs power consumption. They are offered in industry standard pinouts in 8 Ld SOIC, 8 Ld MSOP and 14 Ld SOIC packages. Applications for this amplifier include active filters, medical and analytical instrumentation, power supply controls, and industrial controls.. Operating Voltage Range The devices are designed to operate over the 4.5V (±2.25V) to 40V (±20V) range over the -40 C to +125 C temperature range. For best amplifier performance, decouple the power supply with a 0.01µF or larger capacitors by placing them close to the supply pins of the amplifier. Input ESD Diode Protection The input terminals (IN+ and IN-) have internal ESD protection diodes to the positive and negative supply rails, series connected 500 current limiting resistors and an anti-parallel diode pair across the inputs. The series resistors limit the high feed-through currents that can occur in pulse applications when the input dv/dt exceeds the 0.4V/µs slew rate of the amplifier. Without the series resistors, the input can forward-bias the anti-parallel diodes causing current to flow to the output resulting in severe distortion and possible diode failure. In applications where one or both amplifier input terminals are at risk of exposure to high voltages beyond the power supply rails, current limiting resistors may be needed at the input terminal to limit the current through the power supply ESD diodes to 20mA max. FN7854 Rev 0.00 Page 6 of 10

Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest revision. DATE REVISION CHANGE 09/27/2011 FN7854.0 Initial Release Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL28325, ISL28345 To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff FITs are available from our website at: http://rel.intersil.com/reports/search.php Copyright Intersil Americas LLC 2011. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN7854 Rev 0.00 Page 7 of 10

Package Outline Drawing M8.15E 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09 4.90 ± 0.10 4 A DETAIL "A" 0.22 ± 0.03 B 6.0 ± 0.20 3.90 ± 0.10 4 PIN NO.1 ID MARK 5 1.27 0.43 ± 0.076 (0.35) x 45 4 ± 4 TOP VIEW 0.25 MCAB SIDE VIEW B 1.75 MAX 1.45 ± 0.1 0.175 ± 0.075 SIDE VIEW A 0.25 GAUGE PLANE C SEATING PLANE 0.10 C 0.63 ±0.23 (1.27) (0.60) DETAIL "A" (1.50) NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. (5.40) 2. 3. 4. 5. 6. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. Unless otherwise specified, tolerance : Decimal ± 0.05 Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. The pin #1 identifier may be either a mold or mark feature. Reference to JEDEC MS-012. TYPICAL RECOMMENDED LAND PATTERN FN7854 Rev 0.00 Page 8 of 10

Package Outline Drawing M8.118B 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE Rev 0, 7/11 3.0±0.10mm 5 8 A D 3.0±0.10mm 4.9±0.20mm 5 1.10 MAX DETAIL "X" PIN# 1 ID 0.15-0.05mm 1 2 B SIDE VIEW 2 0.65mm BSC TOP VIEW 0.95 REF H 0.86±0.05mm C GAUGE PLANE 0.25 SEATING PLANE 0.23-0.36mm 0.08 M C A-B D 0.10 ± 0.05mm 0.10 C 0.53 ± 0.10mm 3 ±3 SIDE VIEW 1 DETAIL "X" (0.65) (5.80) (4.40) (3.00) (0.40) NOTES: 1. Dimensions are in millimeters. 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSEY14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. 4. Plastic interlead protrusions of 0.15mm max per side are not included. (1.40) TYPICAL RECOMMENDED LAND PATTERN 5. 6. Dimensions are measured at Datum Plane "H". Dimensions in ( ) are for reference only. FN7854 Rev 0.00 Page 9 of 10

Small Outline Package Family (SO) A D h X 45 N (N/2)+1 E E1 PIN #1 I.D. MARK c A SEE DETAIL X B 1 0.010 M C A B (N/2) L1 C e H A2 SEATING PLANE GAUGE PLANE 0.010 0.004 C 0.010 M C A B b A1 DETAIL X L 4 ±4 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SO16 SO16 (0.300 ) SO20 SO24 SO28 SYMBOL SO-8 SO-14 (0.150 ) (SOL-16) (SOL-20) (SOL-24) (SOL-28) TOLERANCE NOTES A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX - A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 0.003 - A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 0.001 - D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 0.004 1, 3 E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 0.008 - E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic - L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 0.009 - L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference - N 8 14 16 16 20 24 28 Reference - Rev. M 2/07 NOTES: 1. Plastic or metal protrusions of 0.006 maximum per side are not included. 2. Plastic interlead protrusions of 0.010 maximum per side are not included. 3. Dimensions D and E1 are measured at Datum Plane H. 4. Dimensioning and tolerancing per ASME Y14.5M-1994 FN7854 Rev 0.00 Page 10 of 10