MITSBISHI SEMICODCTOR <Dual-In-Line ackage Intelligent ower ower Module> TYE TYE ITEGRTED OER FCTIOS 600/15 low-loss 5 th generation IGBT inverter bridge for 3 phase DC-to-C power conversion ITEGRTED DRIE, ROTECTIO D SYSTEM COTROL FCTIOS r upper-leg IGBTS : Drive circuit, High voltage isolated high-speed level shifting, Control supply under-voltage () protection. r lower-leg IGBTS : Drive circuit, Control supply under-voltage protection (), Short circuit protection (SC). (Fig.3) Fault signaling : Corresponding to an SC fault (Lower-side IGBT) or a fault (Lower-side supply). Input interface : 5 line CMOS/TTL compatible. (High ctive) L pproved : Yellow Card o. E80276 LICTIO C100~200 three-phase inverter drive for small power motor control. Fig. 1 CKGE OTLIES (30.5) 28 (1.778) 0.5 27 29 30 26 25 24 23 22 21 20 19 (1.778 26) HET SIK SIDE 18 16 1513 12 10 987 654 321 17 14 11 Type name, Lot o. 35 34 33 32 31 (7.62) (4.62) (1) (7.62 4) (41) (42) (49) (6.5) (10.5) (0.5) (0.5) (0.5) DMMY I (3.556) (1) (0.5) (17.6) (17.4) (HI2 DETH 2) (HI3.3) (17.6) (17.4) TERMIL (1.5) (0.278) (3.556) (2.056) (0.5) CB (1) TTER (1.5) SLIT (1.8MI) (ex. CB LYOT) ote1) Detail (5) (35 ) (1.2) (1.25) (2.5) HET SIK SIDE (R0.75) TERMIL CODE 1 FS 2 (G) 3 FB 4 1 5 (COM) 6 7 FS 8 (G) 9 FB 10 1 11 (COM) 12 13 FS 14 (G) 15 FB 16 1 17 (COM) 18 19 (G) 20 O ote2) 21 22 23 24 FO 25 26 CI 27 C 28 1 29 (G) 30 (G) 31 32 33 34 35 Dimensions in mm ote 1 : In order to get enough creepage distance between the terminals, please take some countermeasure such as a slit on CB. 2:Treat the terminal O of as C (just the same as ver.2). However, external connection of O with terminal is necessary for S21562 or S21563.
Fig. 2 ITERL FCTIOS BLOCK DIGRM (TYICL LICTIO EXMLE) C1 : Tight tolerance, temp-compensated electrolytic type (ote : The capacitance value depends on the M control scheme used in the applied system). C2 : 0.22~2µF R-category ceramic capacitor for noise filtering. Inrush current limiter circuit High-side input (M) (5 line) (ote 1,2) Input signal Input signal Input signal conditioning conditioning conditioning Level shifter Level shifter Level shifter rotection circuit () rotection circuit () rotection circuit () Drive circuit Drive circuit Drive circuit CB CB+ CB+ CB CB+ CB C2 C1 (ote 6) C line input Z Z : ZR (Surge absorber) C : C filter (Ceramic capacitor 2.2~6.5nF) (ote : dditionally, an appropriate line-to line surge absorber circuit may become necessary depending on the application environment). C C Low-side input (M) (5 line) (ote 1, 2) (ote 4) Fig. 3 1 CI Drive circuit Input signal conditioning logic rotection circuit FO Fault output (5 line) (ote 3, 5) Control supply nder-oltage protection H-side IGBTS L-side IGBTS (15 line) ote1: Input logic is high-active. There is a 2.5kΩ (min) pull-down resistor built-in each input circuit. hen using an external CR filter, please make it satisfy the input threshold voltage. 2: By virtue of integrating an application specific type HIC inside the module, direct coupling to C terminals without any opto-coupler or transformer isolation is possible. (see also Fig. 8) 3: This output is open collector type. The signal line should be pulled up to the positive side of the 5 power supply with approximately 10kΩ resistance. (see also Fig. 8) 4: The wiring between the power DC link capacitor and the 1 terminals should be as short as possible to protect the against catastrophic high surge voltages. r extra precaution, a small film type snubber capacitor (0.1~0.22µF, high voltage type) is recommended to be mounted close to these 1 DC power input pins. 5: output pulse width should be decided by putting external capacitor between and C terminals. (Example : =22nF tfo=1.8ms (Typ.)) 6: High voltage (600 or more) and fast recovery type (less than 100ns) diodes should be used in the bootstrap circuit. C D M C line output Fig. 3 EXTERL RT OF THE ROTECTIO CIRCIT Drive circuit Short Circuit rotective Function (SC) : SC protection is achieved by sensing the L-side DC-Bus current (through the external shunt resistor) after allowing a suitable filtering time (defined by the RC circuit). hen the sensed shunt voltage exceeds the SC trip-level, all the L-side IGBTs are turned OFF and a fault signal () is output. Since the SC fault may be repetitive, it is recommended to stop the system when the signal is received and check the fault. IC () H-side IGBTS SC rotection Trip Level External protection circuit L-side IGBTS 1 Shunt Resistor (ote 1) C C R Drive circuit CI B rotection circuit C (ote 2) ote1: In the recommended external protection circuit, please select the RC time constant in the range 1.5~2.0. 2: To prevent erroneous protection operation, the wiring of, B, C should be as short as possible. 0 Collector current waveform 2 tw ()
MXIMM RTIGS (Tj = 25 C, unless otherwise noted) IERTER RT Symbol Ratings CC CC(surge) CES ±IC ±IC C Tj Supply voltage Supply voltage (surge) Collector-emitter voltage Each IGBT collector current Each IGBT collector current (peak) Collector dissipation Junction temperature pplied between - pplied between - Tf = 25 C Tf = 25 C, less than 1ms Tf = 25 C, per 1 chip (ote 1) 450 500 600 15 30 22.2 20~+125 ote 1 : The maximum junction temperature rating of the power chips integrated within the is 150 C (@ Tf 100 C) however, to ensure safe operation of the, the average junction temperature should be limited to Tj(ave) 125 C (@ Tf 100 C). C COTROL (ROTECTIO) RT Symbol Ratings D DB I FO IFO SC Control supply voltage Control supply voltage Input voltage Fault output supply voltage Fault output current Current sensing input voltage pplied between 1-C, 1-C pplied between FB-FS, FB-FS, FB-FS pplied between,, -C,,, -C pplied between FO-C Sink current at FO terminal pplied between CI-C 20 20 0.5~D+0.5 0.5~D+0.5 1 0.5~D+0.5 TOTL SYSTEM Symbol Ratings Self protection supply voltage limit D = 13.5~16.5, Inverter part CC(ROT) Tj = 125 C, non-repetitive, less than 2 (short circuit protection capability) Tf Module case operation temperature (ote 2) C Tstg iso Storage temperature Isolation voltage 60Hz, Sinusoidal, C 1 minute, connection pins to heat-sink plate 400 20~+100 40~+125 2500 C rms ote 2 : Tf MESREMET OIT l Board Specification : Dimensions : 100 100 10mm, Finishing : 12s, arp : 50~100µm Control Terminals 18mm 16mm FDi Chip l Board IGBT/FDi Chip Groove IGBT Chip Temperature measurement point (inside the I board) ower Terminals Temperature measurement point (inside the I board) Silicon-grease should be applied evenly with a thickness of 100~200µm
THERML RESISTCE Symbol Rth(j-f)Q Rth(j-f)F Junction to case thermal resistance (ote 3) Inverter IGBT part (per 1/6 module) Inverter FDi part (per 1/6 module) ote 3: Grease with good thermal conductivity should be applied evenly with about +100µm~+200µm on the contacting surface of and heat-sink. Min. Typ. Max. 4.5 6.5 C/ C/ ELECTRICL CHRCTERISTICS (Tj = 25 C, unless otherwise noted) IERTER RT CE(sat) EC ton trr Symbol tc(on) toff tc(off) ICES Collector-emitter saturation voltage FDi forward voltage Switching times Collector-emitter cut-off current D = DB = 15 IC = 15, Tj = 25 C I = 5 IC = 15, Tj = 125 C Tj = 25 C, IC = 15, I = 0 CC = 300, D = DB = 15 IC = 15, Tj = 125 C, I = 0 5 Inductive load (upper-lower arm) CE = CES Tj = 25 C Tj = 125 C Min. Typ. Max. 0.60 1.45 1.55 1.50 1.20 0.30 0.40 1.50 0.50 1.95 2.05 2.00 1.80 0.60 2.10 0.80 1 10 COTROL (ROTECTIO) RT Symbol ID FOH FOL SC(ref) II DBt DBr Dt Dr tfo th(on) th(off) Circuit current Fault output voltage Short circuit trip level Input current Supply circuit under-voltage protection Fault output pulse width O threshold voltage OFF threshold voltage D = DB = 15 I = 5 D = DB = 15 I = 0 Total of 1-C, 1-C FB-FS, FB-FS, FB-FS Total of 1-C, 1-C FB-FS, FB-FS, FB-FS SC = 0, FO circuit pull-up to 5 with 10kΩ SC = 1, IFO = 1 Tj = 25 C, D = 15 (ote 4) I = 5 Trip level Tj 125 C Reset level Trip level Reset level = 22nF (ote 5) pplied between,, -C,,, -C Min. Typ. Max. 5.00 0.40 7.00 0.55 4.9 0.95 0.43 0.48 0.53 1.0 1.5 2.0 10.0 12.0 10.5 12.5 10.3 12.5 10.8 13.0 1.0 1.8 2.1 2.3 2.6 0.8 1.4 2.1 ote 4 : Short circuit protection is functioning only at the low-arms. lease select the value of the external shunt resistor such that the SC triplevel is less than 25.5. 5:Fault signal is output when the low-arms short circuit or control supply under-voltage protective functions operate. The fault output pulsewidth tfo depends on the capacitance value of according to the following approximate equation : = 12.2 10-6 tfo [F]. ms
MECHICL CHRCTERISTICS D RTIGS Mounting torque eight Heat-sink flatness Mounting screw : M3 Recommended 0.78 m (ote 6) Min. 0.59 50 Typ. 20 Max. 0.98 100 m g µm ote 6: Measurement point of heat-sink flatness + Measurement location 3mm Heat-sink side + Heat-sink side RECOMMEDED OERTIO CODITIOS CC D DB D, DB tdead fm IO Symbol I C Supply voltage Control supply voltage Control supply voltage Control supply variation rm shoot-through blocking time M input frequency llowable r.m.s. current Minimum input pulse width C variation pplied between - pplied between 1-C, 1-C pplied between FB-FS, FB-FS, FB-FS r each input signal, Tf 100 C Tf 100 C, Tj 125 C CC = 300, D = 15, fc = 5kHz.F = 0.8, sinusoidal Tj 125 C, Tf 100 C (ote 7) O (ote 8) between C- (including surge) ote 7 : The allowable r.m.s. current value depends on the actual application conditions. 8:The input pulse width less than I might make no response. Min. Typ. Max. 0 13.5 13.0 1 2.0 300 5.0 300 15.0 15.0 5 400 16.5 18.5 1 7.5 5.0 / khz rms ns
Fig. 4 THE ITERL CIRCIT FB FS 1 HIC1 CC B IGBT1 Di1 I HO COM S FB FS 1 HIC2 CC B IGBT2 Di2 I HO COM S FB FS 1 HIC3 CC B IGBT3 Di3 I HO COM S LIC IGBT4 Di4 OT 1 CC IGBT5 Di5 OT OT IGBT6 Di6 O CI O(C) C GD CI
Fig. 5 TIMIG CHRTS OF THE ROTECTIE FCTIOS [] Short-Circuit rotection (Lower-arms only) (ith the external shunt resistance and CR connection) a1. ormal operation : IGBT O and carrying current. a2. Short circuit current detection (SC trigger). a3. Hard IGBT gate interrupt. a4. IGBT turns OFF. a5. FO timer operation starts : The pulse width of the FO signal is set by the external capacitor. a6. Input L : IGBT OFF state. a7. Input H : IGBT O state, but during the FO active signal period the IGBT doesn t turn O. a8. IGBT OFF state. Lower-arms control input a6 a7 rotection circuit state SET Internal IGBT gate a2 a3 Output current Ic a1 SC a4 a8 Sense voltage of the shunt resistance SC reference voltage Error output a5 CR circuit time constant DELY [B] nder-oltage rotection (Lower-arm, D) b1. Control supply voltage rises : fter the voltage level reaches Dr, the circuits start to operate when next input is applied. b2. ormal operation : IGBT O and carrying current. b3. nder voltage trip (Dt). b4. IGBT OFF in spite of control input condition. b5. FO operation starts. b6. nder voltage reset (Dr). b7. ormal operation : IGBT O and carrying current. Control input rotection circuit state SET Control supply voltage D Dr b1 Dt b3 b6 b2 b4 b7 Output current Ic Error output b5
[C] nder-oltage rotection (pper-arm, DB) c1. Control supply voltage rises : fter the voltage reaches DBr, the circuits start to operate when next input is applied. c2. ormal operation : IGBT O and carrying current. c3. nder voltage trip (DBt). c4. IGBT OFF in spite of control input condition, but there is no FO signal output. c5. nder voltage reset (DBr). c6. ormal operation : IGBT O and carrying current. Control input rotection circuit state SET DBr Control supply voltage DB c1 DBt c3 c5 c2 c4 c6 Output current Ic Error output High-level (no fault output) Fig. 6 RECOMMEDED C I/O ITERFCE CIRCIT 5 line 10kΩ,,,,, C C(Logic) 2.5kΩ (min) ote : RC coupling at each input (parts shown dotted) may change depending on the M control scheme used in the application and the wiring impedance of the application s printed circuit board. The input signal section integrates a 2.5kΩ(min) pull-down resistor. Therefore, when using a external filtering resistor, care must be taken to satisfy the turn-on threshold voltage requirement. Fig. 7 RECOMMEDED IRIG OF SHT RESISTCE iring inductance should be less than 10nH. width=3mm, thickness=100µm, length=17mm in copper pattern (rough standard) Shunt resistor C lease make the connection point as close as possible to the terminal of shunt resistor.
Fig. 8 TYICL LICTIO CIRCIT EXMLE C1:Tight tolerance temp-compensated electrolytic type C2,C3: 0.22~2µF R-category ceramic capacitor for noise filtering. (ote: The capacitance value depends on the M control used in the applied system.) C2 C1 C3 FB FS 1 HIC1 CC B I HO C2 C1 FB FS COM S C3 1 HIC2 CC B I HO C IT C2 C1 C3 FB FS 1 COM S HIC3 CC B I HO COM S LIC OT M 1 C3 CC 5 line OT C GD OT O CI CI Too long wiring here might cause short-circuit. C 15 line C4() C5 B R1 Shunt Resistance Long GD wiring here might generate noise to input and cause IGBT malfunction. If this wiring is too long, the SC level fluctuation might be larger and cause SC malfunction. 1 ote 1 : To prevent the input signals oscillation, the wiring of each input should be as short as possible. (Less than 2cm) 2:By virtue of integrating an application specific type HIC inside the module, direct coupling to C terminals without any opto-coupler or transformer isolation is possible. 3:FO output is open collector type. This signal line should be pulled up to the positive side of the 5 power supply with approximately 10kΩ resistor. 4:FO output pulse width is determined by the external capacitor between and C terminals (). (Example : = 22 nf tfo = 1.8 ms (typ.)) 5:The logic of input signal is high-active. The input signal section integrates a 2.5kΩ (min) pull-down resistor. Therefore, when using external filtering resistor, care must be taken to satisfy the turn-on threshold voltage requirement. 6:To prevent malfunction of protection, the wiring of, B, C should be as short as possible. 7:lease set the R1C5 time constant in the range 1.5~2. 8:Each capacitor should be located as nearby the pins of the as possible. 9:To prevent surge destruction, the wiring between the smoothing capacitor and the &1 pins should be as short as possible. pproximately a 0.1~0.22µF snubber capacitor between the &1 pins is recommended.