Nea-field emission pediction of CESAME E. Sicad, S. Ben Dhia, E. Lamoueux INSA-GEI, 135 Av de Rangueil 31077 Toulouse Fance B. Vignon, L. Couau ST Micoelectonics, Cental R&D Colles, Fance Contact : etienne.sicad@insa-toulouse.f web site : www.ic-emc.og Abstact: The pupose of this case-study is to compae the measued nea-magnetic field with the simulated field. The CESAME test pin out chip has been descibed in an IBIS fomat, which includes details on the package paasitic R,L,C. In paallel, the electical model of the coe and supply netwok is given by the ICEM model. The concept of adiating inductance is detailed, with the step-by-step pocedue to simulate the magnetic nea-field using IC-EMC. This wok has been conducted in coopeation with ST Micoelectonics (Colles, Fance) and EADS, within the fame of the Euopean poject MEDEA+ MESDIE. Keywods: nea-field scan, emission pediction, localization of gound etun cuent, ICEM model, substate coupling 1 Intoduction The CESAME test chip has been designed by ST-Micoelectonics in coopeation with INSA Toulouse fo the chaacteization of conducted and adiated emissions fom six identical logic coes, each having a specific design technique which aims to educe paasitic emissions. The main goal of the test chip was to validate these design ules and to quantify the benefits in tems of eduction of paasitic intefeences. The most inteesting esults have been pesented in [1][2][3]. The intenal stuctue of CESAME is outlined in Fig. 1. Six logic coe blocks ae implemented in the same die. All these blocks have an identical stuctue based on latches, a clock tee and standad gate which eflect a standad coe activity. Among these coes, two stuctues ae woth of inteest in ou study: the nomal coe called NORM which is supposed to be noisy, and the RC coe with includes a seies esisto on the supply tacks and a local on-chip decoupling to featue low paasitic emission. RC coe (Low emission) NORM coe (High emission) Othe coe Figue 1: The CESAME test chip IC-EMC Application note Page 1
An electical model has been setup fo conducted and adiated emission pediction. The pupose of this study is to compae the measued nea-magnetic field with the simulated field. The CESAME test pin out chip has been descibed in an IBIS fomat, which includes details on the package paasitic R,L,C. In paallel, the electical model of the coe and supply netwok is given by the ICEM model. 2.2 Reuse of the conducted emission model The model developed to pedict conducted mode using 1/150Ω method and adiated emission in TEM cell is eused. The model is pesented in figue 1 [1]. 2 Appoach fo adiated emission simulation 2.1 Poposed flow The poposed flow is illustated in Fig. 2. The nea-field scan of the component is compaed to the simulated scan, based on the adiation of package inductances. The excitation of these inductances is the cuent extacted by time-domain SPICE simulations. IC-EMC is used fo positioning package inductances in 3D, and to calculate the H, E field fom SPICE simulations. Measuements Nea field scan at a given fequency and altitude Measuement Lead Placement (Ibis) IC size Pin location Package inteconnects Package Paasites (Ibis) R,L,C Time domain Simulation Fouie Tansfom of the cuent I(t) and voltage V(t) H[x,y,z] and E[x,y,z] Simulation Scan compaison Electical schematic Coe noise Model (ICEM) WinSPICE IC-EMC Tuning Figue 2: Flow fo compaing pedicted and simulated magnetic field scans Figue 1 : The schematic diagam of CESAME used fo nea-field scan pediction (case_study/cesame/cesame_nom_scan.sc 2.3 Declaing inductance coodinates in 3D The fist step consists in associating geometical model of the package to the electical schematic though the adiating inductances. Table 1 descibes the diffeent steps to update the schematic and declae geometical model of the package leads. Coodinates of inductance can be defined by double clicking on inductance symbol and checking Assign coodinates fo nea-field scanning pediction (Fig. 2). Simple geometical models composed of a line in XY plane ae used to descibe package leads. The key idea of the magnetic field simulation is to conside the CESAME cicuit as a set of cuent dipoles. Each dipole is associated to one paticula package lead inductance. This means that in fist appoximation, each coe of the CESAME test chip may be epesented by two dipoles, one fo the VDD cuent, one fo the VSS cuent. The cuent flowing inside the IC itself is neglected. Only emains the lead cuent. IC-EMC Application note Page 2
St Action Method Comments ep 1 Load Ibis file Text.ibis Enables the cesame_v14.ibs automatic loading of added in the the list of pins, IO layout models and hidden keywods. 2 Reconstuct Click EMC The pin list and package Ibis Inteface. hidden keywods Select the item ae used to Package. econstuct the physical dimensions of each lead. 3 Select Asset the option Fo each selected inductances Assign [X,Y] inductance (hee Coodinates. LVdd and LVss), 4 Assign coodinates Select the Select LVdd_nom 5 Update L value and [X,Y] 6 Update oientation, altitude and width coesponding pin in the IBIS pin List Click Update L and [X,Y]. Fo GND pins, click Exchange so that the stat point is the die, the end point the package. Choose hoizontal o vetical oientation of the dipole. Fo an hoizontal dipole, altitude in the XY plane is constant above the gound plane, while fo a vetical dipole, the stat and stop altitudes ae given. The stat and stop depends on the cuent oientation though the dipole. If the witdh is not given, a default width of 1 mm is used. (pin 7), and LVss_nom (pin 8) Apply to LVdd_nom (pin 7), and Lgnd_nom (pin 8). Click Exchange fo Lgnd_nom. Fo both inductance, select On the plane XY. Set the altitude to 1 mm and the width to 0.2 mm Table 1: Pocedue to assign geometical coodinates to adiating inductances Stat point of Lvdd_nom inductance Silicon die Package outline Stat point of Lgnd_nom inductance Figue 2: Define inductance coodinates and sign (case_study/cesame/cesame_nom_scan.sc IC-EMC Application note Page 3
Step Action Method Comments 6 Geneate Click EMC Ceates the Spicecompatible Spice Geneate Spice file File file o the cesame_nom_scan.ci Geneate Spice R. File icon The declaed output wavefoms ae I(LVdd_nom_7) and I(LGnd_Nom_8). 7 Execute Launch WinSpice. The cuents the Spice Click File I(LVdd_nom_7) and File Open and load I(LGnd_Nom_8) and cesame_nom_sc the voltage acoss these an.cir. inductances ae computed. 8 Load the In the SPICE The cuents SPICE window, click the I(LVdd_nom_7) and esults. icon Nea Field I(LGnd_Nom_8) ae Compute Scan. Ensue loaded. The FFT of the the adiated that the esult file cesame_nom_s cuents is computed. Only magnetic field ae field can.txt is computed, E filed ae selected in ignoed in this example. Simulate H field use file. Unselect the box Simulate E field. 9 Tune In the scan By default the total scan window, select magnetic field is paamete Hx, Hy o Htotal. computed. The scan s Change the scan altitude is 2mm, the altitude. Click fequency is defined by Simul. Scan to the keywod.scan compute the field. <step> <feq>. The scan fequency is 80 MHz. L<λ/10 Table 2: Pocedue to simulate electic and magnetic field fom SPICE simulation x I 2 I 1 z 2 1 H E P y µ A= 4π L / 2 j e I( z) L / 2 L / 2 1 Φ = 4πε ε 0 L / 2 β j e Q( z) H= 1 A µ E = jωa Φ dz z β dz Once the geometical model has been define, simulation of electic and magnetic fields can be launched. Table 2 descibes the pocedue, which stats with a SPICE simulation and an extaction of cuent along adiating inductances, followed by a computation of electic and magnetic fields with IC-EMC (Fig. 3). Click on EMC Nea field scan o on icon to stat the nea field scan simulation tool. In this example, only the magnetic fields ae consideed. The magnetic field geneated by of each elementay cuent dipole is calculated fom the fomulation epoted in figue 4. The fomulations of the magnetic field ae only valid if the dipole length is much shote than the distance to the obsevation point. As the scan was pefomed at the altitude of 2mm, the cuent dipole length is set to 500µm. 2.4 Simulation Results The WinSPICE simulation is pefomed in time domain in ode to monito all cuents flowing in all inductances. Fo each cuent I(t), a Fast Fouie Tansfom is automatically pefomed to extact the cuent amplitude I0 to be injected in the dipole equation, at a given pulse ω. In the case of the NORM coe, the IC-EMC use inteface shown in figue 5 displays the position of the die, the package, and the position of the two main cuent dipoles. The SPICE simulation esult is epoted in the uppe ight cone of the window. At 80 MHz, the cuent amplitude is close to 5 ma along VDD and VSS pins. The maximum total magnetic field is about -11 dba/m, located nea the leads. Change the H field component by selecting Hy (dba/m in the field Compute (Fig. 6). The maximum amplitude of the Hy field is equal to -15.74 db A/m. Figue 4: Electic and magnetic field fomulations with the thin wie appoximation IC-EMC Application note Page 4
Peak is -15 db NORM coe supply leads Limit of the silicon die Limit of the package Figue 5: The simulated magnetic field Htotal fo CESAME NORM coe (case_study/cesame/cesame_nom_scan.sc Figue 7: Measued magnetic field Hx fo CESAME NORM coe (CESAME_Nom_HighEmission.izm) Thee othe egions exhibit magnetic field aound 20 db lowe that the main egion. Diffeences between measuement and simulation come fom two easons: The cuent poduced by the coe NORM flows also though othe pins than VddNom and VssNom The model of the leads can be impoved 3 Multiple Retun path model Figue 6: The simulated magnetic field Hy fo CESAME NORM coe (case_study/cesame/cesame_nom_scan.sc 2.5 Measuement Results The measuement of the magnetic field has been pefomed on the CESAME test chip by A. Tankielun. Use Rotate Meas., align and the aows to align the measuements to the package as shown below. The Hx contibution of the magnetic field measued at 2 mm above the gound plane is shown in figue 7. The peak magnetic field is 17 db nea the main dipole. It has been obseved [2] that the etun path of the gound cuent is not only the VSS pin of the coe but also the othe VSS connections of othe coes, due to a common substate. The coupling via the substate is consideed in the model shown in figue 8 as a esistance, which has be chaacteized in DC to a value of 30 Ω. The thee inductance path coespond to the GND connection of thee othe coes implemented on the same die, and thus shaing the same silicon bulk. Thee package inductances ae added to the schematic diagam and declaed as adiating elements. IC-EMC Application note Page 5
The simulation stats to behave close to the measuements, as shown in figue 9. The simulation is based on one VDD cuent dipole and fou VSS cuent dipoles. The magnetic field appeas above each lead, which is somehow what we measue on the suface of the IC. Figue 8 : The multiple etun paths fo the cuent due to the shaed substate (case_study/cesame/ cesame_nom_scan_multivss.sc Refeences [1] B. Vignon, S. Bendhia, L. Couau, E. Sicad, CESAME: a Test Chip fo the Validation of a paasitic Emission Pediction Flow in 0.18 µm CMOS Technology, 2004 Intenational Symposium on Electomagnetic Compatibility, 9-13 August 2004, pp 372-376, vol. 2 [2] E. Sicad, A. Boye, A. Tankielun "On the Pediction of Nea-field Micocontolle Emission", poceedings of the IEEE Intenational Symposium on EMC, Chicago, Aug 2005 [3] Adam Tankielun, Pete Kalicek, Uwe Kelle, Etienne Sicad, Betand Vignon "Electomagnetic Nea-Field Scanning fo Micoelectonic Test Chip Investigation", IEEE EMC Society Newslette, Oct. 2006. Figue 9: The simulated (left) and measued (ight) magnetic emission of the NORM coe in CESAME test chip (case_study/cesame/ cesame_nom_scan_multivss.sc IC-EMC Application note Page 6