1-Line, Bi-directional, Transient Voltage Suppressors http//:www.sh-willsemi.com Descriptions The is a bi-directional TVS (Transient Voltage Suppressor). It is specifically designed to protect sensitive electronic components which are connected to low speed data lines and control lines from over-stress caused by ESD (Electrostatic Discharge), EFT (Electrical Fast Transients) and Lightning. DFP6-2L The may be used to provide ESD protection up to ±3kV (contact and air discharge) according to IEC6-4-2, and withstand peak pulse current up to 8A (8/2μs) according to IEC6-4-5. Pin1 Pin2 The is available in DFP6-2L package. Standard products are Pb-free and Halogen-free. Circuit diagram Features Reverse stand-off voltage: ±5V Max Transient protection for each line according to IEC6-4-2 (ESD): ±3kV (contact and air discharge) IEC6-4-4 (EFT): 4A (5/5ns) IEC6-4-5 (surge): 8A (8/2μs) Capacitance: C J = 17.5pF typ. Low leakage current: I R < 1nA typ. Low clamping voltage: = 11V typ. @ = 16A (TLP) Solid-state silicon technology Pin1 Top View Pin2 Applications Cellular handsets Tablets Laptops Other portable devices Network communication devices Order information Device Package Shipping -2/TR DFP6-2L /Tape&Reel Will Semiconductor Ltd. 1 Revision 1.3, 216/3/29
Absolute maximum ratings Parameter Symbol Rating Unit Peak pulse power (t p = 8/2μs) P pk 8 W Peak pulse current (t p = 8/2μs) 8 A ESD according to IEC6-4-2 air discharge V ESD ESD according to IEC6-4-2 contact discharge ±3 Junction temperature T J 125 Operation temperature T OP -4~85 Lead soldering temperature - SMT T L - SMT 26 Lead soldering temperature - manual T L manual <3 Storage temperature T STG -55~15 ±3 kv Electrical characteristics (T A =25, unless otherwise noted) I V RWM Reverse stand-off voltage I R Reverse leakage current Clamping voltage Peak pulse current I HOLD V TRIG V HOLD V BR V RWM I BR I TRIG I R I R I TRIG V RWM V BR V HOLD V TRIG V I BR I HOLD V TRIG Reverse trigger voltage I TRIG V BR I BR V HOLD I HOLD Reverse trigger current Reverse breakdown voltage Reverse breakdown current Reverse holding voltage Reverse holding current Definitions of electrical characteristics Will Semiconductor Ltd. 2 Revision 1.3, 216/3/29
Electrical characteristics (T A =25, unless otherwise noted) Parameter Symbol Condition Min. Typ. Max. Unit Reverse stand-off voltage V RWM ±5 V Reverse leakage current I R V RWM = 5V <1 na Reverse breakdown voltage V BR I BR = 1mA 5.1 V Reverse holding voltage V HOLD I HOLD = 5mA 5.1 V Clamping voltage 1) = 16A, t p = ns 11 V Clamping voltage 2) V ESD = 8kV 12 V = 1A, t p = 8/2μs 6.5 V Clamping voltage 3) = 5A, t p = 8/2μs 8.5 V = 8A, t p = 8/2μs V Dynamic resistance 1) R DYN.24 Ω Junction capacitance Notes: C J V R = V, f = 1MHz 17.5 22 pf V R = 5V, f = 1MHz 11.5 16 pf 1) TLP parameter: Z = 5Ω, t p = ns, t r = 2ns, averaging window from 6ns to 8ns. R DYN is calculated from 4A to 16A. 2) Contact discharge mode, according to IEC6-4-2. 3) Non-repetitive current pulse, according to IEC6-4-5. Will Semiconductor Ltd. 3 Revision 1.3, 216/3/29
Typical characteristics (T A =25, unless otherwise noted) Peak pulse current (%) 9 5 T T 1 Front time: T 1 = 1.25 T = 8 s Time to half-value: T 2 = 2 s T 2 2 Time ( s) 8/2μs waveform per IEC6-4-5 Current (%) 9 3ns t r =.7~1ns Time (ns) 6ns Contact discharge current waveform per IEC6-4-2 t V C - Clamping voltage (V) 9 8 7 6 Pulse waveform: t p = 8/2μs Pin1 to Pin2 Pin2 to Pin1 C J - Junction capacitance (pf) 2 18 16 14 12 f = 1MHz V AC = 5mV 5 2 4 6 8 - Peak pulse current (A) Clamping voltage vs. Peak pulse current -5-4 -3-2 -1 1 2 3 4 5 V R - Reverse voltage (V) Capacitance vs. Reverse voltage Peak pulse power (W) % of Rated power 8 6 4 2 1 Pulse time ( s) Non-repetitive peak pulse power vs. Pulse time 25 5 75 125 15 T A - Ambient temperature ( ) Power derating vs. Ambient temperature Will Semiconductor Ltd. 4 Revision 1.3, 216/3/29
Typical characteristics (T A =25, unless otherwise noted) ESD clamping (+8kV contact discharge per IEC6-4-2) ESD clamping (-8kV contact discharge per IEC6-4-2) 2 16 12 TLP current (A) 8 4-4 -8-12 -16-2 -12 - -8-6 -4-2 2 4 6 8 12 TLP voltage (V) TLP Measurement Z = 5 t r = 2ns t p = ns Will Semiconductor Ltd. 5 Revision 1.3, 216/3/29
Package outline dimensions DFP6-2L Top View(Bottom View) Side View Symbol Dimensions in millimeter Min. Typ. Max. W.4.5.53 L.9 1. 1. T.4.5.53 a.15.25.35 e.75 Typ. Will Semiconductor Ltd. 6 Revision 1.3, 216/3/29
Recommend land pattern (Unit: mm).4.4 Notes: This recommended land pattern is for reference purposes only. Please consult your manufacturing group to ensure your PCB design guidelines are met. he IR reflow and temperature of Soldering for Pb Free Peak Temp 26 (3~sec) Temperature ( ).6.8 25 225 2 175 15 125 75 Pre-Heat 175 (6~12sec) Peak Temp 245 (~2sec) 25 1:: 2:: 3:: 4:: Time (min) IR reflow Pb Free Process suggestion profile (1) The solder recommend is Sn96.5/Ag 3.5 of 12 to 15μm (2) Ramp-up rate (217 to Peak) + 3 /second max (3) Temp. maintain at 175 +/-25 18 seconds max (4) Temp. maintain above 217 6-15 seconds (5) Peak temperature range245 +2 / - time within 5 of actually peak temperature (tp) ~2 seconds (6) Ramp down rate +6 /second max (7)Steel plate thickness.8mm Will Semiconductor Ltd. 7 Revision 1.3, 216/3/29