PD - 964B Features l Advanced Process Technology l Ultra Low On-Resistance l 75 C Operating Temperature l Fast Switching l Repetitive Avalanche Allowed up to Tjmax l Lead-Free l Halogen-Free Description This HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 75 C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in a wide variety of applications. Absolute Maximum Ratings Parameter I D @ T C = 25 C Continuous Drain Current, V GS @ V (Silicon Limited) HEXFET Power MOSFET V DSS = V R DS(on) = 28.5mΩ I D = 35A HEXFET is a registered trademark of International Rectifier. www.irf.com G D S IRFR54ZPbF IRFU54ZPbF D-Pak IRFR54ZPbF I-Pak IRFU54ZPbF Units I D @ T C = C Continuous Drain Current, V GS @ V (Silicon Limited) 25 A I DM Pulsed Drain Current c 4 P D @T C = 25 C Power Dissipation 9 W Linear Derating Factor.6 W/ C V GS Gate-to-Source Voltage ± 2 V E AS (Thermally limited) Single Pulse Avalanche Energyd 39 mj E AS (Tested ) Single Pulse Avalanche Energy Tested Value h 75 I AR Avalanche Currentc See Fig.2a, 2b, 5, 6 A E AR Repetitive Avalanche Energy g mj T J Operating Junction and -55 to 75 T STG Storage Temperature Range C Reflow Soldering Temperature, for seconds 3 lbfyin (.Nym) Mounting Torque, 6-32 or M3 screw Thermal Resistance Parameter Typ. Max. Units R θjc Junction-to-Case j.64 R θja Junction-to-Ambient (PCB mount) ij 4 C/W R θja Junction-to-Ambient j Max. 35 9/3/
IRFR/U54ZPbF Electrical Characteristics @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage V V GS = V, I D = 25µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient.92 V/ C Reference to 25 C, I D = ma R DS(on) Static Drain-to-Source On-Resistance 22.5 28.5 mω V GS = V, I D = 2A e V GS(th) Gate Threshold Voltage 2. 4. V V DS = V GS, I D = 5µA gfs Forward Transconductance 28 S V DS = 25V, I D = 2A I DSS Drain-to-Source Leakage Current 2 µa V DS = V, V GS = V 25 V DS = V, V GS = V, T J = 25 C I GSS Gate-to-Source Forward Leakage 2 na V GS = 2V Gate-to-Source Reverse Leakage -2 V GS = -2V Q g Total Gate Charge 39 59 I D = 2A Q gs Gate-to-Source Charge nc V DS = 5V Q gd Gate-to-Drain ("Miller") Charge 2 V GS = V e t d(on) Turn-On Delay Time 4 V DD = 5V t r Rise Time 42 I D = 2A t d(off) Turn-Off Delay Time 43 ns R G = 3 Ω t f Fall Time 34 V GS = V e L D Internal Drain Inductance 4.5 Between lead, D nh 6mm (.25in.) L S Internal Source Inductance 7.5 from package G and center of die contact S C iss Input Capacitance 69 V GS = V C oss Output Capacitance 8 V DS = 25V C rss Reverse Transfer Capacitance pf ƒ =.MHz C oss Output Capacitance 72 V GS = V, V DS =.V, ƒ =.MHz C oss Output Capacitance V GS = V, V DS = 8V, ƒ =.MHz C oss eff. Effective Output Capacitance 9 V GS = V, V DS = V to 8V f Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current 35 MOSFET symbol (Body Diode) A showing the I SM Pulsed Source Current 4 integral reverse (Body Diode)Ãc p-n junction diode. V SD Diode Forward Voltage.3 V T J = 25 C, I S = 2A, V GS = V e t rr Reverse Recovery Time 32 48 ns T J = 25 C, I F = 2A, V DD = 5V Q rr Reverse Recovery Charge 4 6 nc di/dt = A/µs e t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LSLD) 2 www.irf.com
I D, Drain-to-Source Current (Α) G fs, Forward Transconductance (S) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRFR/U54ZPbF VGS TOP 5V V 8.V 7.V 6.V 5.5V 5.V BOTTOM 4.5V 6µs PULSE WIDTH Tj = 25 C VGS TOP 5V V 8.V 7.V 6.V 5.5V 5.V BOTTOM 4.5V 4.5V 4.5V. V DS, Drain-to-Source Voltage (V) 6µs PULSE WIDTH Tj = 75 C. V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics 7 6 T J = 25 C 5 T J = 75 C 4 3 T J = 75 C T J = 25 C 2. V DS = 25V 6µs PULSE WIDTH 2 3 4 5 6 7 8 V DS = V 38µs PULSE WIDTH 2 3 4 5 V GS, Gate-to-Source Voltage (V) I D,Drain-to-Source Current (A) Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance vs. Drain Current www.irf.com 3
I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) C, Capacitance(pF) V GS, Gate-to-Source Voltage (V) IRFR/U54ZPbF 3 25 2 V GS = V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd C iss 2 6 2 I D = 2A V DS = 8V VDS= 5V VDS= 2V 5 8 4 5 C oss C rss V DS, Drain-to-Source Voltage (V) 2 3 4 5 6 Q G Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage. OPERATION IN THIS AREA LIMITED BY R DS (on). T J = 75 C µsec msec. T J = 25 C. V GS = V..2.4.6.8..2.4 V SD, Source-to-Drain Voltage (V). Tc = 25 C Tj = 75 C Single Pulse msec DC V DS, Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com
I D, Drain Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) IRFR/U54ZPbF 4 2.5 I D = 2A V GS = V 3 2. 2.5. 25 5 75 25 5 75 T C, CaseTemperature ( C).5-6 -4-2 2 4 6 8 2 4 6 8 T J, Junction Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature Fig. Normalized On-Resistance vs. Temperature Thermal Response ( Z thjc )... D =.5.2..5.2. SINGLE PULSE ( THERMAL RESPONSE ) R R 2 R 3 R R 2 R 3 τ J τ J τ τ τ 2 τ 3 τ 2 τ 3 Ci= τi/ri Ci i/ri E-6 E-5.... t, Rectangular Pulse Duration (sec) τ C τ Ri ( C/W) τi (sec) 2.626.52.66.297.754.832 Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc Tc Fig. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5
V GS(th) Gate threshold Voltage (V) E AS, Single Pulse Avalanche Energy (mj) IRFR/U54ZPbF V DS L 5V DRIVER 6 2 I D TOP 6.5A 9.4A BOTTOM 2A R G 2V V GS tp D.U.T IAS.Ω - V DD A 8 Fig 2a. Unclamped Inductive Test Circuit tp V (BR)DSS 4 25 5 75 25 5 75 Starting T J, Junction Temperature ( C) I AS Fig 2b. Unclamped Inductive Waveforms Q G Fig 2c. Maximum Avalanche Energy vs. Drain Current V V G Q GS Q GD 4.5 4. I D =.ma ID = 25µA I D = 5µA 3.5 Charge Fig 3a. Basic Gate Charge Waveform 3. 2.5 2. K DUT L VCC.5. -75-5 -25 25 5 75 25 5 75 T J, Temperature ( C ) Fig 3b. Gate Charge Test Circuit Fig 4. Threshold Voltage vs. Temperature 6 www.irf.com
Avalanche Current (A) E AR, Avalanche Energy (mj) IRFR/U54ZPbF Duty Cycle = Single Pulse..5. Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25 C due to avalanche losses..e-6.e-5.e-4.e-3.e-2.e- tav (sec) Fig 5. Typical Avalanche Current vs.pulsewidth 4 3 2 TOP Single Pulse BOTTOM % Duty Cycle I D = 2A 25 5 75 25 5 75 Starting T J, Junction Temperature ( C) Notes on Repetitive Avalanche Curves, Figures 5, 6: (For further info, see AN-5 at www.irf.com). Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 2a, 2b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 5, 6). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see figure ) P D (ave) = /2 (.3 BV I av ) = DT/ Z thjc Fig 6. Maximum Avalanche Energy I av = 2DT/ [.3 BV Z th ] vs. Temperature E AS (AR) = P D (ave) t av www.irf.com 7
IRFR/U54ZPbF - D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 7. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs V DS R D R G V GS D.U.T. - V DD V Pulse Width µs Duty Factor. % Fig 8a. Switching Time Test Circuit V DS 9% % V GS t d(on) t r t d(off) t f Fig 8b. Switching Time Waveforms 8 www.irf.com
IRFR/U54ZPbF D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information EXAMPLE: THIS IS AN IRFR2 WITH ASSEMBLY LOT CODE 234 AS SEMBLED ON WW 6, 2 IN THE ASSEMBLY LINE "A" Note: "P" in assembly line position indicates "Lead-Free" "P" in assembly line position indicates "Lead-F ree" qualification to the cons umer-level INTERNATIONAL RECTIFIER LOGO AS S E MBLY LOT CODE IRFR2 6A 2 34 PART NUMBER DATE CODE YEAR = 2 WEEK 6 LINE A OR INTERNATIONAL RECTIFIER LOGO AS S EMBL Y LOT CODE IRFR2 2 34 PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) P = DESIGNATES LEAD-FREE PRODUCT QUALIFIED TO THE CONSUMER LEVEL (OPTIONAL) YEAR = 2 WEEK 6 A = ASSEMBLY SITE CODE Notes:. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 9
IRFR/U54ZPbF I-Pak (TO-25AA) Package Outline Dimensions are shown in millimeters (inches) I-Pak (TO-25AA) Part Marking Information EXAMPLE: THIS IS AN IRFU2 WITH ASSEMBLY LOT CODE 5678 ASSEMBLED ON WW 9, 2 IN THE ASSEMBLY LINE "A" Note: "P" in assembly line position indicates Lead-Free" INTERNATIONAL RECTIFIER LOGO AS S EMBL Y LOT CODE IRFU2 9A 56 78 PART NUMBER DATE CODE YEAR = 2 WEEK 9 LINE A OR INT ERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE IRFU2 56 78 PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR = 2 WEEK 9 A = ASSEMBLY SITE CODE Notes:. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com
IRFR/U54ZPbF D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 6.3 (.64 ) 5.7 (.69 ) 6.3 (.64 ) 5.7 (.69 ) 2. (.476 ).9 (.469 ) FEED DIRECTION 8. (.38 ) 7.9 (.32 ) FEED DIRECTION NOTES :. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-48 & EIA-54. 3 INCH NOTES :. OUTLINE CONFORMS TO EIA-48. 6 mm Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. ). Limited by T Jmax, starting T J = 25 C, L =.7mH R G = 25Ω, I AS = 2A, V GS =V. Part not recommended for use above this value. ƒ Pulse width.ms; duty cycle 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from to 8% V DSS. Limited by T Jmax, see Fig.2a, 2b, 5, 6 for typical repetitive avalanche performance. This value determined from sample failure population. % tested to this value in production. When mounted on " square PCB (FR-4 or G- Material). ˆ R θ is measured at T J approximately 9 C Data and specifications subject to change without notice. This product has been designed for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245, USA Tel: (3) 252-75 TAC Fax: (3) 252-793 Visit us at www.irf.com for sales contact information.9/2 www.irf.com