Metal Oxide Semiconductor Field-Effect Transistors (MOSFETs)

Similar documents
EE105 Fall 2015 Microelectronic Devices and Circuits: MOSFET Prof. Ming C. Wu 511 Sutardja Dai Hall (SDH)

Introduction to MOSFET MOSFET (Metal Oxide Semiconductor Field Effect Transistor)

ECEN325: Electronics Summer 2018

Lecture 16: MOS Transistor models: Linear models, SPICE models. Context. In the last lecture, we discussed the MOS transistor, and

Field-Effect Transistor (FET) is one of the two major transistors; FET derives its name from its working mechanism;

Microelectronics Circuit Analysis and Design. MOS Capacitor Under Bias: Electric Field and Charge. Basic Structure of MOS Capacitor 9/25/2013

55:041 Electronic Circuits

EEC 118 Spring 2010 Lab #1: NMOS and PMOS Transistor Parameters

D n ox GS THN DS GS THN DS GS THN. D n ox GS THN DS GS THN DS GS THN

Week 9a OUTLINE. MOSFET I D vs. V GS characteristic Circuit models for the MOSFET. Reading. resistive switch model small-signal model

Design cycle for MEMS

UNIT-1 Bipolar Junction Transistors. Text Book:, Microelectronic Circuits 6 ed., by Sedra and Smith, Oxford Press

MOSFET Terminals. The voltage applied to the GATE terminal determines whether current can flow between the SOURCE & DRAIN terminals.

EE 140 / EE 240A ANALOG INTEGRATED CIRCUITS FALL 2015 C. Nguyen PROBLEM SET #7

Depletion-mode operation ( 공핍형 ): Using an input gate voltage to effectively decrease the channel size of an FET

Lecture 16. Complementary metal oxide semiconductor (CMOS) CMOS 1-1

MOS Field-Effect Transistors (MOSFETs)

Lecture 4. MOS transistor theory

F9 Differential and Multistage Amplifiers

MOSFET & IC Basics - GATE Problems (Part - I)

Microelectronics Circuit Analysis and Design

EE5320: Analog IC Design

INTRODUCTION: Basic operating principle of a MOSFET:

4.5 Biasing in MOS Amplifier Circuits

Field Effect Transistors

Integrated Circuit Amplifiers. Comparison of MOSFETs and BJTs

Three Terminal Devices

55:041 Electronic Circuits

Course Outline. 4. Chapter 5: MOS Field Effect Transistors (MOSFET) 5. Chapter 6: Bipolar Junction Transistors (BJT)

Electronic Circuits for Mechatronics ELCT 609 Lecture 6: MOS-FET Transistor

Laboratory #5 BJT Basics and MOSFET Basics

Part II: The MOS Transistor Technology. J. SÉE 2004/2005

COMPARISON OF THE MOSFET AND THE BJT:

MEASUREMENT AND INSTRUMENTATION STUDY NOTES UNIT-I

ECE 340 Lecture 40 : MOSFET I

EE 230 Fall 2006 Experiment 11. Small Signal Linear Operation of Nonlinear Devices

Session 2 MOS Transistor for RF Circuits

ECE/CoE 0132: FETs and Gates

UNIVERSITY OF CALIFORNIA AT BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences.

Experiment 3. 3 MOSFET Drain Current Modeling. 3.1 Summary. 3.2 Theory. ELEC 3908 Experiment 3 Student#:

8. Characteristics of Field Effect Transistor (MOSFET)

MOS Field Effect Transistors

F7 Transistor Amplifiers

6.012 Microelectronic Devices and Circuits

EE105 Fall 2015 Microelectronic Devices and Circuits

FET. Field Effect Transistors ELEKTRONIKA KONTROL. Eka Maulana, ST, MT, M.Eng. Universitas Brawijaya. p + S n n-channel. Gate. Basic structure.

ECE 546 Lecture 12 Integrated Circuits

MOSFET Amplifier Configuration. MOSFET Amplifier Configuration

ECE315 / ECE515 Lecture 8 Date:

Conduction Characteristics of MOS Transistors (for fixed Vds)! Topic 2. Basic MOS theory & SPICE simulation. MOS Transistor

Topic 2. Basic MOS theory & SPICE simulation

Conduction Characteristics of MOS Transistors (for fixed Vds) Topic 2. Basic MOS theory & SPICE simulation. MOS Transistor

Shorthand Notation for NMOS and PMOS Transistors

Lecture 13 - Digital Circuits (II) MOS Inverter Circuits. October 25, 2005

problem grade total

Today's Goals. Finish MOS transistor Finish NMOS logic Start CMOS logic

Solid State Devices- Part- II. Module- IV

SKEL 4283 Analog CMOS IC Design Current Mirrors

Basic Fabrication Steps

Summary of Lecture Notes on Metal-Oxide-Semiconductor, Field-Effect Transistors (MOSFETs)

Analog IC Design. Lecture 1,2: Introduction & MOS transistors. Henrik Sjöland. Dept. of Electrical and Information Technology

8. Combinational MOS Logic Circuits

Introduction to Electronic Devices

! PN Junction. ! MOS Transistor Topology. ! Threshold. ! Operating Regions. " Resistive. " Saturation. " Subthreshold (next class)

Chapter 4. CMOS Cascode Amplifiers. 4.1 Introduction. 4.2 CMOS Cascode Amplifiers

BJT Amplifier. Superposition principle (linear amplifier)

Lecture-45. MOS Field-Effect-Transistors Threshold voltage

Tema 12 Transistores. 12.a. El transistor bipolar 12.b. El transistor MOS

MOS TRANSISTOR THEORY

Show the details of the derivation for Eq. (6.33) for the PMOS device.

Solid State Device Fundamentals

EE301 Electronics I , Fall

CMOS RE-CONFIGURABLE MULTI-STANDARD RADIO RECEIVERS BIASING ANALYSIS

Lecture 13 - Digital Circuits (II) MOS Inverter Circuits. March 22, 2001

Prof. Paolo Colantonio a.a

ELEC 2210 EXPERIMENT 8 MOSFETs

Learning Outcomes. Spiral 2-6. Current, Voltage, & Resistors DIODES

Sub-Threshold Region Behavior of Long Channel MOSFET

Chapter 2 : Semiconductor Materials & Devices (II) Feb

Building Blocks of Integrated-Circuit Amplifiers

Digital Electronics. Assign 1 and 0 to a range of voltage (or current), with a separation that minimizes a transition region. Positive Logic.

LECTURE 09 LARGE SIGNAL MOSFET MODEL

DIGITAL VLSI LAB ASSIGNMENT 1

ENEE 307 Laboratory#2 (n-mosfet, p-mosfet, and a single n-mosfet amplifier in the common source configuration)

EE 230 Lab Lab 9. Prior to Lab

C H A P T E R 6 Bipolar Junction Transistors (BJTs)

Solid State Devices & Circuits. 18. Advanced Techniques

ECE520 VLSI Design. Lecture 2: Basic MOS Physics. Payman Zarkesh-Ha

Laboratory #9 MOSFET Biasing and Current Mirror

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier

ENG2410 Digital Design CMOS Technology. Fall 2017 S. Areibi School of Engineering University of Guelph

Microelectronics Part 2: Basic analog CMOS circuits

Chapter 5: Field Effect Transistors

Microelectronic Circuits II. Ch 10 : Operational-Amplifier Circuits

IFB270 Advanced Electronic Circuits

Practice 6: CMOS Digital Logic

ECE 442 Solid State Devices & Circuits. 15. Differential Amplifiers

IENGINEERS-CONSULTANTS QUESTION BANK SERIES ELECTRONICS ENGINEERING 1 YEAR UPTU ELECTRONICS ENGINEERING EC 101 UNIT 3 (JFET AND MOSFET)

Introduction to VLSI ASIC Design and Technology

Electronic CAD Practical work. Week 1: Introduction to transistor models. curve tracing of NMOS transfer characteristics

Transcription:

Metal Oxide Semiconductor Field-Effect Transistors (MOSFETs)

Device Structure

N-Channel MOSFET Providing electrons Pulling electrons (makes current flow) + + + Apply positive voltage to gate: Drives away holes and attracts electrons in the body under gate Creates an n-channel between the source and drain and now current can flow https://www.youtube.com/watch?v=tz62t-q_kec Electronic Devices: Field Effect Transistors

Operation with Zero Gate Voltage Two back-to-back diodes, High Resistance (Giga Ohms), No Current Flow Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright 2010 by Oxford University Press, Inc.

Creating a Channel for Current Flow -v GS :gate to source voltage -V t : threshold voltage (v GS which channel starts conducting) -i DS : current flowing when v DS applied -Effective voltage (or overdrive voltage): v GS V t v OV v eff Charge in the channel: Q = C ( WL) ox v OV -Oxide capacitance: ε ox Cox = tox -Gate to source capacitance: C = C WL ox

Applying a small v DS

Operation as v DS increases Channel becomes more tapered and its resistance increases

Saturation region (BJT) Active region (BJT) Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright 2010 by Oxford University Press, Inc.

Operation for v DS >>V OV (channel pinch-off, saturation mode of operation) i v D OV ' n GS W ( ) v L V 1 ' W id = kn( 2 L k ' = µ C n 1 = k 2 = v n ox t 2 OV )( v GS V t ) 2 Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright 2010 by Oxford University Press, Inc.

P-Channel MOSFET Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright 2010 by Oxford University Press, Inc.

P-Channel MOSFET Threshold voltage v Use absolute value GS V tp vgs V tp P-Channel transistor process transconductance parameter k ' = µ C p p ox P-Channel transistor transconductance parameter k p = µ p C ox ( L W ) Formulae are the same, switch sign of voltages Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright 2010 by Oxford University Press, Inc.

Complementary MOS or CMOS Figure 5.10 Cross-section of a CMOS integrated circuit. The PMOS transistor is formed in a separate n-type region (n well). Another arrangement is also possible in which an n-type body is used and the n device is formed in a p well. Not shown are the connections made to the p-type body and to the n well; the latter functions as the body terminal for the p-channel device. Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright 2010 by Oxford University Press, Inc.

Current-Voltage Characteristics Figure 5.11 (a) Circuit symbol for the n-channel enhancement-type MOSFET. (b) Modified circuit symbol with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n channel). (c) Simplified circuit symbol to be used when the source is connected to the body or when the effect of the body on device operation is unimportant.

Table 5.1 Regions of Operation of the Enhancement NMOS Transistor

Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright 2010 by Oxford University Press, Inc. Stepping V GS

Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright 2010 by Oxford University Press, Inc. The i D v GS Characteristic 2 ' 2 ' ) ( 2 1 ) )( ( 2 1 OV n D t GS n D v L W k i V v L W k i = = in term of v OV :

Large-signal equivalent-circuit model (DC) of an n- channel MOSFET operating in the saturation

Channel Length Effect i D = 2 W ( L 1 ' k )( ) 2 n vgs Vtn (1 + λv Channel-length modulation DS )

i D = 1 2 k ' n W ( L )( v GS V tn ) 2 1 r 0 = ==> r0 = λi D V I A D Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright 2010 by Oxford University Press, Inc.

Large-signal equivalent circuit model r 0 = 1 λ I D

Characteristics of the p-channel MOSFET Figure 5.19 (a) Circuit symbol for the p-channel enhancement-type MOSFET. (b) Modified symbol with an arrowhead on the source lead. (c) Simplified circuit symbol for the case where the source is connected to the body.

Table 5.2 Regions of Operation of the Enhancement PMOS Transistor

Example MOSFET Circuits at DC Given: I D =0.4mA, V D =0.5V, V t =0.7V, µ n C ox =100 µa/v 2, L=1 µm, W=32 µm, λ=0 Find: R D, R S

Example 5.6 (p. 281)

Example 5.7 (p. 264) Given: I D =0.5mA V D =3V V tp =-1V PMOS Find: R G1 R G2