Power MOSFET PRODUCT SUMMARY V DS (V) 400 R DS(on) ( ) = 0 V 0.55 Q g (Max.) (nc) 36 Q gs (nc) 9.9 Q gd (nc) 6 Configuration Single D TO220AB G FEATURES Low Gate Charge Q g Results in Simple Drive Requirement Improved Gate, Avalanche and Dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche Voltage and Current Effective C oss Specified Compliant to RoHS Directive 2002/95/EC APPLICATIONS Switch Mode Power Supply (SMPS) Uninterruptable Power Supply High Speed Power Switching Available RoHS* COMPLIANT G DS ORDERING INFORMATION Package Lead (Pb)free SnPb S NChannel MOSFET TYPICAL SMPS TOPOLOGIES Single Transistor Flyback Xfmr. Reset Single Transistor Forward Xfmr. Reset (Both for US Line Input Only) TO220AB IRF740APbF SiHF740AE3 IRF740A SiHF740A ABSOLUTE MAXIMUM RATINGS (T C = 25 C, unless otherwise noted) PARAMETER SYMBOL LIMIT UNIT DrainSource Voltage V DS 400 GateSource Voltage ± 30 V Continuous Drain Current at 0 V T C = 25 C 0 I D T C = 00 C 6.3 A Pulsed Drain Current a I DM 40 Linear Derating Factor.0 W/ C Single Pulse Avalanche Energy b E AS 630 mj Repetitive Avalanche Current a I AR 0 A Repetitive Avalanche Energy a E AR 2.5 mj Maximum Power Dissipation T C = 25 C P D 25 W Peak Diode Recovery dv/dt c dv/dt 5.9 V/ns Operating Junction and Storage Temperature Range T J, T stg 55 to 50 Soldering Recommendations (Peak Temperature) for 0 s 300 d C Mounting Torque 632 or M3 screw Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. ). b. V DD = 50 V, starting T J = 25 C, L = 2.6 mh, R g = 25, I AS = 0 A (see fig. 2). c. I SD 0 A, dv/dt 330 A/μs, V DD V DS, T J 50 C. d..6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply 0 lbf in. N m Document Number: 905 www.vishay.com S0508Rev. C, 2Mar THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. UNIT Maximum JunctiontoAmbient R thja 62 CasetoSink, Flat, Greased Surface R thcs 0.50 C/W Maximum JunctiontoCase (Drain) R thjc.0 SPECIFICATIONS (T J = 25 C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static DrainSource Breakdown Voltage V DS = 0 V, I D = 250 μa 400 V V DS Temperature Coefficient V DS /T J Reference to 25 C, I D = ma 0.48 V/ C GateSource Threshold Voltage (th) V DS =, I D = 250 μa 2.0 4.0 V GateSource Leakage I GSS = ± 30 V ± 00 na V DS = 400 V, = 0 V 25 Zero Gate Voltage Drain Current I DSS V DS = 320 V, = 0 V, T J = 25 C 250 μa DrainSource OnState Resistance R DS(on) = 0 V I D = 6.0 A b 0.55 Forward Transconductance g fs V DS = 50 V, I D = 6.0 A b 4.9 S Dynamic Input Capacitance C iss = 0 V, 030 Output Capacitance C oss V DS = 25 V, 70 f =.0 MHz, see fig. 5 Reverse Transfer Capacitance C rss 7.7 pf = 0 V, V DS =.0 V, f =.0 MHz 490 Output Capacitance C oss = 0 V, V DS = 320 V, f =.0 MHz 52 Effective Output Capacitance C oss = 0 V, V DS = 0 V to 320 V 6 Total Gate Charge Q g 36 GateSource Charge Q gs I = 0 V D = 0 A, V DS = 320 V, see fig. 6 and 3 b 9.9 nc GateDrain Charge Q gd 6 TurnOn Delay Time t d(on) 0 Rise Time t r V DD = 200 V, I D = 0 A, 35 TurnOff Delay Time t d(off) R g = 0, R D = 9.5, see fig. 0 b 24 ns Fall Time t f 22 DrainSource Body Diode Characteristics Continuous SourceDrain Diode Current I MOSFET symbol D S 0 showing the G integral reverse Pulsed Diode Forward Current a I SM p n junction diode S 40 A Body Diode Voltage V SD T J = 25 C, I S = 0 A, = 0 V b 2.0 V Body Diode Reverse t rr 240 360 ns Recovery Time T J = 25 C, I F = 0 A, di/dt = 00 A/μs b Body Diode Reverse Recovery Charge Q rr.9 2.9 μc Forward TurnOn Time t on Intrinsic turnon time is negligible (turnon is dominated by L S and L D ) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. ). b. Pulse width 300 μs; duty cycle 2 %. www.vishay.com Document Number: 905 2 S0508Rev. C, 2Mar THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
TYPICAL CHARACTERISTICS (25 C, unless otherwise noted) I D, DraintoSource Current (A) 905_0 0 2 0 0. 0 2 Top Bottom 5 V 0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 4.5 V 4.5 V 20 µs Pulse Width T J = 25 C 0. 0 0 2 V DS, DraintoSource Voltage (V) Fig. Typical Output Characteristics, T C = 25 C I D, DraintoSource Current (A) 905_03 0 2 0 0. 4.0 T J = 50 C T J = 25 C 20 µs Pulse Width V DS = 50 V 5.0 6.0 7.0 8.0 9.0 0.0, GatetoSource Voltage (V) Fig. 3 Typical Transfer Characteristics I D, DraintoSource Current (A) 905_02 0 2 0 Top Bottom 5 V 0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 4.5 V V DS, DraintoSource Voltage (V) 4.5 V 20 µs Pulse Width T J = 50 C 0. 0. 0 0 2 Fig. 2 Typical Output Characteristics, T C = 50 C R DS(on), DraintoSource On Resistance (Normalized) 905_04 3.0 2.5 2.0.5.0 0.5 I D = 0 A = 0 V 0.0 60 40 20 0 20 40 60 80 00 20 40 60 T J, Junction Temperature ( C) Fig. 4 Normalized OnResistance vs. Temperature Document Number: 905 www.vishay.com S0508Rev. C, 2Mar 3 THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
C, Capacitance (pf) 905_05 0 5 0 4 0 3 0 2 0 = 0 V, f = MHz C iss = C gs C gd, C ds Shorted C rss = C gd C oss = C ds C gd C iss C oss C rss 0 0 2 0 3 V DS, DraintoSource Voltage (V) Fig. 5 Typical Capacitance vs. DraintoSource Voltage I SD, Reverse Drain Current (A) 905_07 0 2 0 T J = 50 C T J = 25 C = 0 V 0. 0.2 0.4 0.6 0.8.0.2.4 V SD, SourcetoDrain Voltage (V) Fig. 7 Typical SourceDrain Diode Forward Voltage, GatetoSource Voltage (V) 905_06 20 6 2 8 4 0 I D = 0 A V DS = 200 V V DS = 80 V V DS = 320 V 0 0 20 30 40 Q G, Total Gate Charge (nc) For test circuit see figure 3 Fig. 6 Typical Gate Charge vs. GatetoSource Voltage I D, Drain Current (A) 905_08 0 2 0 Operation in this area limited by R DS(on) 0 µs 00 µs ms T C = 25 C T J = 50 C Single Pulse 0 ms 0 0 2 0 3 V DS, DraintoSource Voltage (V) Fig. 8 Maximum Safe Operating Area www.vishay.com Document Number: 905 4 S0508Rev. C, 2Mar THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
V DS R D D.U.T. 0.0 R g V DD I D, Drain Current (A) 8.0 6.0 4.0 2.0 0 V Pulse width µs Duty factor 0. % Fig. 0a Switching Time Test Circuit V DS 90 % 905_09 0.0 25 50 75 00 25 50 T C, Case Temperature ( C) 0 % t d(on) t r t d(off) t f Fig. 9 Maximum Drain Current vs. Case Temperature Fig. 0b Switching Time Waveforms 0 Thermal Response (Z thjc ) 905_ 0. 0 2 0 3 D = 0.50 0.20 0.0 0.05 0.02 0.0 Single Pulse (Thermal Response) 0 5 0 4 0 3 0 2 0. 0 t, Rectangular Pulse Duration (s) Fig. Maximum Effective Transient Thermal Impedance, JunctiontoCase P DM t t 2 Notes:. Duty Factor, D = t /t 2 2. Peak T j = P DM x Z thjc T C 5 V t p V DS V DS L Driver R g 20 V t p D.U.T. I AS 0.0 Ω V DD A I AS Fig. 2a Unclamped Inductive Test Circuit Fig. 2b Unclamped Inductive Waveforms Document Number: 905 www.vishay.com S0508Rev. C, 2Mar 5 THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
E AS, Single Pulse Avalanche Energy (mj) 400 200 000 800 600 400 200 Top Bottom I D 4.5 A 6.3 A 0 A 0 25 50 75 00 25 50 V DSav, Avalanche Voltage (V) 580 560 540 520 500 480.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 0.0 905_2c Starting T J, Junction Temperature ( C) 905_2d I AV, Avalanche Current (A) Fig. 2c Maximum Avalanche Energy vs. Drain Current Fig. 2d Typical DraintoSource Voltage vs. Avalanche Current Current regulator Same type as D.U.T. Q G 50 kω 2 V 0.2 µf 0.3 µf Q GS Q GD D.U.T. V DS V G 3 ma Charge Fig. 3a Basic Gate Charge Waveform Fig. 3b Gate Charge Test Circuit I G I D Current sampling resistors www.vishay.com Document Number: 905 6 S0508Rev. C, 2Mar THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
Peak Diode Recovery dv/dt Test Circuit D.U.T. Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer R g dv/dt controlled by R g Driver same type as D.U.T. I SD controlled by duty factor D D.U.T. device under test V DD Driver gate drive P.W. Period D = P.W. Period = 0 V a D.U.T. l SD waveform Reverse recovery current Body diode forward current di/dt D.U.T. V DS waveform Diode recovery dv/dt V DD Reapplied voltage Inductor current Body diode forward drop Ripple 5 % I SD Note a. = 5 V for logic level devices Fig. 4 For NChannel maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?905. Document Number: 905 www.vishay.com S0508Rev. C, 2Mar 7 THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
www.vishay.com Package Information TO220 D L H() Q L() E 2 3 M * b() Ø P A F DIM. MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 4.24 4.65 0.67 0.83 b 0.69.02 0.027 0.040 b().4.78 0.045 0.070 c 0.36 0.6 0.04 0.024 D 4.33 5.85 0.564 0.624 E 9.96 0.52 0.392 0.44 e 2.4 2.67 0.095 0.05 e() 4.88 5.28 0.92 0.208 F.4.40 0.045 0.055 H() 6.0 6.7 0.240 0.264 J() 2.4 2.92 0.095 0.5 L 3.36 4.40 0.526 0.567 L() 3.33 4.04 0.3 0.59 Ø P 3.53 3.94 0.39 0.55 Q 2.54 3.00 0.00 0.8 ECN: X50364Rev. C, 4Dec5 DWG: 603 Note M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM e b C e() J() ASE Package Picture Xi an Revison: 4Dec5 Document Number: 66542 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
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