Edith Cowan University Research Online Theses: Doctorates and Masters Theses 2004 CMOS digital pixel sensor array with time domain analogue to digital conversion Alistair J. Kitchen Edith Cowan University Recommended Citation Kitchen, A. J. (2004). CMOS digital pixel sensor array with time domain analogue to digital conversion. Retrieved from http://ro.ecu.edu.au/theses/765 This Thesis is posted at Research Online. http://ro.ecu.edu.au/theses/765
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Abstr.1ct This thesis presents a digital pixel sensor array, which is the first stage of an ongoing project to produce a CMOS image sensor with on-chip image processing. The analogue to digital conversion is performed at the pixel level, with the result stored in pixel memory. This architecture allows fast, reliable access to the image data and simplifies the integration of the image array and the processing logic. Each pixel contains a photodiode sensor, a comparator, memory and addressing logic. The photodiode sensor operates in integrating mode, where the photodiode junction capacitance is first charged to an initial voltage, and then discharged by the photodiode leakage current, which is comprised mainly of optically generated carriers. The analogue to digital conversion is performed by measuring the time taken for the photodiode cathode voltage to fall from its initial voltage, to the comparator reference voltage. This triggers the 8-bit pixel memory, which stores a data value representative of the time. The trigger signal also resets the photodiode, which conserves the charge stored in the junction capacitance, and also prevents blooming. An on-chip control circuit generfltes the digital data that is distributed globally to the array. The control circuit compensates for the inverse relationship between the integration time and the photocurrent by adjusting the data clock timing. The period of the data clock is increased at the same rate as the integration time, resulting in a linear relationship between the digital data and the photocurrcnt. The design is realised as a 64 x 64 pixel array, manufactured in O.35JLm 3.3 V CMOS technology. Each pixe~ occupies an area of 45p;m x 45JLm with a 12.3% fill factor, and the entire pixel array and control circuit measures 3.7mm x 3.9mm. Experimental results confirm the operation of the digital pixel, and the linearising control circuit. The digital pixel has a dynamic range of 85dB, and can be adapted to different lighting conditions by varying a single clock frequency. The data captured by the array can be randomly accessed, and is read from the array nondestructivcly. vi