Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. Typical parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
www.fairchildsemi.com AN-8029 28L Dual-Row UMLP Recommended Surface Mounting Procedures Purpose/Scope The purpose of this applications note is to provide general guidelines and best practices for surface mounting of the 28- lead, dual-row UMLP (28L DR-UMLP) package offered by Fairchild Semiconductor. The document includes printed circuit board design recommendations in addition to stencil design, solder paste printing, and reflow information. Although this document is specific to the 28-lead dual-row UMLP, the same generic recommendations apply for surface mounting other fine-pitch MLP package configurations. Contents Purpose/Scope... 1 Contents... 1 Introduction... 1 PCB Design... 2 Solder Paste Printing... 2 Solder Paste Reflow... 3 References... 3 Top View Bottom View Figure 1. 28-Lead, Dual-Row UMLP Offered by Fairchild Semiconductor Introduction The 28-lead DR-UMLP package offered by Fairchild Semiconductor allows for a higher pin count in the same surface area as a single-row configuration. The 28L DR- UMLP has a 0.6mm within-row lead finger pitch and a 0.375mm between-row pitch. The lead finger layout utilizes a staggered configuration, which allows for a smaller between-row pitch while maintaining good solder paste printability. The package outline drawing is shown Figure 7. Lead finger and DAP surface finish is Ni/Pd/Au, which allows for good solderability using Pb-free pastes. The package contains an exposed center die-attach pad (DAP) for devices needing high thermal transfer. In cases where low-power devices with low heat generation are used in this package, the center DAP can be left unsoldered if there are no other concerns about solder joint reliability. The following documentation provides recommendations and general best practices for the surface mounting of the 28L DR-UMLP package. Rev. 1.0.1 12/18/09
AN-8029 PCB Design Material selection for surface-mount PCB should be based on the intended application. For Pb-free applications, it is recommended that a high-quality Pb-free specific FR-4 material be used. Further information can be found in the IPC-4101 specification. The recommended land pad finish is Cu-OSP. ENIG or Immersion Ag is also acceptable. Land pad definition is recommended to be NSMD (non-solder mask defined), where the solder mask opening is larger than the land pad. The land pad to solder mask edge should be 50µm nominal distance, as shown in Figure 2 and Figure 3. The recommended land pattern design for the 28L DR-UMLP is shown in the package outline drawing in Figure 7. Cu Pad Figure 2. Sketch Showing NSMD Solder Mask Definition Cu Pad Substrate Solder Mask Solder Mask APPLICATION NOTE In cases where a high-power device is packaged in the 28L DR-UMLP, thermal vias can be designed in the PCB underneath the center DAP to allow for more effective heat removal. The recommended thermal via configuration is a 1.25mm pitch grid with buried via diameters ranging from 0.25-0.30mm. Solder Paste Printing Since the 28L DR-UMLP has a fine pitch configuration with small landing pads, special care must be taken in the paste printing process to ensure successful surface mounting of the package. Stencil aperture size should be maximized to promote paste release from the stencil. In general, the aperture-to-sidewall area ratio should be maximized to promote paste transfer from the stencil to the PCB land pad. This can be accommodated by increasing aperture size and/or decreasing stencil thickness. Soldering to the center DAP presents its own challenges, especially with small lead fingers. Too much paste on the DAP can cause floating of the package during reflow, which can result in cold solder joints on the lead fingers. To minimize this effect, the solder paste coverage area during printing should be roughly 50-75% of the DAP area. Another option is to not solder attach the center DAP at all, which would completely eliminate package floating. This should only be done if there are no thermal concerns for the device. It should also be noted that this could lower the solder joint reliability since the large DAP helps to support the package during mechanical stressing. Figure 4 and Figure 5 show the recommended stencil design. This design utilizes oversized apertures to increase aperture-to-sidewall area ratio. The stencil apertures for the center DAP are roughly 50% of the DAP pad area. To allow for successful paste printing for this small-pad, fine-pitch device; the following best practices should be followed: Type-4 solder paste should be used. This allows for more consistent aperture filling during the print process and promotes better paste release and more consistent transfer to the PCB. A stencil thickness of 4mil is recommended, which increases the aperture to sidewall area ratio. A nickel electroformed stencil with trapezoidal walls is recommended. The nickel material has a lower surface energy holding the solder paste in the aperture and the sidewall of an electroformed stencil is much smoother than a laser cut stencil, even after an electropolish has been employed. The taper of the trapezoidal wall also promotes paste release. Figure 3. Land Pattern and Solder Mask Design with Package Outline Overlaid Rev. 1.0.1 12/18/09 2
AN-8029 0.300 0.400 0.425 0.600 0.400 R0.163 0.300 Solder Paste Reflow APPLICATION NOTE The 28L DR-UMLP is rated to 260 C maximum reflow temperature. It is recommended to use an N 2 atmosphere during reflow to improve wetting and promote self alignment of the device. The appropriate reflow profile should be determined based on the recommendations of the solder paste supplier, with the overall thermal mass of the board and other components taken into account. Table 1 shows the recommended reflow profile parameters for a SAC305 paste, provided by Cookson Electronics. The associated reflow profile is shown in Figure 6. IPC/JEDEC J-STD-20D can be consulted for further information. Figure 4. Recommended Stencil Design with Dimensions Figure 5. Recommended Stencil Design Overlaid with the Recommended PCB Land Pattern and Solder Mask Openings Table 1. Recommended Reflow Profile Parameters for SAC305 Solder Paste in the Surface Mounting of the 28-L DR-UMLP Device Reflow Window Parameters Preheat: Temperature Min. (T MIN) Temperature Max. (T MAX) Time Time Above Liquidus (TAL): Temperature Time Time to Liquidus (TTL) Pb-Free Value 150 C 180 C 45 90s 221 C 45 90s 4 Minute Max. Peak Temperature 235 250 C Ramp-Up Rate 3 C/s Max. Cool-Down Rate 6 C/s Max. Figure 6. Recommended Reflow Profile for Surface Mounting Using SAC305 Solder Paste Note: 1. The profile shows optimum temperatures, with the minimum and maximum temperatures at each time through the profile. Specific values for key temperature profile parameters are listed in Table 1. References 1. IPC-4101: Specification for Base Materials for Rigid and Multilayer Printed Boards. 2. IPC/JEDEC J-STD-20D: Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices. 3. Fairchild Semiconductor Application Note AN-5067: PCB Land Pattern Design and Surface Mount Guidelines for MLP Packages. Rev. 1.0.1 12/18/09 3
AN-8029 APPLICATION NOTE Physical Dimensions 2X 0.10 C 3.60 A B 28X R0.10 3.40 1.84 28X 0.30 PIN1 IDENT 2.90 28X 0.20 (0.243) 1.14 0.425 2.70 TOP VIEW 2X 0.10 C 0.60 0.30 RECOMMENDED LAND PATTERN 0.10 C 0.55 MAX (0.15) 0.08 C 0.05 0.00 C SEATING PLANE SIDE VIEW NOTES: PIN1 IDENT A1 B1 1.89 1.79 A5 B6 (0.160) A. NO JEDEC REGISTRATION APPLIES. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. A14 B14 A13 A6 B7 A7 1.19 1.09 D. LAND PATTERN DESIGN BASED ON FAIRCHILD DESIGN ONLY. E. DRAWING FILENAME: MKT-UMLP28Arev7. 0.375 B13 A12 0.60 0.30 B8 A8 28X 0.25 0.15 28X 0.30 0.20 0.10 C A B 0.05 C BOTTOM VIEW Figure 7. Package Outline Drawing for the 28-Lead, Dual-Row UMLP DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Rev. 1.0.1 12/18/09 4
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