MCR692, MCR693 Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed for overvoltage protection in crowbar circuits. Features Glass-Passivated Junctions for Greater Parameter Stability and Reliability Center-Gate Geometry for Uniform Current Spreading Enabling High Discharge Current Small Rugged, Thermowatt Package Constructed for Low Thermal Resistance and Maximum Power Dissipation and Durability High Capacitor Discharge Current, 750 Amps PbFree Packages are Available* MAXIMUM RATINGS (T J = 25 C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive OffState Voltage (Note ) V DRM, V (T J = 40 to +25 C, Gate Open) V RRM MCR692 MCR693 50 Peak Discharge Current (Note 2) I TM 750 A On-State RMS Current (80 Conduction Angles; T C = 85 C) I T(RMS) 25 A Average On-State Current (80 Conduction Angles; T C = 85 C) Peak Non-Repetitive Surge Current (/2 Cycle, Sine Wave, 60 Hz, T J = 25 C) I T(AV) 6 A I TSM 300 A Circuit Fusing Considerations (t = 8.3 ms) I 2 t 375 A 2 s Forward Peak Gate Current (t.0 s, T C = 85 C) Forward Peak Gate Power (t.0 s, T C = 85 C) Forward Average Gate Power (t = 8.3 ms, T C = 85 C) I GM 2.0 A P GM 20 W P G(AV) W Operating Junction Temperature Range T J 40 to +25 C Storage Temperature Range T stg 40 to +50 C Mounting Torque 8.0 in. lb. Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. V DRM and V RRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. 2. Ratings apply for t w = ms. See Figure for I TM capability for various duration of an exponentially decaying current waveform, t w is defined as 5 time constants of an exponentially decaying current pulse. 3. Test Conditions: I G = 50 ma, V D = Rated V DRM, I TM = Rated Value, T J = 25 C. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 2 3 2 3 SCRs 25 AMPERES RMS 50 thru VOLTS A 4 TO220AB CASE 22A STYLE 3 ORDERING INFORMATION Device Package Shipping MCR692 TO220AB 500/Box G PIN ASSIGNMENT Cathode Anode Gate 4 Anode MCR692G MCR693 TO220AB 500/Box MCR693G A = Assembly Location Y = Year WW = Work Week MCR69 = Device Code x = 2 or 3 AKA = Location Code TO220AB (PbFree) TO220AB (PbFree) K MARKING DIAGRAM AYWW MCR69x AKA 500/Box 500/Box For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD80/D. Semiconductor Components Industries, LLC, 2004 December, 2004 Rev. Publication Order Number: MCR69/D
MCR692, MCR693 THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, JunctiontoCase R JC.5 C/W Thermal Resistance, JunctiontoAmbient R JA 60 C/W Maximum Lead Temperature for Soldering Purposes /8 in from Case for 0 Seconds T L 260 C ELECTRICAL CHARACTERISTICS (T C = 25 C unless otherwise noted.) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current (V AK = Rated V DRM or V RRM, Gate Open) T J = 25 C T J = 25 C ON CHARACTERISTICS Peak Forward On-State Voltage (I TM = 50 A) (Note 4) (I TM = 750 A, t w = ms) (Note 5) Gate Trigger Current (Continuous dc) (V D = 2 V, R L = ) Gate Trigger Voltage (Continuous dc) (V D = 2 V, R L = ) Gate NonTrigger Voltage (V D = 2 Vdc, R L =, T J = 25 C) Holding Current (V D = 2 V, Initiating Current = 200 ma, Gate Open) Latching Current (V D = 2 Vdc, I G = 50 ma) Gate Controlled Turn-On Time (Note 6) (V D = Rated V DRM, I G = 50 ma) (I TM = 50 A Peak) DYNAMIC CHARACTERISTICS Critical Rate-of-Rise of Off-State Voltage (V D = Rated V DRM, Gate Open, Exponential Waveform, T J = 25 C) Critical Rate-of-Rise of On-State Current I G = 50 ma T J = 25 C I DRM, I RRM V TM 6.0 0 2.0.8 A ma I GT 2.0 7.0 30 ma V GT 0.65.5 V V GD 0.40 V I H 3.0 5 50 ma I L 60 ma t gt.0 s dv/dt 0 V/ s di/dt A/ s 4. Pulse duration 300 s, duty cycle 2%. 5. Ratings apply for t w = ms. See Figure for I TM capability for various durations of an exponentially decaying current waveform. t w is defined as 5 time constants of an exponentially decaying current pulse. 6. The gate controlled turn-on time in a crowbar circuit will be influenced by the circuit inductance. V 2
MCR692, MCR693 Voltage Current Characteristic of SCR + Current Anode + Symbol V DRM I DRM V RRM I RRM V TM I H Parameter Peak Repetitive Off State Forward Voltage Peak Forward Blocking Current Peak Repetitive Off State Reverse Voltage Peak Reverse Blocking Current Peak On State Voltage Holding Current I RRM at V RRM on state Reverse Blocking Region (off state) Reverse Avalanche Region V TM I H + Voltage I DRM at V DRM Forward Blocking Region (off state) Anode I TM, PEAK DISCHARGE CURRENT (AMPS) 0 300 200 I TM 50 t w t w = 5 time constants 20.0 2.0 5.0 0 20 50 t w, PULSE CURRENT DURATION (ms) NORMALIZED PEAK CURRENT.0 0.8 0.6 0.4 0 25 50 75 25 T C, CASE TEMPERATURE ( C) Figure. Peak Capacitor Discharge Current Figure 2. Peak Capacitor Discharge Current Derating T C, MAXIMUM ALLOWABLE CASE TEMPERATURE ( C) 25 20 5 0 05 95 90 85 80 75 dc Half Wave 4.0 8.0 2 6 20 I T(AV), AVERAGE ON-STATE CURRENT (AMPS) P (AV), AVERAGE POWER DISSIPATION (WATTS) 32 24 6 8.0 0 0 Half Wave dc T J = 25 C 4.0 8.0 2 6 I T(AV), AVERAGE ON-STATE CURRENT (AMPS) 20 Figure 3. Current Derating Figure 4. Maximum Power Dissipation 3
MCR692, MCR693 r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 0.7 0. 0.07 0.05 0.03 0.02 0.0 0. 2 3 5 0 20 30 50 t, TIME (ms) Z JC(t) = R JC r(t) 200 300 500 k 2 k 3 k 5 k 0 k Figure 5. Thermal Response 0 NORMALIZED GATE TRIGGER CURRENT 5.0 3.0 2.0.0 60 40 20 V D = 2 Volts R L = 0 20 40 60 80 20 T J, JUNCTION TEMPERATURE ( C) 40 NORMALIZED GATE TRIGGER VOLTAGE.4.2.0 0.8 60 40 20 0 20 40 60 V D = 2 Volts R L = 80 T J, JUNCTION TEMPERATURE ( C) 20 40 Figure 6. Gate Trigger Current Figure 7. Gate Trigger Voltage 3.0 NORMALIZED HOLD CURRENT 2.0.0 0.8 V D = 2 Volts I TM = ma 60 40 20 0 20 40 60 80 T J, JUNCTION TEMPERATURE ( C) 20 40 Figure 8. Holding Current 4
MCR692, MCR693 PACKAGE DIMENSIONS TO220AB CASE 22A07 ISSUE AA H Q Z L V G B 4 2 3 N D A K F T U C T SEATING PLANE S R J NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, 982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. INCHES MILLIMETERS DIM MIN MAX MIN MAX A 70 0.620 4.48 5.75 B 80 0.405 9.66 8 C 0.60 0.90 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.42 0.47 3.6 3.73 G 0.095 0.05 2.42 2.66 H 0.0 0.55 2.80 3.93 J 0.04 0.022 6 5 K 00 62 2.70 4.27 L 0.045 0.060.5.52 N 0.90 0 4.83 5.33 Q 0. 0 2.54 3.04 R 0.080 0.0 2.04 2.79 S 0.045 0.055.5.39 T 35 55 5.97 6.47 U 0.000 0.050 0.00.27 V 0.045.5 Z 0.080 2.04 STYLE 3: PIN. CATHODE 2. ANODE 3. GATE 4. ANODE 5
MCR692, MCR693 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 632, Phoenix, Arizona 8508232 USA Phone: 480829770 or 8003443860 Toll Free USA/Canada Fax: 4808297709 or 8003443867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 8002829855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 29 Kamimeguro, Meguroku, Tokyo, Japan 53005 Phone: 8357733850 6 ON Semiconductor Website: Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MCR69/D