1Gsps Dual-Stage Differential Track-and-Hold TH721

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1Gsps Dual-Stage Differential Track-and-Hold TH721 PRODUCT DESCRIPTION TH721 is a dual-stage differential Track-and-Hold amplifier with independent clock inputs. TH721 is able to sample 1 GHz signal with 12 bits of resolution, making it an ideal solution for high-speed high-resolution data acquisition systems like instrumentation, radio, radar, tester, etc. KEY FEATURES 9 GHz small-signal bandwidth 8 GHz large-signal bandwidth (1 Vp-p differential) 100-1000 MHz sampling rate -71 db THD (single-ended 250mVp-p 1GHz input) -66 db THD (single-ended 250mVp-p 2GHz input) -64 db THD (single-ended 250mVp-p 3GHz input) < 100 fs aperture jitter < 250 ps acquisition time < 40 ps rise time (20-80%) Differential analog input/output Excellent performance with single-ended input Adjustable output common mode voltage Independent track mode enable on both stages BLOCK DIAGRAM INP INN TH1 TH2 OBuf OUTP OUTN TM1 CKBuf CKBuf TM2 CK2N CK2P CK1N CK1P 1

ELECTRICAL SPECIFICATIONS Parameter Conditions/Note Min Typical Max Unit ANALOG INPUT Full Scale Range Differential 1 Vp-p Common Mode Voltage -100 0 100 mv Input Resistance Single-ended to GND 45 50 55 Ω Input Capacitance Single-ended to GND 100 ff CLOCK INPUT Amplitude Differential, sinusoidal 250 500 1000 mv Common Mode Voltage -200 0 200 mv Input Resistance 45 50 55 Ω Input Capacitance 100 ff DIGITAL INPUT TM1/2 High Track mode -0.5 0 0.3 V TM1/2 Low Hold mode -5 Open -2 V Max Current Draw Into each lead, TM1/2 high 0.6 ma ANALOG OUTPUT Ext. Termination Voltage Vto 1.5 3.5 V Ext. Termination Resistor Rto, from outputs to Vto 50 Ω Max Swing Differential 1 Vp-p Common Mode Voltage Relative to GND 0.5 2.5 V Average Current Into each output lead TBD ma Max Current Into each output lead TBD ma DC CHARACTERISTIC Gain 1 Offset Voltage -15 15 mv DYNAMIC PERFORMANCE Bandwidth, small signal -3dB, signal < 0.1Vpp 9 GHz Bandwidth, large signal -3dB, signal=1vpp 8 GHz Gain Variation 100MHz to 800MHz -0.5 0.5 db Integrated Noise Input referred TBD µv Noise Floor Input referred TBD nv/ns TH1 Hold Feedthrough 1Vpp 500MHz input -75 db -Above measurements are with differential 1000MHz out-of-phase CK1 & CK2. -Vto=2V 2

ELECTRICAL SPECIFICATIONS (CONTINUED) Parameter Conditions/Note Min Typical Max Unit DYNAMIC PERFORMANCE (continued) SFDR, 60 MHz input Single-ended 250mVpp input 87 db SFDR, 1060 MHz input Single-ended 250mVpp input 71 db SFDR, 2060 MHz input Single-ended 250mVpp input 66 db SFDR, 3060 MHz input Single-ended 250mVpp input 64 db SFDR, 4060 MHz input Single-ended 250mVpp input 59 db SFDR, 5060 MHz input Single-ended 250mVpp input 51 db SFDR, 6060 MHz input Single-ended 250mVpp input 48 db SFDR, 7060 MHz input Single-ended 250mVpp input 48 db SFDR, 60 MHz input Single-ended 500mVpp input 77 db SFDR, 1060 MHz input Single-ended 500mVpp input 62 db SFDR, 2060 MHz input Single-ended 500mVpp input 57 db SFDR, 3060 MHz input Single-ended 500mVpp input 55 db SFDR, 4060 MHz input Single-ended 500mVpp input 49 db SFDR, 5060 MHz input Single-ended 500mVpp input 42 db SFDR, 6060 MHz input Single-ended 500mVpp input 41 db SFDR, 7060 MHz input Single-ended 500mVpp input 42 db SFDR, 60 MHz input Single-ended 1Vpp input 68 db SFDR, 1060 MHz input Single-ended 1Vpp input 51 db SFDR, 2060 MHz input Single-ended 1Vpp input 46 db SFDR, 3060 MHz input Single-ended 1Vpp input 45 db SFDR, 4060 MHz input Single-ended 1Vpp input 38 db SFDR, 5060 MHz input Single-ended 1Vpp input 35 db SFDR, 6060 MHz input Single-ended 1Vpp input 33 db SFDR, 7060 MHz input Single-ended 1Vpp input 33 db -Above measurements are with single-ended 1000MHz out-of-phase CK1 & CK2. -Vto=2V 3

ELECTRICAL SPECIFICATIONS (CONTINUED) Parameter Conditions/Note Min Typical Max Unit DYNAMIC PERFORMANCE (continued) THD, 60 MHz input Single-ended 250mVpp input -85 db THD, 1060 MHz input Single-ended 250mVpp input -66 db THD, 2060 MHz input Single-ended 250mVpp input -63 db THD, 3060 MHz input Single-ended 250mVpp input -63 db THD, 4060 MHz input Single-ended 250mVpp input -53 db THD, 5060 MHz input Single-ended 250mVpp input -48 db THD, 6060 MHz input Single-ended 250mVpp input -47 db THD, 7060 MHz input Single-ended 250mVpp input -50 db THD, 60 MHz input Single-ended 500mVpp input -77 db THD, 1060 MHz input Single-ended 500mVpp input -60 db THD, 2060 MHz input Single-ended 500mVpp input -56 db THD, 3060 MHz input Single-ended 500mVpp input -56 db THD, 4060 MHz input Single-ended 500mVpp input -46 db THD, 5060 MHz input Single-ended 500mVpp input -42 db THD, 6060 MHz input Single-ended 500mVpp input -41 db THD, 7060 MHz input Single-ended 500mVpp input -44 db THD, 60 MHz input Single-ended 1Vpp input -69 db THD, 1060 MHz input Single-ended 1Vpp input -51 db THD, 2060 MHz input Single-ended 1Vpp input -47 db THD, 3060 MHz input Single-ended 1Vpp input -46 db THD, 4060 MHz input Single-ended 1Vpp input -37 db THD, 5060 MHz input Single-ended 1Vpp input -34 db THD, 6060 MHz input Single-ended 1Vpp input -33 db THD, 7060 MHz input Single-ended 1Vpp input -37 db -Above measurements are with single-ended 1000MHz out-of-phase CK1 & CK2. -Vto=2V 4

ELECTRICAL SPECIFICATIONS (CONTINUED) Parameter Conditions/Note Min Typical Max Unit DYNAMIC PERFORMANCE (continued) SFDR, 60 MHz input Differential 250mVpp input 87 db SFDR, 1060 MHz input Differential 250mVpp input 80 db SFDR, 2060 MHz input Differential 250mVpp input 75 db SFDR, 3060 MHz input Differential 250mVpp input 70 db SFDR, 4060 MHz input Differential 250mVpp input 57 db SFDR, 5060 MHz input Differential 250mVpp input 60 db SFDR, 6060 MHz input Differential 250mVpp input 57 db SFDR, 7060 MHz input Differential 250mVpp input 61 db SFDR, 60 MHz input Differential 500mVpp input 80 db SFDR, 1060 MHz input Differential 500mVpp input 76 db SFDR, 2060 MHz input Differential 500mVpp input 71 db SFDR, 3060 MHz input Differential 500mVpp input 68 db SFDR, 4060 MHz input Differential 500mVpp input 51 db SFDR, 5060 MHz input Differential 500mVpp input 59 db SFDR, 6060 MHz input Differential 500mVpp input 53 db SFDR, 7060 MHz input Differential 500mVpp input 55 db SFDR, 60 MHz input Differential 1Vpp input 75 db SFDR, 1060 MHz input Differential 1Vpp input 69 db SFDR, 2060 MHz input Differential 1Vpp input 67 db SFDR, 3060 MHz input Differential 1Vpp input 63 db SFDR, 4060 MHz input Differential 1Vpp input 45 db SFDR, 5060 MHz input Differential 1Vpp input 50 db SFDR, 6060 MHz input Differential 1Vpp input 55 db SFDR, 7060 MHz input Differential 1Vpp input 59 db -Above measurements are with differential 1000MHz out-of-phase CK1 & CK2. -Vto=2V 5

ELECTRICAL SPECIFICATIONS (CONTINUED) Parameter Conditions/Note Min Typical Max Unit DYNAMIC PERFORMANCE (continued) THD, 60 MHz input Differential 250mVpp input -85 db THD, 1060 MHz input Differential 250mVpp input -80 db THD, 2060 MHz input Differential 250mVpp input -69 db THD, 3060 MHz input Differential 250mVpp input -61 db THD, 4060 MHz input Differential 250mVpp input -56 db THD, 5060 MHz input Differential 250mVpp input -55 db THD, 6060 MHz input Differential 250mVpp input -51 db THD, 7060 MHz input Differential 250mVpp input -54 db THD, 60 MHz input Differential 500mVpp input -76 db THD, 1060 MHz input Differential 500mVpp input -73 db THD, 2060 MHz input Differential 500mVpp input -60 db THD, 3060 MHz input Differential 500mVpp input -53 db THD, 4060 MHz input Differential 500mVpp input -50 db THD, 5060 MHz input Differential 500mVpp input -49 db THD, 6060 MHz input Differential 500mVpp input -51 db THD, 7060 MHz input Differential 500mVpp input -45 db THD, 60 MHz input Differential 1Vpp input -71 db THD, 1060 MHz input Differential 1Vpp input -62 db THD, 2060 MHz input Differential 1Vpp input -48 db THD, 3060 MHz input Differential 1Vpp input -43 db THD, 4060 MHz input Differential 1Vpp input -41 db THD, 5060 MHz input Differential 1Vpp input -36 db THD, 6060 MHz input Differential 1Vpp input -34 db THD, 7060 MHz input Differential 1Vpp input -35 db -Above measurements are with differential 1000MHz out-of-phase CK1 & CK2. -Vto=2V 6

TRACK-TO-HOLD AND HOLD STATE, TH1 Aperture Delay After CK1 goes negative 60 ps Aperture Jitter Jitter free 0.5 Vpp 1 GHz CK1 100 fs Settling Time To 1 mv 300 ps Differential Pedestal Relative to Vin -1 % Differential Droop Rate Relative to Vin -0.5 %/ns Hold Noise TBD µv/ Hz Min Clock Frequency 50% duty cycle clock 100 MHz Max Clock Frequency 50% duty cycle clock 1000 MHz Max Hold Time 10 ns HOLD-TO-TRACK AND TRACK STATE, TH1 Acquisition Time To 1 mv, FSR step input 250 ps Max Acquisition Slew Rate FSR step input 20 V/ns Rise Time 20-80% 40 ps Min Track Time 0.3 ns Recovery Time 3 ns TRACK-TO-HOLD AND HOLD STATE, TH2 Aperture Delay After CK1 goes negative 60 ps Settling Time To 1 mv 300 ps Differential Pedestal Relative to Vin -0.2 % Differential Droop Rate Relative to Vin -0.05 %/ns Hold Noise TBD µv/ Hz Min Clock Frequency 50% duty cycle clock 100 MHz Max Clock Frequency 50% duty cycle clock 1000 MHz Max Hold Time 10 ns HOLD-TO-TRACK AND TRACK STATE, TH2 Min Track Time After TH1 in Hold Mode 0.5 ns Recovery Time 4 ns -Above measurements are with differential 1000MHz out-of-phase CK1 & CK2 clocks. -Vto=2V 7

ELECTRICAL SPECIFICATIONS (CONTINUED) Parameter Conditions/Note Min Typical Max Unit POWER SUPPLY Positive Supply Voltage Vcc 4.75 5 5.25 V Vcc Current Icc 110 ma Negative Supply Voltage Vee -5.45-5.2-4.95 V Vee Current Iee 230 ma Vto Current Ivto 40 ma Power Dissipation 1.9 W Warm Up Time 10 s 8

TYPICAL OUTPUT SPECTRUM 0-10 -20 Relative Power (db) -30-40 -50-60 -70-80 0.E+00 5.E+07 1.E+08 2.E+08 2.E+08 3.E+08 Freq (Hz) Input: 3060 MHz, 250 mvpp Single-ended Clock: 1000 MHz 9

LINEARITY MEASUREMENTS Euvis TH721 Track & Hold 12 Bit 1GS/s 1dB Compression of Output Signal @ ~250MHz THA Output Power (dbm) -2 8-2 6-2 4-2 2-2 0-1 8-1 6-1 4-1 2-1 0 10 8 6 4 2 0-2 -4-6 -8-10 -12-14 -16-18 -20-22 -24-26 -28-30 -32-8 -6-4 -2 0 2 4 6 8 10121416182022 THA Input Power (dbm) THA Output Signal @250MHz Linear Estimate (dbm) 1dB Compression Estimate 1 db compression point = 7 dbm output conversion gain @ 1 db compression point = -3 db -Input power into track and hold amplifier is single-ended. The single-ended output will be 6 db lower than the single-ended input. Output power in the chart does not reflect the 6dB correction. 10

LINEARITY MEASUREMENTS CONTINUED TH721 2nd and 3rd Order Intercepts 50 40 30 THA Output Power (dbm) 20 10 0-14 -12-10 -8-6 -4-2 0-10 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38-20 -30-40 -50-60 -70-80 Fund HD2 HD3 Linear (Fund) Linear (HD2) Linear (HD3) -90-100 -110 THA Input Power (dbm) 2 nd Order intercept located: (29.35 dbm input, 18.3 dbm output) 3 rd Order intercept located: (22.1 dbm input, 11.1 dbm output) 11

PACKAGE OUTLINE DIMENSIONS Unit: mm Package Format: 32-pin QFN Package Size: 5 mm x 5 mm Pin Pitch: 0.5 mm Top View 32 31 30 29 28 27 26 25 01 02 03 04 05 06 07 08 EUVIS TH721 24 23 22 21 20 19 18 17 09 10 11 12 13 14 15 16 5 Pin 1 Metal Lead Seating Plane 0.025 5 3.62 0.5 3.62 0.4 0.25 0.9 Bottom View Side View 12

PIN DESCRIPTION Pin Name Function 2, 23 VCC Positive power supply 7, 18 VEE Negative power supply 8, 17 VTO Output termination voltage 28 INP Positive input 29 INN Negative input 13 OUTP Positive output 12 OUTN Negative output 4 CK1P Clock 1 positive input 5 CK1N Clock 1 negative input 21 CK2P Clock 2 positive input 20 CK2N Clock 2 negative input 31 TM1 Track mode select for T/H stage 1 26 TM2 Track mode select for T/H stage 2 3, 6, 9, 11, 14, 16, 19, 22, 25, 27, 30, 32 GND Ground 1, 10, 15, 24 NC No connection 13

ABSOLUTE MAXIMUM RATINGS Vcc 0V to 6V Vee -6V to 0V Vto 0V to 6V Inputs (INP/N, CK1P/N, CK2P/N) -1V to 1V Outputs (OUTP/N) -2V to Vcc θ JA TBD Maximum Junction Temperature 150 C Operating Temperature Range 0 C to +70 C Storage Temperature Range -40 C to +125 C LEAD TEMPERATURE RANGE (SOLDERING 60 SEC) TBD 14

EVALUATION PCB LAYOUT Top View Bottom View -Parts labeled 1 are 0603 10 uf Capacitors. -Parts labeled 2 are 0402 100nF Capacitors. 15

TYPICAL CONNECTION DIAGRAM Description: The measurements in the TH721 data sheet were taken using the setup above. First, connect the output OP to a spectrum analyzer and output ON to an oscilloscope. Then, connect the differential analog input to IP and IN. Connect the clock frequency to CK1P and CK2N. Terminate the unconnected SMA connectors with a 50Ω termination caps. After the SMA connections are properly made, connect power supply outputs to the corresponding DC pins without turning on the power. When ready to use, supply a DC voltage of +5.0V to VCC, +2.0V to VTO, and 5.2V to VEE. -Using appropriate band-pass filters for the input signal may improve performance. 16

ORDERING INFORMATION E-mail: sales@euvis.com Tel: (805) 583-9888 Fax: (805) 583-9889 The information contained in this document is based on preliminary product test results. Characteristic data and other specifications are subject to change without notice. Customers are advised to confirm information in this advanced datasheet prior to using this information or placing the order. Euvis Inc. does not assume any liability arising from the application or use of any product or circuit described herein, neither does it convey any license under its patents or any other rights. 17