Addressable peripheral drivers

ESCRIPTION The addressable peripheral drivers are high current latched drivers, similar in function to the 9 address decoder. The device has eight arlington power outputs, each capable of 5m load current. The outputs are turned on or off by respectively loading a logic high or logic low into the device data input. The required output is defined by a -bit address. The device must be enabled by a input line. common clear input,, tur all outputs off when a logic low is applied. The NE59 has eight open-collector arlington outputs which sink current to ground. The device is packaged in a 6-pin plastic or Cerdip package. The NE59 has eight open-emitter arlington outputs which source current to an external load from a common collector line, V S. This V S line need not necessarily be the same as the 5V V CC supply. The device is packaged in an 8-pin plastic or Cerdip package. FETURES 8 high current outputs Low-loading bus compatible inputs Power-on clear eures safe operation NE59 will operate in addressable or demultiplex mode llows random (addressed) data entry Easily expandable NE59 is pin compatible with 5/7LS59 PPLICTIONS Relay driver Indicator lamp driver Triac trigger LE display digit driver Stepper motor driver PIN CONFIGURTIONS N Package 5 6 7 6 5 GN 8 9 TOP VIEW NE59 N Package CS 8 7 6 5 5 6 7 8 GN 9 TOP VIEW NE59 V CC 7 6 5 V CC 7 6 5 V S ORERING INFORMTION ESCRIPTION TEMPERTURE RNGE ORER COE WG # 6-Pin Plastic ual In-Line Package (IP) to +7 C NE59N 6C 8-Pin Plastic ual In-Line Package (IP) to +7 C NE59N 6C ugust, 99 58 85-95 7

PIN ESIGNTION 59 PIN NO. 59 PIN NO. SYMBOL NME & FUNCTION - - - -bit binary address on these pi defines which of the 8 output latches is to receive the data. -7, 9-5-8, - - 7 The 8 device outputs. The NE59 has open-collector arlington outputs. The NE59 has open emitter-follower outputs. 5 The data input. When the chip is enabled, this data bit is traferred to the defined output such that: tur output switch ON tur output switch OFF Thus in logic terms, the NE59 inverts data to the relevant output. The NE59 retai true data at the output. 6 The chip enable. When this input is low, the output latches will accept data. When goes high, all outputs will retain their existing state regardless of address or data input conditio. 5 7 The clear input. When goes low all output switches are turned OFF. On the NE59, a high data input will override the clear function on the addressed latch. On the NE59, low will override any other condition. - CS The chip select input provides for an additional level of address decoding. - V S The V S line provides the power to all 8 output devices. It is connected to the collectors of all 8 output traistors. This pin may be connected to the V CC or another supply. BLOCK IGRM OF 8 ECOER COMTROL GTE 5 6 cs 7 (NE5 ONLY) INPUT STGE OUTPUT STGE V CC NE59 NE59 ugust, 99 59

TRUTH TBLE (NE59) CL R C E INPUTS OUTPUTS MOE L H X X X X H H H H H H H H Clear L L L L L L H H H H H H H H L L H L L L L H H H H H H H L L L H L L H H H H H H H H emultiplex L L H H L L H L H H H H H H L L L H H H H H H H H H H H L L H H H H H H H H H H H L H H X X X X N- Memory H L L L L L H N- H L H L L L L N- H L L H L L N- H N- ddressable Latch H L H H L L N- L N- H L L H H H N- H H L H H H H N- L X=on t care condition N- =Previous output state L=Low voltage level/ OFF output state H=High voltage level/ ON output state TRUTH TBLE (NE59) CL R C E INPUTS OUTPUTS MOE C S L X X X X X X L L L L L L L L Clear H H H X X X X N- H H L X X X X N- Memory H L H X X X X N- H L L L L L L L N- H L L H L L L H N- H L L L H L L N- L N- ddressable Latch H L L H H L L N- H N- H L L L H H H N- L H L L H H H H N- H X=on t care condition N- =Previous output state L=Low voltage level/ OFF output state H=High voltage level/ ON output state 5 6 5 7 6 7 ugust, 99 5

BSOLUTE MXIMUM RTINGS SYMBOL PRMETER RTING UNIT V CC Supply voltage -.5 to +7 V V IN Input voltage -.5 to +5 V V OUT Output voltage V V S V S -V CC I OUT P NE59 to +7 NE59 Source bus voltage NE59 only Source/supply differential voltage NE59 only Output current to V CC -.5 to +7 V -5 to + V Each output m ll outputs Maximum power dissipation T =5 C (still air) NE59 N package 5 mw NE59 N package 69 T mbient temperature range to +7 C T J Junction temperature 65 C T STG Storage temperature range -65 to +5 C T SOL Lead soldering temperature ( sec max). erate above 5 C at the following rates: N package at.6mw/ C. erate above 5 C at the following rates: N package at.5mw/ C C ugust, 99 5

C ELECTRICL CHRCTERISTICS V CC =.75 to 5.5V, C T 7 C unless otherwise specified., SYMBOL PRMETER TEST CONITIONS Input voltage LIMITS Min Typ Max V IH High. V V IL Low.8 Output voltage V OL Low (NE59 only) I OL =5m, T =5 C.. UNIT Over temperature.5 V V OH High (NE59 only) I OH =-5m, V CC =V S =5V.9 Input current I IH High V IN =V CC. I IL Low V IN =V input -5-6 µ ll other inputs -5-5 I OH Leakage current V OUT =5.5V 5 µ I CCL Supply current V S =V CC =5V ll outputs low NE59 5 NE59 5 5 I CCH ll outputs high m NE59 5 5 NE59 5 P Power dissipation No output load 5 mw. ll typical values are at V CC =5V and T =5 C. For the NE59 V S =V CC in all tests.. Supply current for the NE59 is measured with no output load. ugust, 99 5

SWITCHING CHRCTERISTICS V CC = 5V, T = 5 C SYMBOL PRMETER TO FROM Propagation delay time NE59 Low-to-High Output 65 High-to-Low 5 Low-to-High Output ata 65 High-to-Low Low-to-High Output ddress High-to-Low Low-to-High Output 65 High-to-Low NE59 Min Typ Max Min Typ Max Low-to-High Output CS High-to-Low 7 Switching setup requirements 5 6 5 7 5 65 5 75 8 7 8 5 t S(H) Chip enable High data t S(L) Chip enable Low data t S() Chip enable ddress t H(H) Chip enable High data t H(L) Chip enable Low data t S(CS) Chip enable Low chip select t PW(E) Chip enable pulse width. See Turn-On and Turn-Off elays, Enable to Output and Enable Pulse Width timing diagram.. See Turn-On and Turn-Off elays, ata to Output timing diagram.. See Turn-On and Turn-Off elays, ddress to Output timing diagram.. See Turn-Off elay, Clear to Output timing diagram. 5. See Setup and Hold Time, ata to Enable timing diagram. 6. See Setup Time, ddress to Enable timing diagram. 8 UNIT FUNCTIONL ESCRIPTION These peripheral drivers have latched outputs which hold the input data until cleared. The NE59 has active-low, open-collector outputs, while the NE59 has active-high, uncommitted (open) emitter outputs. ll outputs are cleared when power is first applied. ddressable Latch Function ny given output can be turned on or off by presenting the address of the output to be set or cleared to the three address pi, by holding the input High to turn on the selected input, or by holding it Low to turn off, holding the input High, and bringing the input Low. Once an output is turned on or off, it will remain so until addressed again, or until all outputs are cleared by bringing the,, and inputs Low. For NE59, CS must be brought Low any time is Low if any outputs are to be changed. emultiplexer Operation By bringing the and inputs Low and the input High, the addressed output will remain on and all other outputs will be off. This condition will remain only as long as the output is addressed. For the NE59, the CS input must also be Low. High Current Outputs The obvious advantage of these devices over the 9 and N7LS59 (which provide a similar function) is the fact that the NE59 and NE59 are capable of output currents of 5m at each of their eight outputs. It should be noted, however, that the load power dissipation would be over.5w if all 8 outputs were to carry their full rated load current at one time. Since the total power dissipation is limited by the package to W, and since the power dissipation due to supply current is.5w, the total load power dissipation by the device is limited to.75w, and decreases as ambient temperature rises. The maximum die junction temperature must be limited to 65 C, and the temperature rise above ambient and the junction temperature are defined as: t R =θ J P t J =t +t R where θ J is die junction to ambient thermal resistance. P is total power dissipation t R is junction temperature rise above ambient t j is die junction temperature t is ambient (surrounding medium) temperature For example, if we are using the NE59 in a plastic package in an application where the ambient temperature is never expected to rise above 5 C, and the output current at the 8 outputs, when on, are,, 5,, 5,, 8, and m, we find from the graph of output voltage vs load current that the output voltages are expected to be about.9,.75,.78,.,.5,.7,.9, and.v, respectively. Total device power due to these loads is found to be 7.5mW. dding the 5mW due to the power supply brings total device power dissipation to 7.5mW. The thermal resistances are 8 C per W for plastic packages and C per W for Cerdips. Using the equatio above we find: ugust, 99 5

Plastic t R =8.75=6 C Plastic t J =5+6= C Cerdip t R =.75=7. C Cerdip t J =5+7.=. C Thus we find that t J for either package is below the 65 C maximum and either package could be used in this application. The graphs of total load power vs ambient temperature would also give us this same information, although interpreting the graphs would not yield the same accuracy. TYPICL PERFORMN CHRCTERISTICS.. OUTPUT VOLTGE (V)..8.6 C 5 C 7 C OUTPUT VOLTGE (V CC V O ).8 C 5 C.6 7 C... 5 5. 5 5 5 OUTPUT LO CURRENT (m) OUTPUT LO CURRENT (m) Output Voltage vs Load Current (NE59) Output Voltage rop vs Load Current (NE59).. TOTL LO POWER (W).75.5.5 F PCKGE N PCKGE TOTL LO POWER (W).75.5.5 F PCKGE N PCKGE 5 5 75 5 TEMPERTURE ( o C) Total Load Power vs Temperature (NE59) 5 5 75 5 TEMPERTURE ( o C) Total Load Power vs Temperature (NE59) ugust, 99 5

TIMING IGRMS t PW t PW (NE59) (NE59) (NE59) (NE59) Other inputs = H, CS = L, = Stable Turn-On and Turn-Off elays, Enable-to-Output and Enable Pulse Width Other inputs CS = L, = H, = Stable Turn-On and Turn-Off elays, ata-to-output (NE59) (NE59) (NE59) Other inputs = L, = L, = H Other inputs CS = H, = H Turn-On and Turn-Off elays, ddress-to-output Turn-On and Turn-Off elays, Clear-to-Output ÉÉÉÉÉ Other inputs = H, CS = L t S (NE59) (NE59) ÉÉÉ ÉÉÉÉÉ ÉÉÉ t SH ÉÉÉ ÉÉ t HH Other inputs = H, CS = L, = Stable ÉÉ ÉÉ t SL t HL Set-Up Time, ddress-to-enable Set-Up and Hold Time, ata-to-enable ugust, 99 55

TYPICL PPLICTIONS µp T BUS + 5V +5V I CONTROL 59 CS (59 ONLY) 5 6 7 59/ CS (59 ONLY) 5 6 7 59 5 6 R L +6V RELY LO 7 CLER,,, and CS may be connected to the address bus if permitted by system design. Turn-On and Turn-Off elays, ddress-to-output NE59 riving Simple Loads +5V +5V +5V 555 BIT COUNTER 59 5 6 7 NE59 Operating in emultiplex Mode ugust, 99 56