CHAPTER 2: BIPOLAR JUNCION TRANSISTOR DR. PHAM NGUYEN THANH LOAN Hanoi, 9/24/2012
Contents 2 Structure and operation of BJT Different configurations of BJT Characteristic curves DC biasing method and analysis Base bias Collector-feedback bias Voltage divider bias AC signal analysis Impact of other parameters (temperature, leakage currents) The content of these slides are based on the book titled Electronics Devices and Circuit theory of Robert Boylestad
Structure and operation of BJT 3 BJT structure BJT :Bipolar Junction Transistor 2 kinds of BJT: NPN & PNP 3 terminals: E, B và C E: Emitter; B: Base, C: Collector Base located in the middle: thinner than E & C; and lower dope
Structure and operation of BJT 4 Bias condition for 2 junctions: J BE & J BC Junction BE in forward bias: electrons (e) move from E region to B region to create the current I E (diffusion current; flow of majority carriers) Junction BC in reverse bias: e that moved from E to B then move from B to C to create the current I C (drift current, flow of minority carriers) The combination of some electrons with holes in B region creates the current I B So: I E = I C + I B
Structure and operation of BJT 5 BJT symbol I B I C I E 3 terminals: B, E và C Arrow instructs the current direction between B & E Conventional current is the flow of positive charges (holes) NPN: B E PNP: E B
Technical parameters 6 I E = I C + I B I C = αi E + I CBO I C = βi B β = 100 200 (may be higher) I C αi E (neglect leakage I CBO ) α = 0.9 0.998. β is DC current gain α is DC current transfer coefficient 1
Technical parameters 7 I E = I C + I B I C = αi E + I CBO I C = β*i B β = 100 200 (may be higher) I C αi E (neglect leakage I CBO ) α = 0.9 0.998. β is DC current gain α is DC current transfer coefficient 1
8 BJT as an amplifier Different amplifier configurations 3 configurations Common emitter (CB) Common base (CB) Common collector (CC) Look at the input and output to distinguish these configurations Configuration BC EC CC Input E B B Output C C E
9 CE configuration E is used in common for in and out Input: r e is considered as AC resistor of diode BE r e =26mV/I E Output: I c = βi b 9
CE configuration small signal 10 Z i = U be /I b βi b r e /I b βr e (~ n100ω nkω) Z o = r o (ignore in r e model) A v = - R L /r e (r o ) A i = I c /I b = β Characteristics + Z i, Z o average + A v, A i high 10
Characteristic curves: CE 11 Input and output characteristic curves of CE configuration 11
Characteristic curves: CE 12 0<V CE <0.7V: Junction BE starts moving to forward bias I C increases gradually V CE >0.7V: Junction BE is in FB and Junction BC in reverse I C = β*i B
CB configuration 14 B is used in common for in and out Input: r e is considered as AC resistor of diode BE r e =26mV/I E Isolation between in and out Output: I c =αi e 14
CB configuration 15 1) Z i = r e (nω-50 Ω) 2) Z o = r o (nmω) 3) A v = αr L /r e R L /r e quite big, U o & U i in phase 4) A i = -α 1 15
Characteristic curves: CB 16 Input and output characteristic curves of CB configuration
17 CC configuration Similar to CE configuration Refer to Electronic Devices Thomas Floyd 17
Limits of operation 18 Two limits: cut-off region Saturation region
Cutoff and saturation 19 Cutoff state Saturation state
20 DC bias: DC operating point & DC load line
DC bias 21 A transistor must be properly biased in order to operate as an amplifier DC bias can be considered as supply power to BJT so that NPN: V E < V B < V C (J E : in Forward; J C : in Reverse bias) PNP: V E > V B > V C DC bias is characterized by Q-point (DC operating point) and DC load line
DC bias 22 NOTES: REMEMBER some equations: V BE 0,6 0,7V (Si) ; 0,2 0,3(Ge) I E = I C + I B I C = βi B There 3 types of bias circuits Base bias Collector-feedback bias Voltage divider bias I C αi E Question: How many amplifier circuits can be designed?
23 3 types of baising Base bias Voltage divider bias Collector feedback bias
Example of DC bias 24 Q1. What are the amplifier configuration of these circuits? Q2. What kind of DC bias? And then draw DC equivalent circuit. (a) (b) (c) Question 3: How many amplifier circuits can be designed?
25 Base bias Consider the analysis for only EC configuration (similar analysis can be obtained for BC and CC)
Base bias 26 BE loop: Vcc I B R B U BE = 0 I B = (Vcc - U BE )/R B I C =β*i B CE loop: U CE = Vcc - I C R C
Voltage divider bias 27 Method 1: Thevenin equivalent circuit: * Group R1, R2 and Vcc can be considered as follows: R BB =R 1 //R 2 V BB = V cc * R 2 /(R 1 +R 2 ) Now it is similar to base-bias analysis Current and voltage do not depend on β Method 2: Approximative analysis If β*r 2 10R 2 -> I 2 I 1 V BB =V cc *R 2 /(R 1 +R 2 ) V E =V BB -U BE I c I e =V e /R e U CE =V cc - I C (R C +R E )
Collector-feedback bias 28 BE loop: (1) V cc - I c R C I B R B U BE I E R E =0 (2) I C = β *I B ; I E I C (3) Kirchoof cho dòng tại C: I C = I B + I c I c = I C - I B = (β-1)i B (1)+(2)+(3) I B = (Vcc - U BE )/[R B + β(rc+re)] CE loop: U CE = Vcc I C (R C +R E ) Quite stable
Example 29 Analyze the following circuit and then determine its Q- point and DC loadline
Example 30 Analyze the following circuit and then determine its Q- point and DC loadline
31 Analysis by method 1
Example 32 Analyze the following circuit and determine its Q-point and DC loadline
Example 33 Analyze the following circuit and determine its Q-point and DC loadline
Example 34 Analyze the following circuit and determine its Q-point and DC loadline
35 AC analysis (Small signal analysis)
Small signal analysis 36 Small signal analysis: Small signal refers to AC signal with small amplitude that take up a relatively small percentage of an amplifier s operation range (compared to DC power supply) The operation region on amplifier should be in linear BJT model for small signal analysis Represent the BJT by an equivalent circuit that allows to visualize and analyze the operation of BJT as an amplifier
Example of CE configuration 37 Output and input signal is out of phase Output signal is amplified
Gain and impedances 38
AC equivalent circuit 39 1. Setting all DC sources to zero 2. Replacing all capacitors by a short-circuit equivalent (wire) 3. Regrouping all elements (resistors) in parallel (introduced by step 1 and 2) 4. Redrawing the network in a more convenient and logical form
AC analysis 40 BJT amplifier is considered linear be able to be analyzed DC and AC separately (using superposition theorem) Different approaches Using graphical determination method Using equivalent circuits r E model Hybrid equivalent model (quite popular in the past)
AC analysis methods Graphical Analysis 41 Q-point and DC load-line Quiescent point (Q-point) is fixed on the output characteristic curve and corresponding to a fixed collector-to-emitter voltage (V CE ) DC load-line is used to describe the DC operation of BJT, a straight line from saturation point (I C =I Cmax, y-axe) to cutoff point (V CE =V CEmax, x-axe) Q-point : intersect between DC load line and characteristic curve DC load line vs. AC load line DC load line: V CE = V CC I C R C AC load line: V CE = V CC - I c (R C //R L )
AC analysis methods Graphical determination 42 Input and output characteristic curves of EC config. 42
AC load line determination 43 AC load line (Slope_AC: 1/(Rc //Rtai) DC load line (slope= 1/Rc) Q N AC loadline is steeper than DC loadline Graphically: ON = OQ + QN where QN = I C-Q /Slope_AC = IQ*(Rc//Rtai) A straight line through Q_point and N : AC load line
AC analysis methods Graphical determination 44 Q_point deplacement when R c, V cc, I B vary respectively Variation of R C Variation of V CC Variation of I B 44
AC analysis methods Graphical determination 45 Basing on input and output characteristic curves determine small signal input and output waveform 45
AC analysis methods Graphical determination 46 Δv be Δi b Δv ce Δi c A i = i o /i i = Δi c /Δi b A V = v o /v i = Δv ce /Δv be Z in = v i /i i = Δv be /Δi b Z out = v o /i o = Δv ce /Δi c 46
AC analysis methods Graphical determination 47 Impact of Q point on AC output signal Q closed to cutoff BJT is closed to OFF operation, with a very small AC input amplitude output voltage is distorsed (is cut) at upper-part Q closed to saturation BJT is closed to saturation operation, with a very small AC input amplitude output volage is distorsed (is cut) at lower-part Large-signal may be cut at upper and lower part
AC analysis 48 BJT amplifier is considered linear be able to be analyzed DC and AC separately (using superposition theorem) Different approaches Using graphical determination method Using equivalent circuits r E model Hybrid equivalent model (quite popular in the past)
Two-port model 49 Most used for small signal analysis Characterized by 2 input terminals and 2 output terminals (4 -terminals model) The common terminal is used for input and output
Remind: AC equivalent circuit 50 1. Setting all DC sources to zero 2. Replacing all capacitors by a short-circuit equivalent (wire) 3. Regrouping all elements (resistors) in parallel (introduced by step 1 and 2) 4. Redrawing the network in a more convenient and logical form ` ` `
Remind: AC equivalent circuit 51 Equivalent circuit after step 1 and 2 Equivalent circuit after step 3 and 4??????????????????
AC analysis 52 BJT amplifier is considered linear be able to be analyzed DC and AC separately (using superposition theorem) Different approaches Using graphical determination method Using equivalent circuits r E model Hybrid equivalent model (quite popular in the past)
AC analysis methods Hybrid equivalent model 53 U & I relation: I v I r U i =h 11 I i +h 12 U o U v 2 ports U r I o =h 21 I i +h 22 U o h ij is determined at a given operating point (can be different from Q_point) Index e (or b, c) illustrated for CE topology (or CB, CC)
AC analysis methods Hybrid equivalent model 54 Parameters EC BC CC h 11 (h i ) 1kΩ 20Ω 1kΩ h 12 (h r ) 2,5x10-4 3x10-4 1 h 21 (h f ) 50-0,98-50 h 22 (h o ) 25μA/V 0,5μA/V 25μA/V 1/h 22 40kΩ 2MΩ 40kΩ
AC analysis methods Hybrid equivalent model 55 Other names of h ij Read part 7.6, chapter 7 for further understanding h i h r V i h f I in h 0
AC analysis methods Y equivalent model 56 I and V relation: I v =y 11 U v +y 12 U r I r =y 21 U v +y 22 U r Refer to chapter 7 Boylestad s book.
AC analysis methods r E model 57 BJT is modeled by a diode and current source Input : BE junction is characterized by a diode in Forward bias Output: dependent current source where controlled current is input current that is expressed by I c = βi b or I c =αi e. 3 configurations: EC; BC và CC
AC analysis methods r E model 59 EC BC CC c e c c e b 59 e
AC analysis methods r E model 60 Refer to T model as learnt in Electronics Devices Course Determine Rin & Iout =f(iin) to obtain r e model EC BC CC e c c c e Input: ib, vb Output: ic, vc Rin = vb/ib = βr e iout = ic = βi = βib b Input: ie, ve Output: ic, vc Rin = ve/ie = r e iout = ic = αi in = αi e e Input: ib, vb Output: ic, vc Rin = vb/ib = βr e
AC analysis methods r E model 61 Analyze EC 61
EC configuration with fixed biasing 62 EC 62
EC configuration with fixed biasing 63 T model (learnt in Electronics Devices Courses) 63
EC configuration with fixed biasing 64 1) Z i = R b βr e if R b 10βr e, Z i βr e 2) Z o = R c r o if r o 10R c, Z o R c 3) A v = - (R c r o )/r e - R c /r e (β appered in r e ) U i & U o out of phase180 o 4) A i = βr b r o / [(r o +R c )(R b +βr e )] β (I i current source. I o collector current)
65 EC configuration with fixed biasing
66 EC configuration with voltage divider
67 EC configuration with voltage divider
EC configuration with voltage divider 68 1) Z i = R 1 R 2 βr e = R βr e 2) Z o = R c r o (If r o 10R c, Z o R c ) 3) A v = - (R c r o )/r e - R c /r e Similar to EC with fixed biasing βr /(R + βr e ) β if r o 10R c if R 10 βr e
69 EC configuration with voltage divider
70 EC configuration with feedback biasing
71 EC configuration with feedback biasing
72 EC configuration with feedback biasing 1) Z i = r e /(1/β+R c /R f ) 2) Z o = R c //R f 3) A v = -R c /r e 4) A i = βr f /(R f + βr c ) R f /R c if βr c >> R f When r o r o in equation
AC analysis methods r E model 73 Analyze BC 73
BC configuration 74 74
BC: small signal model 75 75
Analyze BC configuration 76 1) Z i = R e r e Trở kháng vào tương đối nhỏ 2) Z o = R c Trở kháng ra lớn 3) A v = αr c /r e R c /r e Tương đối lớn U i & U o cùng pha 4) A i = - α -1 Không khuếch đại dòng 76
77 Analyze CC 77
78 CC configuration with fixed biasing
79 CC configuration with fixed biasing
80 CC configuration with fixed biasing Analyze output impedance
81 CC configuration with fixed biasing V o
82 CC configuration with fixed biasing 1) Z i = R b [βr e +(β+1)r e ] R b β(r e +R e ) High input impedance 2) Z o = R e r e r e vì R e >> r e Low output impedance 3) A v = R e /(R e +r e ) 1 Inphase with input and smaller amplitude => emitter connection 4) A i = - βr b /[R b + β(r e +R e )] Application: Buffer
83 Example: Determine Ai, Av, Zi, Zo?
84 Example: Determine Ai, Av, Zi, Zo?
Example: Determine Ai, Av, Zi, Zo? 85
86 Example: Determine Ai, Av, Zi, Zo?
87 Example: Determine Ai, Av, Zi, Zo?
88 Impact of temperature and other effects
Ảnh hưởng của các yếu tố 89 kỹ thuật đến hoạt động thiết bị Ảnh hưởng của cấu trúc BJT: Vật liệu chế tạo: Ge, Si Mức độ pha tạp Kích thước BJT Ảnh hưởng của tần số làm việc Ảnh hưởng của thời gian sử dụng Ảnh hưởng của độ ổn định nguồn Ảnh hưởng của nhiệt độ
Các ảnh hưởng khác 90 Ảnh hưởng của tần số làm việc Xét trong phần đáp ứng tần số Ảnh hưởng của thời gian sử dụng Ảnh hưởng của độ ổn định nguồn Gây méo tín hiệu ra Ảnh hưởng của cấu trúc BJT: Vật liệu chế tạo: Ge, Si V be, β,nhiệt độ Mức độ pha tạp áp, dòng, β,nhiệt độ Kích thước BJT độ lớn của dòng
Ảnh hưởng của nhiệt độ 91 Nhiệt độ ảnh hưởng nhiều đến các tham số thiết bị Khi nhiệt độ tăng: Hệ số β tăng Dòng dò I cbo tăng Điện áp V be giảm gây ra sự không ổn định của mạch do sự dịch chuyển của điểm làm việc Q chất lượng tín hiệu ra giảm Đối với BJT chế tạo từ Si, β chịu ảnh hưởng nhiều của nhiệt độ
Ổn định nhiệt 92 Ở nhiệt độ phòng Khi T = 100 o C
Hệ số ổn định 93 S(I co )=ΔI c /ΔI cbo ảnh hưởng nhiều đến BJT dùng Germani S(U be )=ΔI c /ΔU be ảnh hưởng ít S(β)= ΔI c /Δβ ảnh hưởng nhiều đến BJT dùng Silic Tổng ảnh hưởng đến dòng I c ΔI c =S(I co )* ΔI cbo + S(U be )*ΔU be + S(β)*Δβ
94 Ổn định hoạt động BJT Hồi tiếp âm điện áp hoặc dòng điện (thêm R E tại cực E) Làm mát - bằng quạt hoặc nước Ổn định nguồn cung cấp Chọn BJT thích hợp với ứng dụng (công suất cao hay thấp, môi trường và nhiệt độ làm việc etc.)
Ổn định bằng hồi tiếp âm điện áp 95 Ổn định chế độ một chiều bằng điện trở R E
96 Ổn định bằng hồi tiếp âm điện áp
97 Ổn định bằng hồi tiếp âm điện áp
98 Ổn định bằng hồi tiếp âm điện áp Z i = R B //β(r e +R E ) Z o = R C A v = -R C /(r e +R E ) A i = βr B /[R B + β(r e +R E )] Trở kháng vào tăng nhưng hệ số khuếch đại điện áp giảm => sử dụng tụ để ngắn mạch R E ở chế độ xoay chiều
99 Sơ đồ CE dùng tụ ngắn mạch R E
Thiết kế mạch phân cực có R E ổn định nhiệt 100 Điện áp rơi trên điện trở emittor cỡ ¼ đến 1/10 điện áp nguồn cung cấp
Thiết kế mạch phân cực phân áp 101 Điện áp rơi trên điện trở emittor cỡ ¼ đến 1/10 điện áp nguồn cung cấp 10R 2 < βr E
102 Bài tập Chương 3: 3, 5, 11, 14, 21, 28, 30, 33 Chương 4: 5, 6, 7, 10, 11, 14, 19, 26, 28, 32, 33 Chương 7: 6, 8, 10, 23 Chương 8: 1, 4, 7, 11, 14, 15, 16, 19, 28
103 Tóm Tắt (p. 383, sách của tác giả Boylstad)
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