Application High Efficiency Synchronous Rectification in SMPS Uninterruptible Power Supply High Speed Power Switching Hard Switched and High Frequency Circuits G D S HEXFET Power MOSFET V DSS R DS(on) typ. max I D 250V 4.5m 7.5m 93A Benefits Improved Gate, Avalanche and Dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche SOA Enhanced body diode dv/dt and di/dt Capability Lead-Free, RoHS Compliant D S G D TO-247AC G D S Gate Drain Source Standard Pack Base part number Package Type Orderable Part Number Form Quantity TO-247AC Tube 25 Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V 93 I D @ T C = C Continuous Drain Current, V GS @ V 66 I DM Pulsed Drain Current 370 P D @T C = 25 C Maximum Power Dissipation 520 W Linear Derating Factor 3.4 W/ C V GS Gate-to-Source Voltage ± 20 V dv/dt Peak Diode Recovery dv/dt 24 V/ns T J Operating Junction and -55 to + 75 T STG Storage Temperature Range C Soldering Temperature, for seconds 300 (.6mm from case) Mounting Torque, 6-32 or M3 Screw lbf in (. N m) Avalanche Characteristics E AS (Thermally limited) Single Pulse Avalanche Energy 770 mj I AR Avalanche Current A See Fig. 4, 5, 22a, 22b E AR Repetitive Avalanche Energy mj Thermal Resistance Parameter Typ. Max. Units R JC Junction-to-Case 0.29 R CS Case-to-Sink, Flat Greased Surface 0.24 C/W R JA Junction-to-Ambient 40 A 206-2-2
Static @ (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 250 V V GS = 0V, I D = 250µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 0.20 V/ C Reference to 25 C, I D = 5mA R DS(on) Static Drain-to-Source On-Resistance 4.5 7.5 m V GS = V, I D = 56A V GS(th) Gate Threshold Voltage 3.0 5.0 V V DS = V GS, I D = 250µA 20 I DSS Drain-to-Source Leakage Current µa V DS = 250 V, V GS = 0V 250 V DS = 250V,V GS = 0V,T J =25 C Gate-to-Source Forward Leakage V GS = 20V I GSS na Gate-to-Source Reverse Leakage - V GS = -20V R G Gate Resistance 0.7 Dynamic Electrical Characteristics @ (unless otherwise specified) gfs Forward Transconductance S V DS = 50V, I D =56A Q g Total Gate Charge 80 270 I D = 56A Q gs Gate-to-Source Charge 52 V DS = 25V nc Q gd Gate-to-Drain Charge 72 V GS = V Q sync Total Gate Charge Sync. (Q g - Q gd ) 8 t d(on) Turn-On Delay Time 36 V DD = 63V t r Rise Time 60 I ns D = 56A t d(off) Turn-Off Delay Time 57 R G =.0 t f Fall Time V GS = V C iss Input Capacitance 880 V GS = 0V C oss Output Capacitance 700 V DS = 50V C rss Reverse Transfer Capacitance 2 pf ƒ =.0MHz, See Fig. 5 C oss eff.(er) Effective Output Capacitance (Energy Related) 5 V GS = 0V, VDS = 0V to 200V C oss eff.(tr) Output Capacitance (Time Related) 830 V GS = 0V, VDS = 0V to 200V Diode Characteristics Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol I S 93 (Body Diode) showing the A G Pulsed Source Current integral reverse I SM 370 (Body Diode) p-n junction diode. V SD Diode Forward Voltage.3 V,I S = 56A,V GS = 0V t rr Reverse Recovery Time 80 V DD = 200V ns 200 I F = 56A, Q rr Reverse Recovery Charge 480 di/dt = A/µs nc 2260 I RRM Reverse Recovery Current 6 A t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S +L D ) D S Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by T Jmax starting, L = 0.50mH, R G = 25, I AS = 56A, V GS =V. Part not recommended for use above this value. I SD 56A, di/dt 950A/µs, V DD V (BR)DSS, T J 75 C. Pulse width 400µs; duty cycle 2%. C oss eff. (TR) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. C oss eff. (ER) is a fixed capacitance that gives the same energy as C oss while V DS is rising from 0 to 80% V DSS. R is measured at T J approximately 90 C R JC value shown is at time zero. 2 206-2-2
C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 4.8V BOTTOM 4.5V VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 4.8V BOTTOM 4.5V 0. 60µs PULSE WIDTH 4.5V Tj = 25 C 0.0 0. V DS, Drain-to-Source Voltage (V) 4.5V 60µs PULSE WIDTH Tj = 75 C 0. V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics 3.5 3.0 I D = 56A V GS = V 2.5 T J = 75 C 2.0.5.0 0. V DS = 50V 60µs PULSE WIDTH 3 4 5 6 7 8 V GS, Gate-to-Source Voltage (V) 0.5 0.0-60 -40-20 0 20 40 60 80 20406080 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature 00 V GS = 0V, f = MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd 4.0 2.0.0 I D = 56A V DS = 200V V DS = 25V V DS = 50V 0 C iss 8.0 C oss 6.0 C rss 4.0 2.0 V DS, Drain-to-Source Voltage (V) 0.0 0 30 60 90 20 50 80 2 240 Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 206-2-2
Energy (µj) V (BR)DSS, I D, Drain Current (A) Drain-to-Source Breakdown Voltage (V) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 75 C µsec msec msec V GS = 0V 0. 0.0 0.5.0.5 V SD, Source-to-Drain Voltage (V) DC Tc = 25 C Tj = 75 C Single Pulse V DS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 320 Id = 5mA 80 300 60 280 40 260 20 0 25 50 75 25 50 75 T C, Case Temperature ( C) 240-60 -40-20 0 20 40 60 80 20406080 T J, Temperature ( C ) Fig 9. Maximum Drain Current vs. Case Temperature Fig. Drain-to Source Breakdown Voltage 20.0 8.0 6.0 4.0 3200 2800 2400 I D TOP 2A 7A BOTTOM 56A 2.0.0 8.0 6.0 4.0 2.0 0.0-50 0 50 50 200 250 300 V DS, Drain-to-Source Voltage (V) E AS, Single Pulse Avalanche Energy (mj) 2000 600 200 800 400 0 25 50 75 25 50 75 Starting T J, Junction Temperature ( C) Fig. Typical C oss Stored Energy Fig 2. Maximum Avalanche Energy vs. Drain Current 4 206-2-2
E AR, Avalanche Energy (mj) Thermal Response ( Z thjc ) C/W 0. 0.0 0.00 D = 0.50 0.20 0. 0.05 0.02 0.0 SINGLE PULSE ( THERMAL RESPONSE ) R R R 2 R 2 R 3 R 3 J J 2 2 3 3 Ci= i Ri Ci= i Ri Ri ( C/W) I (sec) 0.0634 0.000278 0.9 0.005836 0.48 0.053606 Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc 0.000 E-006 E-005 0.000 0.00 0.0 0. t, Rectangular Pulse Duration (sec) C C Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Case Avalanche Current (A) Duty Cycle = Single Pulse 0.0 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 50 C and Tstart =25 C (Single Pulse) 0.05 0. Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25 C and Tstart = 50 C. 0..0E-06.0E-05.0E-04.0E-03.0E-02.0E-0 tav (sec) Fig 4. Typical Avalanche Current vs. Pulse 800 700 600 500 400 300 200 TOP Single Pulse BOTTOM.0% Duty Cycle I D = 56A Notes on Repetitive Avalanche Curves, Figures 4, 5: (For further info, see AN-5 at www.irf.com). Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tj max. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as T jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 22a,22b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 4, 5). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f ZthJC(D, tav) = Transient thermal resistance, see Figures 3) 0 25 50 75 25 50 75 Starting T J, Junction Temperature ( C) Fig 5. Maximum Avalanche Energy vs. Temperature P D (ave) = /2 (.3 BV I av ) = T/ Z thjc I av = 2 T/ [.3 BV Z th ] E AS (AR) = P D (ave) t av 5 206-2-2
Q RR (nc) I RRM (A) Q RR (nc) V GS(th), Gate threshold Voltage (V) I RRM (A) 6.0 70 I F = 37A 5.0 60 V R = 200V 4.0 50 3.0 2.0 I D = 250µA I D =.0mA I D =.0A 40 30.0 20 0.0-75 -50-25 0 25 50 75 25 50 75 T J, Temperature ( C ) 0 200 400 600 800 di F /dt (A/µs) Fig 6. Threshold Voltage vs. Temperature Fig 7. Typical Recovery Current vs. dif/dt 90 80 70 60 I F = 56A V R = 200V 6000 5000 4000 I F = 37A V R = 200V 50 40 3000 30 2000 20 0 200 400 600 800 di F /dt (A/µs) 0 200 400 600 800 di F /dt (A/µs) Fig 8. Typical Recovery Current vs. dif/dt Fig 9. Typical Stored Charge vs. dif/dt 8000 7000 6000 I F = 56A V R = 200V 5000 4000 3000 2000 0 200 400 600 800 di F /dt (A/µs) Fig 20. Typical Stored Charge vs. dif/dt 6 206-2-2
Fig 2. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs V (BR)DSS 5V tp V DS L DRIVER R G 20V tp D.U.T I AS 0.0 + - V DD A I AS Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms Vds Id Vgs 0 K DUT L VCC Vgs(th) Qgs Qgs2 Qgd Qgodr Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform 7 206-2-2
TO-247AC Package Outline Dimensions are shown in millimeters (inches) TO-247AC Part Marking Information Notes: This part marking information applies to devices produced after 02/26/200 EXAMPLE: THIS IS AN IRFPE30 WITH ASSEMBLY LOT CODE 5657 ASSEMBLED ON WW 35, 200 IN THE ASSEMBLY LINE "H" Note: "P" in assembly line position indicates "Lead-Free" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE IRFPE30 35H 56 57 PART NUMBER DATE CODE YEAR = 200 WEEK 35 LINE H TO-247AC package is not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 8 206-2-2
Qualification Information Qualification Level Industrial (per JEDEC JESD47F) Moisture Sensitivity Level TO-247AC N/A RoHS Compliant Yes Applicable version of JEDEC standard at the time of product release. Revision History Date 2/2/206 Changed datasheet with Infineon logo-all pages Corrected error on figure 9 on page 4. Added disclaimer on last page. Comments Published by Infineon Technologies AG 8726 München, Germany Infineon Technologies AG 205 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ( Beschaffenheitsgarantie ). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s products and any use of the product of Infineon Technologies in customer s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 9 206-2-2