EF Series Power MOSFET with Fast Body Diode

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EF Series Power MOSFET with Fast Body Diode SiHG7N6EF PRODUCT SUMMRY (V) at T J max. 65 R DS(on) max. at 25 C () V GS = 1 V.65 Q g max. (nc) 228 Q gs (nc) 32 Q gd (nc) 62 Configuration Single TO27C S G D G D S NChannel MOSFET FETURES Fast body diode MOSFET using E series technology Reduced t rr, Q rr, and I RRM Low figureofmerit (FOM) R on x Q g Low input capacitance (C iss ) Increased robustness due to low Q rr Ultra low gate charge (Q g ) valanche energy rated (UIS) Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 PPLICTIONS Telecommunications Server and telecom power supplies Lighting Highintensity lighting (HID) Light emitting diodes (LEDs) Consumer and computing TX power supplies Industrial Welding Battery chargers Renewable energy Solar (PV inverters) Switching mode power supplies (SMPS) pplications using the following topologies LLC Phase shifted bridge (ZVS) 3level inverter C/DC bridge ORDERING INFORMTION Package Lead (Pb)free and Halogenfree TO27C SiHG7N6EFGE3 BSOLUTE MXIMUM RTINGS (T C = 25 C, unless otherwise noted) PRMETER SYMBOL LIMIT UNIT DrainSource Voltage 6 GateSource Voltage V GS ± 3 V Continuous Drain Current (T J = 15 C) V GS at 1 V T C = 25 C 7 I D T C = 1 C 29 Pulsed Drain Current a I DM 138 Linear Derating Factor 3 W/ C Single Pulse valanche Energy b E S 15 mj Maximum Power Dissipation P D 379 W Operating Junction and Storage Temperature Range T J, T stg 55 to 15 C DrainSource Voltage Slope T J = 125 C 7 dv/dt Reverse Diode dv/dt d 5 V/ns Soldering Recommendations (Peak Temperature) c for 1 s 3 C Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. V DD = 5 V, starting T J = 25 C, L = 73.5 mh, R g = 25, I S = 6.. c. 1.6 mm from case. d. I SD I D, di/dt = 5 /μs, starting T J = 25 C. S17298Rev. H, 27Feb17 1 Document Number: 91559

SiHG7N6EF THERML RESISTNCE RTINGS PRMETER SYMBOL TYP. MX. UNIT Maximum Junctiontombient R thj C/W Maximum JunctiontoCase (Drain) R thjc.33 SPECIFICTIONS (T J = 25 C, unless otherwise noted) PRMETER SYMBOL TEST CONDITIONS MIN. TYP. MX. UNIT Static DrainSource Breakdown Voltage V GS = V, I D = 25 μ 6 V Temperature Coefficient /T J Reference to 25 C, I D = 1 m V/ C GateSource Threshold Voltage (N) V GS(th) = V GS, I D = 25 μ 2.. V GateSource Leakage I GSS V GS = ± 2 V ± 1 n V GS = ± 3 V ± 1 μ = 8 V, V GS = V 1 Zero Gate Voltage Drain Current I DSS = 8 V, V GS = V, T J = 125 C 5 μ DrainSource OnState Resistance R DS(on) V GS = 1 V I D = 2.56.65 Forward Transconductance g fs = 3 V, I D = 2 17 S Dynamic Input Capacitance C iss VGS = V, 5 Output Capacitance C oss = 1 V, 22 Reverse Transfer Capacitance C rss f = 1 MHz 7 Effective Output Capacitance, Energy pf Related a C o(er) 172 = V to 8 V, V GS = V Effective Output Capacitance, Time Related b C o(tr) 63 Total Gate Charge Q g 152 228 GateSource Charge Q gs V GS = 1 V I D = 2, = 8 V 32 nc GateDrain Charge Q gd 62 TurnOn Delay Time t d(on) 3 6 Rise Time t r V DD = 8 V, I D = 2, 56 8 TurnOff Delay Time t d(off) V GS = 1 V, R g =. 91 137 ns Fall Time t f 56 8 Gate Input Resistance R g f = 1 MHz, open drain.2.6 1. DrainSource Body Diode Characteristics MOSFET symbol D Continuous SourceDrain Diode Current I S 7 showing the integral reverse G Pulsed Diode Forward Current I SM S p n junction diode 138 Diode Forward Voltage V SD T J = 25 C, I S = 2, V GS = V.9 1.2 V Body Diode Reverse Recovery Time t rr 199 398 ns Body Diode Reverse Recovery Charge Q rr T J = 25 C, I F = I S = 2, di/dt = 1 /μs, V R = V 1. 2.8 μc Reverse Recovery Current I RRM 13.2 Notes a. C oss(er) is a fixed capacitance that gives the same energy as C oss while is rising from % to 8 % S. b. C oss(tr) is a fixed capacitance that gives the same charging time as C oss while is rising from % to 8 % S. S17298Rev. H, 27Feb17 2 Document Number: 91559

SiHG7N6EF TYPICL CHRCTERISTICS (25 C, unless otherwise noted) I D, DraintoSource Current () 15 125 1 75 5 25 Top 15 V 1 V 13 V 12 V 11 V 1 V 9. V 8. V 7. V Bottom 6. V T J = 25 C 5. V 5 1 15 2 25 3, DraintoSource Voltage (V) R DS(on), DraintoSource On Resistance (Normalized) 3. 2.5 2. 1.5 1..5 I D = 2 V GS = 1 V. 6 2 2 6 8 1 12 1 16 T J, Junction Temperature ( C) Fig. 1 Typical Output Characteristics Fig. Normalized OnResistance vs. Temperature I D, DraintoSource Current () 1 8 6 2 Top 15 V 1 V 13 V 12 V 11 V 1 V 9. V 8. V 7. V 6. V Bottom 5. V 1 1 C, Capacitance (pf) 1 1 1 C rss C oss Ciss V GS = V, f = 1 MHz C iss = C gs C gd, C ds Shorted C rss = C gd C oss = C ds C gd T J = 15 C 5 1 15 2 25 3, DraintoSource Voltage (V) Fig. 2 Typical Output Characteristics 1 1 2 3 5 6, DraintoSource Voltage (V) Fig. 5 Typical Capacitance vs. DraintoSource Voltage 15 3 I D, DraintoSource Current () 12 9 6 3 T J = 25 C T J = 15 C C oss (pf) 5 5 C oss E oss 25 2 15 1 5 E oss (μj) = 26 V 5 1 15 2 25 V GS, GatetoSource Voltage (V) 5 1 2 3 5 6 Fig. 3 Typical Transfer Characteristics Fig. 6 C oss and E oss vs. S17298Rev. H, 27Feb17 3 Document Number: 91559

SiHG7N6EF V GS, GatetoSource Voltage (V) 2 2 16 12 8 = 8 V = 3 V = 12 V I D, Drain Current () 5 5 35 3 25 2 15 1 5 5 1 15 2 25 3 Q G, Total Gate Charge (nc) Fig. 7 Typical Gate Charge vs. GatetoSource Voltage 25 5 75 1 125 15 T C, Case Temperature ( C) Fig. 1 Maximum Drain Current vs. Case Temperature I SD, Reverse Drain Current () 1 1 1 1 T = 15 C J T = 25 C J V GS = V.1.2..6.8 1 1.2 1. 1.6 1.8 V SD, SourcetoDrain Voltage (V) VDS, DraintoSource Breakdown Voltage (V) 8 I D = 1 m 775 75 725 7 675 65 625 6 6 2 2 6 8 1 12 1 16 T J, Junction Temperature ( C) Fig. 8 Typical SourceDrain Diode Forward Voltage Fig. 11 Temperature vs. DraintoSource Voltage 1 1 Operation in this area limited by R DS(on) * I DM Limited I D, Drain Current () 1 1 1 µs 1 ms.1 T C = 25 C 1 ms T J = 15 C Single Pulse BVDSS Limited.1 1 1 1 1 DraintoSource Voltage (V) Fig. 9 Maximum Safe Operating rea S17298Rev. H, 27Feb17 Document Number: 91559

SiHG7N6EF 1 Duty Cycle =.5 Normalized Effective Transient Thermal Impedance.1.2.1.5.2 Single Pulse.1.1.1.1.1 1 Pulse Time (s) Fig. 12 Normalized Thermal Transient Impedance, JunctiontoCase R D t p V GS D.U.T. V DD R G V DD 1 V Pulse width 1 µs Duty factor.1 % I S Fig. 13 Switching Time Test Circuit Fig. 16 Unclamped Inductive Waveforms 9 % 1 V Q G Q GS Q GD 1 % V GS t d(on) t r t d(off) t f V G Fig. 1 Switching Time Waveforms Charge Fig. 17 Basic Gate Charge Waveform Vary t p to obtain required I S L Current regulator Same type as D.U.T. 5 kω R G 1 V t p I S D.U.T.1 Ω V DD 12 V V GS.2 µf.3 µf D.U.T. V DS Fig. 15 Unclamped Inductive Test Circuit 3 m Fig. 18 Gate Charge Test Circuit I G I D Current sampling resistors S17298Rev. H, 27Feb17 5 Document Number: 91559

SiHG7N6EF Peak Diode Recovery dv/dt Test Circuit D.U.T. Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer R g dv/dt controlled by R g Driver same type as D.U.T. I SD controlled by duty factor D D.U.T. device under test V DD Driver gate drive P.W. Period D = P.W. Period V GS = 1 V a D.U.T. l SD waveform Reverse recovery current Body diode forward current di/dt D.U.T. waveform Diode recovery dv/dt V DD Reapplied voltage Inductor current Body diode forward drop Ripple 5 % I SD Note a. V GS = 5 V for logic level devices Fig. 19 For NChannel maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91559. S17298Rev. H, 27Feb17 6 Document Number: 91559

TO27C (High Voltage) Package Information 3 B R/2 Q E E/2 S 2 7 ØP (Datum B) Ø k M D B M ØP1 D2 2 x R (2) D D1 1 2 3 D Thermal pad 5 L1 C 2 x b2 3 x b.1 M C M b Lead ssignments 1. Gate 2. Drain 3. Source. Drain 2 x e L See view B 1 C DDE (b, b2, b) () Section C C, D D, E E MILLIMETERS INCHES MILLIMETERS INCHES DIM. MIN. MX. MIN. MX. DIM. MIN. MX. MIN. MX..58 5.31.18.29 D2.51 1.3.2.51 1 2.21 2.59.87.12 E 15.29 15.87.62.625 2 1.17 2.9.6.98 E1 13.72.5 b.99 1..39.55 e 5.6 BSC.215 BSC b1.99 1.35.39.53 Ø k.25.1 b2 1.53 2.39.6.9 L 1.2 16.25.559.6 b3 1.65 2.37.65.93 L1 3.71.29.16.169 b 2.2 3.3.95.135 N 7.62 BSC.3 BSC b5 2.59 3.38.12.133 Ø P 3.51 3.66.138.1 c.38.86.15.3 Ø P1 7.39.291 c1.38.76.15.3 Q 5.31 5.69.29.22 D 19.71 2.82.776.82 R.52 5.9.178.216 D1 13.8.515 S 5.51 BSC.217 BSC ECN: X1313Rev. D, 1Jul13 DWG: 5971 Notes 1. Dimensioning and tolerancing per SME Y1.5M199. 2. Contour of slot optional. 3. Dimension D and E do not include mold flash. Mold flash shall not exceed.127 mm (.5") per side. These dimensions are measured at the outermost extremes of the plastic body.. Thermal pad contour optional with dimensions D1 and E1. 5. Lead finish uncontrolled in L1. 6. Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (.15"). 7. Outline conforms to JEDEC outline TO27 with exception of dimension c. 8. Xian and Mingxin actually photo. E View B C C Planting (c) E1.1 M D B M View (b1, b3, b5) Base metal c1 Revision: 1Jul13 1 Document Number: 9136

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