Characteristic Value Units Drain-to-Source Voltage Continuous Drain Current (T C =100 C)

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dvanced Power MOSFET SFF9250L FETURES Logic-Level Gate Drive valanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitances Improved Gate Charge Extended Safe Operating rea Lower Leakage Current : 0u (Max.) @ =-200 Lower R DS(ON) : 0.75 Ω (Typ.) bsolute Maximum Ratings BS = -200 R DS(on) = 0.23 Ω I D = -2.6 TO-3PF 2 3.Gate 2. Drain 3. Source S I D I DM E S I R E R dv/dt P D T J, T STG T L Characteristic alue Units Drain-to-Source oltage -200 Continuous Drain Current (T C =25 C) -2.6 Continuous Drain Current (T C =00 C) -7.9 Drain Current-Pulsed Gate-to-Source oltage Single Pulsed valanche Energy valanche Current Repetitive valanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (T C =25 C) Linear Derating Factor 2 3-50. ±20 990-2.6 20. -5.0 90 0.72 mj mj /ns W W/ C Operating Junction and Storage Temperature Range - 55 to +50 Maximum Lead Temp. for Soldering Purposes, /8 from case for 5-seconds 300 C Thermal Resistance R θjc R θj Characteristic Typ. Max. Units Junction-to-Case 0.6 Junction-to-mbient 0 C/W Rev.

SFF9250L P-CHNNEL Electrical Characteristics (T C =25 C unless otherwise specified) Characteristic Min. Typ. Max. Units Test Condition BS Drain-Source Breakdown oltage -200 =0,I D =-250μ ΔB/ΔT J Breakdown oltage Temp. Coeff. -0.7 / C I D =-250μ See Fig 7 (th) Gate Threshold oltage -.0-2.0 =-5,I D =-250μ I GSS Gate-Source Leakage, Forward Gate-Source Leakage, Reverse 00-00 n =-20 =20 I DSS Drain-to-Source Leakage Current 0 00 μ =-200 =-60,T C =25 C R DS(on) Static Drain-Source On-State Resistance.75 0.23 Ω =-5,I D =-6.3 g fs Forward Transconductance 3 S =-0,I D =-6.3 C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance 2500 00 20 3250 520 270 pf =0, =-25,f =MHz See Fig 5 t d(on) t r t d(off) t f Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time 20 50 00 65 50 30 20 0 ns DD =-00,I D =-2.6, R G =6.2Ω See Fig 3 5 Q g Total Gate Charge 90 20 =-60, =-5, Q gs Gate-Source Charge 2 nc I D =-2.6 Q gd Gate-Drain(Miller) Charge 5 See Fig 6 & Fig 2 5 Source-Drain Diode Ratings and Characteristics Characteristic Min. Typ. Max. Units Test Condition I S I SM Continuous Source Current Pulsed-Source Current -2.6-50. Integral reverse pn-diode in the MOSFET SD Diode Forward oltage -.5 T J =25 C,I S =-2.6, =0 t rr Reverse Recovery Time 260 ns T J =25 C,I F =-9.5, DD =-60 Q rr Reverse Recovery Charge 2.8 μc di F /dt=00/μs Notes ; Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature 2 L=3.9mH, I S =-9.5, DD =-50, R G =27Ω, Starting T J =25 3 I SD -9.5, di/dt 500/μs, DD BS, Starting T J =25 Pulse Test : Pulse Width 300μs, Duty Cycle 2% 5 Essentially Independent of Operating Temperature

P-CHNNEL SFF9250L Fig. Output Characteristics Fig 2. Transfer Characteristics -I D, Drain Current [] 0 0 0 Top : -0.0-8.0-6.0-5.0 -.5 -.0-3.5 Bottom : -3.0. 250μ s Pulse Test 2. T C = 25 -I D, Drain Current [] 0 0 0 25 50-55 Note. = -0 2. 250μ s Pulse Test 0-0 0 0 -, Drain-Source oltage [] 0-2 6 8 0 -, Gate-Source oltage [] 0.8 Fig 3. On-Resistance vs. Drain Current Fig. Source-Drain Diode Forward oltage R DS(on), [ Ω] Drain-Source On-Resistance 0.6 0. 0.2 = - 0 = - 5 T J = 25 -I DR, Reverse Drain Current [] 0 0 0 50 25. = 0 2. 250μ s Pulse Test 0.0 0 20 0 60 80 00 -I D, Drain Current [] 0-0.6.2.8 2. 3.0 3.6 - SD, Source-Drain oltage [] Capacitances [pf] 2000 0500 9000 7500 6000 500 3000 500 Fig 5. Capacitance vs. Drain-Source oltage C iss C oss C rss C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd Note ;. = 0 2. f = MHz -, Gate-Source oltage [] 6 2 Fig 6. Gate Charge vs. Gate-Source oltage = -0 = -00 = -60 I D = -9.5 0 0-0 0 0 -, Drain-Source oltage [] 0 0 20 0 60 80 00 Q G, Total Gate Charge [nc]

SFF9250L P-CHNNEL.2 Fig 7. Breakdown oltage vs. Temperature 2.5 Fig 8. On-Resistance vs. Temperature -BS, (Normalized) Drain-Source Breakdown oltage..0 0.9. = 0 2. I D = -250 μ R DS(ON), (Normalized) Drain-Source On-Resistance 2.0.5.0 0.5. = -5 2. I D = -9.8 0.8-00 -50 0 50 00 50 200 T J, Junction Temperature [ o C] 0.0-00 -50 0 50 00 50 200 T J, Junction Temperature [ o C] -I D, Drain Current [] 0 2 0 Fig 9. Max. Safe Operating rea Operation in This rea is Limited by R DS(on) 00 µs ms 0 ms DC 0 0 Notes :. T C = 25 o C 2. T J = 50 o C 3. Single Pulse 0-0 0 0 0 2 -, Drain-Source oltage [] -I D, Drain Current [] Fig 0. Max. Drain Current vs. Case Temperature 20 5 0 5 0 25 50 75 00 25 50 T C, Case Temperature [ ] 0 0 Fig. Thermal Response Z θ JC (t), Thermal Response 0-0 -2 D=0.5 0.2 0. 0.05 0.02 0.0 single pulse N o te s :. Z θ JC (t) = 0.6 /W M ax. 2. D uty F actor, D =t /t 2 3. T JM - T C = P DM * Z θ JC (t) P DM t t 2 0-5 0-0 -3 0-2 0-0 0 0 t, Square W ave Pulse D uration [sec]

P-CHNNEL SFF9250L Fig 2. Gate Charge Test Circuit & Waveform 2 200nF 50KΩ 300nF Same Type as DUT -5 Q g Q gs Q gd -3m DUT Charge Fig 3. Resistive Switching Test Circuit & Waveforms R L t on t off R G DD ( 0.5 rated ) in 0% t d(on) t r t d(off) t f -5 DUT 90% Fig. Unclamped Inductive Switching Test Circuit & Waveforms L E S = 2 L L I 2 S BS BS DD I D DD t p Time R G DD (t) -5 DUT I S BS I D (t)

SFF9250L P-CHNNEL Fig 5. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + _ I S L Driver R G Compliment of DUT (N-Channel) DD dv/dt controlled by RG I S controlled by pulse period ( Driver ) Gate Pulse Width D = Gate Pulse Period 5 I S ( DUT ) I FM, Body Diode Forward Current di/dt I RM ( DUT ) Body Diode Reverse Current Body Diode Recovery dv/dt f DD Body Diode Forward oltage Drop

TRDEMRKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. CEx Bottomless CoolFET CROSSOLT DenseTrench DOME EcoSPRK E 2 CMOS TM EnSigna TM FCT FCT Quiet Series STR*POWER is used under license DISCLIMER FIRCHILD SEMICONDUCTOR RESERES THE RIGHT TO MKE CHNGES WITHOUT FURTHER NOTICE TO NY PRODUCTS HEREIN TO IMPROE RELIBILITY, FUNCTION OR DESIGN. FIRCHILD DOES NOT SSUME NY LIBILITY RISING OUT OF THE PPLICTION OR USE OF NY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONEY NY LICENSE UNDER ITS PTENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FIRCHILD S PRODUCTS RE NOT UTHORIZED FOR USE S CRITICL COMPONENTS IN LIFE SUPPORT DEICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN PPROL OF FIRCHILD SEMICONDUCTOR CORPORTION. s used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STTUS DEFINITIONS Definition of Terms FST FSTr FRFET GlobalOptoisolator GTO HiSeC ISOPLNR LittleFET MicroFET MicroPak MICROWIRE OPTOLOGIC OPTOPLNR PCMN POP Power27 PowerTrench QFET QS QT Optoelectronics Quiet Series SILENT SWITCHER SMRT STRT STR*POWER Stealth SuperSOT -3 SuperSOT -6 SuperSOT -8 SyncFET TinyLogic TruTranslation UHC UltraFET 2. critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition CX dvance Information Preliminary No Identification Needed Formative or In Design First Production Full Production This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H