6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 1 Lecture 20 Transistor Amplifiers (II) Other Amplifier Stages November 17, 2005 Contents: 1. Common source amplifier (cont.) 2. Common drain amplifier 3. Common gate amplifier Reading assignment: Howe and Sodini, Ch. 8, 8.7 8.9
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 2 Key questions What other amplifier stages can one build with a single MOSFET and a current source? What is the uniqueness of these other stages?
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 3 1. Common source amplifier with current source supply V DD i SUP signal source RS i D signal load v s v OUT R L V GG V SS Loadline view: i SUP =I D load line V GG V SS =V DD V SS I SUP V GG V SS 0 V SS V DD V OUT V GG V SS =V T
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 4 Current source characterized by high output resistance: r oc. Then, unloaded voltage gain of common source stage: A vo = g m (r o //r oc ) significantly higher than amplifier with resistive supply. Can implement current source supply by means of p channel MOSFET: V DD V B i SUP signal source i D v s v OUT V GG V SS
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 5 Relationship between circuit figures of merit and device parameters Remember: W g m = 2 L µ n C ox I D 1 L r o λn I D ID Then: Circuit Parameters Device A vo R in R out Parameters g m (r o //r oc ) r o //r oc I SU P W µ n C ox L adjustments are made to V GG so none of the other parameters change CS amp with current supply source is good voltage amplifier (R in high and A v high), but R out high too voltage gain degraded if R L r o //r oc.
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 6 Common source amplifier is acceptable voltage amplifier (want high R in, high A vo,low R out ): R out v s v in R A vo v in in R L v out... but excellent transconductance amplifier (want high R in, high G mo, high R out ): i out v s v in R in G mo v in R out R L For common source amplifier: G mo = g m
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 7 Common source amplifier does not work as transresistance amplifier (want low R in, high R mo,low R out ): i in R out i s R in R mo i in RL v out nor as current amplifier (want low R in, high A io, high R out ): i in i out i s A io i in R out R L R in Need new amplifier configurations.
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 8 2. Common drain amplifier V DD signal source v s signal load i SUP v OUT R L V GG V SS How does it work? V GG, I SU P, and W/L selected to bias MOSFET in saturation, obtain desired output bias point, and desired output swing. v G i D can t change v OU T (source follower) to first order, no voltage gain: v out v s but R out small: effective voltage buffer stage (good for making voltage amp in combination with common source stage).
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 9 Small signal analysis Unloaded small signal equivalent circuit model: G D v gs g m v gs r o S v in r oc v out v gs v in gm v gs r o //r oc v out v in = v gs v out v out = g m v gs (r o //r oc ) Then: g m A vo = 1 1 g m r o //r oc
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 10 Input impedance: R in = Output impedance: v gs v in gm v gs r o //r oc i t v t v gs =v t effectively: resistance of value 1/g m g m v t r o //r oc i t v t R out = g m 1 1 1 gm r o //r oc small! Loaded voltage gain: R L R L 1 1 A v = A vo R L R out RL g m
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 11 Effect of back bias: If MOSFET not fabricated on isolated p well, then body is tied up to wafer substrate (connected to V SS ): V DD signal source v s V SS signal load i SUP v OUT R L V GG V SS Two consequences: Bias affected: V T depends on V BS = V SS V OUT =0 Small signal figures of merit affected: signal shows up between B and S (v bs = v out ).
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 12 Small signal equivalent circuit model: G D v gs g m v gs g mb v bs r o S v in v bs r oc v out B v bs =v out v gs v in gm v gs g mb v out r o //r oc v out A vo = g m g m g mb 1 r o //r oc g m g m g mb < 1 Also: R out = 1 1 1 g m g mb gm r o //r oc g mb
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 13 Relationship between circuit figures of merit and device parameters: g m = W 2 L µ n C ox I D g mb = γ 2 2φ p V BS g m Device Parameters I SU P W µ n C ox L Circuit Parameters A vo R in R out g m 1 g m g mb g m g mb adjustments are made to V GG so none of the other parameters change CD amp useful as a voltage buffer to drive small loads (in a multistage amp, other stages will be used to provide voltage gain).
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 14 3. Common gate amplifier Need to handle current mode signal sources: V DD i SUP signal source i OUT V SS signal load R L i s I BIAS V SS How does it work? since source is signal input terminal, body cannot be tied up to source (C db is significant) i SUP, I BIAS, and W/L selected to bias MOSFET in saturation, obtain desired output bias point, and desired output swing i S i D i OUT no current gain: i s = i out (current buffer)
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 15 Bias: select I SUP, I BIAS, and W/L to get proper quiescent I OUT and keep MOSFET in saturation. V DD I SUP I OUT V SS I BIAS V SS I SUP I OUT I BIAS =0 Select bias so that I OUT =0 V OUT =0. Assume MOSFET in saturation (no channel modulation): I D = W µ n C ox (V GS V T ) 2 = I SUP = I BIAS 2L but V T depends on V BS : V T = V To γ n ( 2φ p V BS 2φ p ) Must solve these two equations iteratively to get V S.
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 16 Small signal circuit (unloaded) G D i out v gs g m v gs g mb v bs r o S r oc v bs B i s v bs =v gs i s v gs gm v gs g mb v gs r o i out i s g m g mb r o i out i out is i s = i out A io = = 1 Not surprising, since in a MOSFET: i g =0.
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 17 Input resistance: v gs g m v gs g mb v gs ro r oc R L i t v t v gs =v t g m v t g mb v t r o i t v t r oc //R L Do KCL on input node: Then: i t g m v t g mb v t v t (r oc //R L )i t =0 r o r 1 oc //R L r 1 R in = o 1 g m g mb r gm o g mb Very small.
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 18 Output resistance: v gs g m v gs g mb v gs ro i t r oc v t v gs g m v gs g mb v gs ro i t ' v t ' Do KCL on input node: Notice also: i t g m v gs g mb v gs v t v gs =0 r o v gs = i t Then: 1 R out = r oc //{r o [1 (g m g mb )]} r oc //[r o (1g m )] r o Very large, because of the feedback effect of.
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 19 Summary of MOSFET amplifier stages: stage A vo,g mo,a io R in R out key function common source G mo = g m r o //r oc transconductance amp. common drain A vo g m g mg mb 1 voltage buffer g mg mb common gate A io 1 1 g mg mb r oc //[r o (1 g m )] current buffer In order to design amplifiers with suitable performance, need to combine these stages multistage amplifiers
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 20 Key conclusions Different MOSFET stages designed to accomplish different goals: Common source stage: large voltage gain and transconductance, high input resistance, large output resistance excellent transconductance amplifier, reasonable voltage amplifier Common drain stage: no voltage gain, but high input resistance and low output resistance good voltage buffer Common gate stage: no current gain, but low input resistance and high output resistance good current buffer