Features n Floating channel designed for bootstrap operation Fully operational to +5V Tolerant to negative transient voltage dv/dt immune n Gate drive supply range from 1 to 2V n Undervoltage lockout for both channels n Separate logic supply range from 5 to 2V Logic and power ground ±5V offset n CMOS Schmitt-triggered inputs with pull-down n Cycle by cycle edge-triggered shutdown logic n Matched propagation delay for both channels n Outputs in phase with inputs Description The IR211 is a high voltage, high speed power MOSFET and IGBT driver with independent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or LSTTL outputs. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 5 volts. Typical Connection Packages Data Sheet No. PD-6.11E IR211 HIGH AND LOW SIDE DRIVER Product Summary V OFFSET I O +/- VOUT t on/off (typ.) Delay Matching 5V max. 2A / 2A 1-2V 12 & 94 ns up to 5V 1 ns HO V DD V DD V B HIN SD HIN SD V S TO LOAD LIN LIN V CC V SS V SS COM V CC LO CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-
IR211 Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 28 through 35. Parameter Value Symbol Definition Units V B High Side Floating Supply Voltage -.3 5 V S High Side Floating Supply Offset Voltage V B - V B +.3 V HO High Side Floating Output Voltage V S -.3 V B +.3 V CC Low Side Fixed Supply Voltage -.3 V LO Low Side Output Voltage -.3 V CC +.3 V DD Logic Supply Voltage -.3 V SS + V SS Logic Supply Offset Voltage V CC - V CC +.3 V IN Logic Input Voltage (HIN, LIN & SD) V SS -.3 V DD +.3 dv s /dt Allowable Offset Supply Voltage Transient (Figure 2) 5 V/ns P D Package Power Dissipation @ T A + C (14 Lead DIP) 1.6 (14 Lead DIP w/o Lead 4) 1.5 (16 Lead DIP w/o Leads 5 & 6) 1.6 (16 Lead SOIC) 1. R θja Thermal Resistance, Junction to Ambient (14 Lead DIP) (14 Lead DIP w/o Lead 4) 85 (16 Lead DIP w/o Leads 5 & 6) (16 Lead SOIC) 1 T J Junction Temperature 15 T S Storage Temperature -55 15 C T L Lead Temperature (Soldering, 1 seconds) 3 Recommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figures 36 and 37. Parameter Value Symbol Definition Units V B High Side Floating Supply Absolute Voltage V S + 1 V S + 2 V S High Side Floating Supply Offset Voltage Note 1 5 V W C/W V HO High Side Floating Output Voltage V S V B V CC Low Side Fixed Supply Voltage 1 2 V LO Low Side Output Voltage V CC V DD Logic Supply Voltage V SS + 5 V SS + 2 V SS Logic Supply Offset Voltage -5 5 V V IN Logic Input Voltage (HIN, LIN & SD) V SS V DD T A Ambient Temperature -4 C Note 1: Logic operational for V S of -4 to +5V. Logic state held for V S of -4V to -V BS. B-26 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
Dynamic Electrical Characteristics IR211 V BIAS (V CC, V BS, V DD ) = 15V, C L = 1 pf, T A = C and V SS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3. Parameter Value Symbol Definition Figure Units Test Conditions t on Turn-On Propagation Delay 7 12 15 V S = V t off Turn-Off Propagation Delay 8 94 V S = 5V t sd Shutdown Propagation Delay 9 11 14 V S = 5V ns t r Turn-On Rise Time 1 35 t f Turn-Off Fall Time 11 17 MT Delay Matching, HS & LS Turn-On/Off 1 Figure 5 Static Electrical Characteristics V BIAS (V CC, V BS, V DD ) = 15V, T A = C and V SS = COM unless otherwise specified. The V IN, V TH and I IN parameters are referenced to V SS and are applicable to all three logic input leads: HIN, LIN and SD. The V O and I O parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Parameter Value Symbol Definition Figure Units Test Conditions V IH Logic 1 Input Voltage 12 9.5 V IL Logic Input Voltage 13 6. V V OH High Level Output Voltage, V BIAS - V O 14 1.2 I O = A V OL Low Level Output Voltage, V O 15.1 I O = A I LK Offset Supply Leakage Current 16 5 V B = V S = 5V I QBS Quiescent V BS Supply Current 17 23 V IN = V or V DD I QCC Quiescent V CC Supply Current 18 18 34 V IN = V or V DD µa I QDD Quiescent V DD Supply Current 19 15 3 V IN = V or V DD I IN+ Logic 1 Input Bias Current 2 2 4 V IN = V DD I IN- Logic Input Bias Current 21 1. V IN = V V BSUV+ V BS Supply Undervoltage Positive Going 22 7.5 8.6 9.7 Threshold V BSUV- V BS Supply Undervoltage Negative Going 23 7. 8.2 9.4 Threshold V CCUV+ V CC Supply Undervoltage Positive Going 24 7.4 8.5 9.6 V Threshold V CCUV- V CC Supply Undervoltage Negative Going 7. 8.2 9.4 Threshold I O+ Output High Short Circuit Pulsed Current 26 2. 2.5 V O = V, V IN = V DD PW 1 µs A I O- Output Low Short Circuit Pulsed Current 27 2. 2.5 V O = 15V, V IN = V PW 1 µs CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-27
IR211 Functional Block Diagram V B V DD HIN R S Q V DD /V CC LEVEL SHIFT PULSE GEN HV LEVEL SHIFT UV DETECT PULSE FILTER R R S Q HO V S SD V CC LIN R S Q V DD /V CC LEVEL SHIFT UV DETECT DELAY LO V SS COM Lead Definitions Lead Symbol Description V DD HIN SD LIN V SS V B HO V S V CC LO COM Logic supply Logic input for high side gate driver output (HO), in phase Logic input for shutdown Logic input for low side gate driver output (LO), in phase Logic ground High side floating supply High side gate drive output High side floating supply return Low side supply Low side gate drive output Low side return Lead Assignments 14 Lead DIP 14 Lead DIP w/o Lead 4 16 Lead DIP w/o Leads 4 & 5 16 Lead SOIC (Wide Body) IR211 IR211-1 IR211-2 IR211S Part Number B-28 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
Device Information Process & Design Rule HVDCMOS 4. µm Transistor Count 22 Die Size 1 X 117 X 26 (mil) Die Outline IR211 Thickness of Gate Oxide 8Å Connections Material Poly Silicon First Width 4 µm Layer Spacing 6 µm Thickness 5Å Material Al - Si (Si: 1.% ±.1%) Second Width 6 µm Layer Spacing 9 µm Thickness 2,Å Contact Hole Dimension 8 µm X 8 µm Insulation Layer Material PSG (SiO 2 ) Thickness 1.5 µm Passivation Material PSG (SiO 2 ) (1) Thickness 1.5 µm Passivation Material Proprietary* (2) Thickness Proprietary* Method of Saw Full Cut Method of Die Bond Ablebond 84-1 Wire Bond Method Thermo Sonic Material Au (1. mil / 1.3 mil) Leadframe Material Cu Die Area Ag Lead Plating Pb : Sn (37 : 63) Package Types 14 & 16 Lead PDIP / 16 Lead SOIC Materials EME63 / MP15 / MP19 Remarks: * Patent Pending CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-29
IR211 Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit HIN LIN 5% 5% t on t r t off t f 9% 9% HO LO 1% 1% Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition HIN LIN 5% 5% SD 5% LO HO 1% HO LO t sd 9% MT 9% MT LO HO Figure 3. Shutdown Waveform Definitions Figure 6. Delay Matching Waveform Definitions B-3 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
IR211 2 2 Turn-On Delay Time (ns) 15 1 Turn-On Delay Time (ns) 15 1 5 5-5 - 5 1 Figure 7A. Turn-On Time vs. Temperature 1 12 14 16 18 2 Figure 7B. Turn-On Time vs. Voltage 2 2 Turn-Off Delay Time (ns) 15 1 Turn-Off Delay Time (ns) 15 1 5 5-5 - 5 1 Figure 8A. Turn-Off Time vs. Temperature 1 12 14 16 18 2 Figure 8B. Turn-Off Time vs. Voltage Shutdown Delay Time (ns) 2 15 1 Shutdown Delay time (ns) 2 15 1 5 5-5 - 5 1 Figure 9A. Shutdown Time vs. Temperature 1 12 14 16 18 2 Figure 9B. Shutdown Time vs. Voltage CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-31
IR211 1 1 8 8 Turn-On Rise Time (ns) 6 4 Turn-On Rise Time (ns) 6 4 2 2-5 - 5 1 Figure 1A. Turn-On Rise Time vs. Temperature 1 12 14 16 18 2 Figure 1B. Turn-On Rise Time vs. Voltage 5 5 4 4 Turn-Off Fall Time (ns) 3 2 Turn-Off Fall Time (ns) 3 2 1 1-5 - 5 1 Figure 11A. Turn-Off Fall Time vs. Temperature 1 12 14 16 18 2 Figure 11B. Turn-Off Fall Time vs. Voltage 15. 15. 12. 12. Logic "1" Input Threshold (V) 9. 6. Logic "1" Input Threshold (V) 9. 6. 3. 3.. -5-5 1 Figure 12A. Logic 1 Input Threshold vs. Temperature. 5 7.5 1 12.5 15 17.5 2 VDD Logic Supply Voltage (V) Figure 12B. Logic 1 Input Threshold vs. Voltage B-32 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
IR211 15. 15. 12. 12. Logic "" Input Threshold (V) 9. 6. Logic "" Input Threshold (V) 9. 6. 3. 3.. -5-5 1 Figure 13A. Logic Input Threshold vs. Temperature. 5 7.5 1 12.5 15 17.5 2 VDD Logic Supply Voltage (V) Figure 13B. Logic Input Threshold vs. Voltage 5. 5. 4. 4. High Level Output Voltage (V) 3. 2. High Level Output Voltage (V) 3. 2. 1. 1.. -5-5 1 Figure 14A. High Level Output vs. Temperature. 1 12 14 16 18 2 Figure 14B. High Level Output vs. Voltage 1. 15..8 12. Low Level Output Voltage (V).6.4 Logic "1" Input Threshold (V) 9. 6..2 3.. -5-5 1 Figure 15A. Low Level Output vs. Temperature. 5 7.5 1 12.5 15 17.5 2 VDD Logic Supply Voltage (V) Figure 15B. Low Level Output vs. Voltage CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-33
IR211 5 5 Offset Supply Leakage Current (µa) 4 3 2 1-5 - 5 1 Figure 16A. Offset Supply Current vs. Temperature Offset Supply Leakage Current (µa) 4 3 2 1 1 2 3 4 5 VB Boost Voltage (V) Figure 16B. Offset Supply Current vs. Voltage 5 5 4 4 V BS Supply Current (µa) 3 2 V BS Supply Current (µa) 3 2 1 1-5 - 5 1 Figure 17A. V BS Supply Current vs. Temperature 1 12 14 16 18 2 VBS Floating Supply Voltage (V) Figure 17B. V BS Supply Current vs. Voltage 6 6 5 5 VCC Supply Current (µa) 3 VCC Supply Current (µa) 3-5 - 5 1 Figure 18A. VCC Supply Current vs. Temperature 1 12 14 16 18 2 VCC Fixed Supply Voltage (V) Figure 18B. VCC Supply Current vs. Voltage B-34 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
IR211 1 1 8 8 VDD Supply Current (µa) 6 4 2 VDD Supply Current (µa) 6 4 2-5 - 5 1 Figure 19A. VDD Supply Current vs. Temperature 5 7.5 1 12.5 15 17.5 2 VDD Logic Supply Voltage (V) Figure 19B. VDD Supply Current vs. Voltage 1 1 Logic "1" Input Bias Current (µa) 8 6 4 2 Logic "1" Input Bias Current (µa) 8 6 4 2-5 - 5 1 Figure 2A. Logic 1 Input Current vs. Temperature 5 7.5 1 12.5 15 17.5 2 VDD Logic Supply Voltage (V) Figure 2B. Logic 1 Input Current vs. Voltage 5. 5. Logic "" Input Bias Current (µa) 4. 3. 2. 1. Logic "" Input Bias Current (µa) 4. 3. 2. 1.. -5-5 1 Figure 21A. Logic Input Current vs. Temperature. 5 7.5 1 12.5 15 17.5 2 VDD Logic Supply Voltage (V) Figure 21B. Logic Input Current vs. Voltage CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-35
IR211 11. 11. VBS Undervoltage Lockout + (V) 1. 9. 8. 7. VBS Undervoltage Lockout - (V) 1. 9. 8. 7. 6. -5-5 1 Figure 22. VBS Undervoltage (+) vs. Temperature 6. -5-5 1 Figure 23. VBS Undervoltage (-) vs. Temperature 11. 11. VCC Undervoltage Lockout + (V) 1. 9. 8. 7. V CC Undervoltage Lockout - (V) 1. 9. 8. 7. 6. -5-5 1 Figure 24. V CC Undervoltage (+) vs. Temperature 6. -5-5 1 Figure. V CC Undervoltage (-) vs. Temperature 5. 5. 4. 4. Output Source Current (A) 3. 2. Output Source Current (A) 3. 2. 1. 1.. -5-5 1 Figure 26A. Output Source Current vs. Temperature. 1 12 14 16 18 2 Figure 26B. Output Source Current vs. Voltage B-36 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
IR211 5. 5. 4. 4. Output Sink Current (A) 3. 2. Output Sink Current (A) 3. 2. 1. 1.. -5-5 1 Figure 27A. Output Sink Current vs. Temperature. 1 12 14 16 18 2 Figure 27B. Output Sink Current vs. Voltage 15 32V 15 32V 14V Junction 1 5 14V 1V Junction 1 5 1V Figure 28. IR211 T J vs. Frequency (IRFBC2) RGATE = 33Ω, VCC = 15V Figure 29. IR211 T J vs. Frequency (IRFBC3) RGATE = 22Ω, VCC = 15V 15 32V 14V 15 32V 14V Junction 1 5 1V Junction 1 5 1V Figure 3. IR211 TJ vs. Frequency (IRFBC4) RGATE = 15Ω, VCC = 15V Figure 31. IR211 TJ vs. Frequency (IRFPE5) RGATE = 1Ω, VCC = 15V CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-37
IR211 15 32V 14V 15 32V 14V Junction 1 5 1V Junction 1 5 1V Figure 32. IR211S TJ vs. Frequency (IRFBC2) RGATE = 33Ω, VCC = 15V Figure 33. IR211S TJ vs. Frequency (IRFBC3) RGATE = 22Ω, VCC = 15V 15 32V 14V 15 32V 14V 1V 1V Junction 1 5 Junction 1 5 Figure 34. IR211S T J vs. Frequency (IRFBC4) RGATE = 15Ω, VCC = 15V Figure 35. IR211S T J vs. Frequency (IRFPE5) RGATE = 1Ω, VCC = 15V. 2. VS Offset Supply Voltage (V) -2. -4. -6. -8. VSS Logic Supply Offset Voltage (V) 16. 12. 8. 4. -1. 1 12 14 16 18 2 VBS Floating Supply Voltage (V) Figure 36. Maximum VS Negative Offset vs. VBS Supply Voltage. 1 12 14 16 18 2 VCC Fixed Supply Voltage (V) Figure 37. Maximum VSS Positive Offset vs. VCC Supply Voltage B-38 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL