EEEE 381 Electrnics I Lab #4: MOSFET Differential Pair with Active Lad Overview The differential amplifier is a fundamental building blck in electrnic design. The bjective f this lab is t examine the vltage transfer characteristic and perfrmance f a MOSFET differential amplifier with an active lad i.e., with a PMOS current mirrr attached between the drain terminals f the amplifying MOSFETs and the psitive pwer supply. Thery Intrductin: The actively-laded differential amplifier is a tw-input/single-utput circuit, as shwn in Figure 1. In this circuit, the utput is shwn at the drain f M2 as v. The tw inputs f the differential amplifier are at the gates f M1 and M2. When these inputs are grunded, the bias current available frm the current surce, I, splits evenly between the tw transistrs, assuming that the transistrs are identical. The crrespnding gate t surce vltage f M1 and M2 is the Q-pint vltage (VGSQ) that results in drain current f I/2. V DD + M 3 M 4 v I REF v g1 M 1 M 2 v g2 V SS M 5 M 6 I Figure 1. Differential amplifier with active lad Electrnics I EEEE 381 Lab #4: MOSFET Differential Pair, Active Lad Rev 2017 Page 1 f 11
DC Vltage Transfer Characteristics f a Differential Amplifier: If the gates f bth M1 and M2 are at zer vlts with respect t grund the Q-pint vltages and currents can be fund. If the current surce value is I then that current splits evenly in M1 and M2 giving their Q-pint current f I/2. Assuming all the transistrs are in saturatin. Then the vltage gate-t-surce needed t give these currents can be calculated fr all these transistrs. The DC vltage transfer curve can be fund by leaving ne input at zer vlts and sweeping the ther input frm the negative supply t the psitive supply vltage. The left input (M1) is the nninverting input, the right input (M2) is the inverting input fr V n the right (Vd f M2). The slpe f the linear regin near Vin = zer is the gain f the amplifier. 50 D(V(Vutput)) = Gain Max Gain = 41 V/V 25 SEL>> 0 5.0V D(V(Vutput)) 0V -5.0V -500mV 0V 500mV V(Vutput) V_V3 VTC fr Sweep f Nn-Inverting Input Figure 2. SPICE schematic fr differential amplifier using MOSFETs. Simulatin shws Q-pint vltages and currents. DC vltage sweep shws nn-inverting gain maximum f 41 V/V near Vin = Zer. Electrnics I EEEE 381 Lab #4: MOSFET Differential Pair, Active Lad Rev 2017 Page 2 f 11
Differential-Mde Operatin: Figure 3 shws the differential amplifier with inputs applied in differential mde. Assuming matched transistrs, the fllwing equatins describe the gain f the amplifier. V DD + M 3 M 4 v I REF v g1 M 1 M 2 v g2 v diff ~ 1 kz V SS M 5 M 6 I V COM With v g 1 v diff and 2 v Figure 3. Differential amplifier in differential mde. g 2 v diff 2 v A d m 2 4 v diff, the differential-mde gain is given by Equatin (1): v v diff f a differential amplifier g r r R. (1) The transcnductance gm is given by L W W I g C V V k V V 2 k I 2 k m n x GSQ t n GSQ t n D n (2) L L 2 where ID is the DC current in M1 r M2, and where a lad resistance RL may be attached t the utput nde (nt shwn in figure). If RL is nt present, we wuld let RL in Equatin (1). Nte that a cmmn-mde DC supply (VCOM) might need t be prvided in additin t the differential signal t bias the amplifier in the crrect perating regin (all transistrs in saturatin). This ensures that we get undistrted, r linear, amplificatin. Since the lwer pwer supply is at, a value f VCOM = 0 V may be sufficient, but this shuld be checked as part f the pre-lab preparatin. Electrnics I EEEE 381 Lab #4: MOSFET Differential Pair, Active Lad Rev 2017 Page 3 f 11
Cmmn-Mde Operatin: Figure 4 shws the differential amplifier with inputs applied in. With vg1 = vg2 = vcm, the cmmn-mde gain A CM v v v v cm is given by 4 (3) cm 1 2 R 1 r g m 3 r 3 where R is the utput resistance f the current surce. Fr a simple current surce, R 2 g 1 m 3 R 1 r. (4) 6 I Cmmn-Mde Rejectin Rati: CMRR A cm d ( db ) 20 * lg. (5) A V DD + M 3 M 4 v I REF v g1 M 1 M 2 v g2 V SS M 5 M 6 Figure 4. Differential amplifier in cmmn mde I ~ v cm 1 kz V COM Electrnics I EEEE 381 Lab #4: MOSFET Differential Pair, Active Lad Rev 2017 Page 4 f 11
Pre-Lab Fr hand calculatins use the mst basic equatins and parameters that match the SPICE mdel fr the. The results shuld be similar t the results btained frm SPICE and the build. Fr example: NMOS SPICE mdel shws: VT=1.4, KP=UOxCx =60uA/V 2, and NMOS Parameters shwn as: L=10u, W=170u, NRD=0.059, NRS=0.059. Fr PMOS SPICE mdel shws: VT=1.65, KP=UOxCx = 23uA/V 2, and PMOS parameters as: L=10u, W=360u, NRD=0.027 NRS=0.027. Assume =0.01 and 0.02 fr NMOS and PMOS. (1) Assuming a 4 ma drain current thrugh M6, calculate the theretical Q-pint values by grunding bth inputs f the amplifier in Figure 1 and finding VGSQ1 and VGSQ2. (2) A DC cmmn-mde vltage (VCOM) will be required t allw bias current t flw in the cmplete differential amplifier circuit. Calculate the minimum value f VCOM that can be applied and still ensure prper peratin (i.e., all transistrs in saturatin) f the differential pair. Nte: The threshld vltages f M1 and M2 will be significantly altered by bdy effect. (3) Using the Q-pint values calculated in part (1) and assuming matched transistrs, calculate the theretical differential-mde gain, cmmn-mde gain, and cmmn-mde rejectin rati (CMRR) at v. (4) Use SPICE t btain simulatin values fr the Q-pint vltages. See the Appendix A SPICE Instructins belw. (5) Simulate the circuit in Figure 3 t find the single sided differential-mde gain. Nte that the Vsin vltage surce in SPICE uses amplitude nt peak-t-peak. (6) Simulate the circuit in Figure 4 t find the single sided cmmn-mde gain. (7) Calculate the cmmn-mde rejectin rati (CMRR in db) f the amplifier. Electrnics I EEEE 381 Lab #4: MOSFET Differential Pair, Active Lad Rev 2017 Page 5 f 11
Lab Exercise Objectives: (1) Obtain the vltage transfer characteristics f a MOSFET differential pair. (2) Measure the differential-mde and cmmn-mde gains, and determine the CMRR. Hardware Prcedure: ** The NMOS substrate (pin 7) must be cnnected t the mst negative vltage supply ( here). The PMOS substrate (pin 14) must be cnnected t the mst psitive vltage supply (+5 V here). VDD and VSS need t be cnnected t prvide a path fr the Electrstatic discharge ESD circuitry. S d that befre cnnecting anything t the gates f the MOSFETs and remve the gate cnnectins befre discnnecting the pwer supply. Refer t the pin-ut diagram in the data sheet given as Figure 4. (r large size pin-ut n last page) ** Make sure the signal generatr is in High Z mde. (1) Using the simple current surce designed in Lab #3, build the differential amplifier circuit shwn in Figure 1. Tw packages will be needed use ne fr the differential pair and current mirrr (M1 M4) and a secnd ne fr the simple current surce M5 and M6. (2) Grund bth inputs f the amplifier. Measure the bias current thrugh the current surce and verify that it is apprximately 4 ma by temprarily detaching the M6 drain frm the differential amplifier and cnnecting it (the M6 drain) t + thrugh a 1 k resistr (measure the vltage acrss the 1 k resistr). Then remve the 1 k resistr and reattach the current surce t the differential stage. Measure the DC vltages fr VGSQ1 and VGSQ2, the Q-pint values. (3) Set up the amplifier in differential mde as shwn in Figure 3. Make sure that the NMOS substrates (pin 7) are cnnected t and that the PMOS substrates (pin 14) are cnnected t +. Determine the differential-mde gain by measuring V p-t-p ver Vdiff p-t-p. Yu may need a vltage divider resistr netwrk t btain small enugh input vltages s that the utput vltage is nt clipped depending n the signal generatr minimum utput amplitude. Screen capture input and utput signals fr yur lab write up. Cautin: Yu must get the cmmn-mde DC supply VCOM up t a pint where the differential transistrs are perating prperly i.e., in saturatin. It is nt sufficient t merely get a respnse at the utput nde. (Yu will get a respnse fr VCOM in excess f ~1. abve the lwer supply because current will be flwing, but this desn t mean that all transistrs are perating in saturatin. Yu will als see sme amplificatin f the differential input signal.) Yu must get VCOM at least up the pint where yur current surce is perating prperly i.e., at the designed 4 ma level and all transistrs are in saturatin. All yur results will be invalid if this is nt dne prperly. (Cntinues n next page) Electrnics I EEEE 381 Lab #4: MOSFET Differential Pair, Active Lad Rev 2017 Page 6 f 11
(4) Set up the amplifier in cmmn mde as shwn in Figure 4. Determine the cmmn-mde gain by measuring V p-t-p ver Vin p-t-p. This gain shuld be small s use larger input p-t-p vltage. Screen capture input and utput signals fr yur lab write up. (5) Calculate the CMRR f the amplifier. N.B.: The differential amplifier f Figures 1 4 will be used in subsequent labs (Labs #5 #6), s yu may wish t keep it assembled nce yu have it wrking prperly. Summary and Discussin Cmpare theretical, simulatin, and hardware values f differential-mde and cmmnmde gains, and explain any discrepancies. Explain why the differential input signal amplitude shuld be limited. What wuld yu expect t happen t the utput signal fr larger input signals? Attach SPICE simulatins: (a) cnfirming current surce design; (b) shwing the Vltage Transfer Characteristic (VTC); (c) shwing the differential gain f the amplifier (include curves fr several different input signal amplitudes); (d) shwing the cmmn-mde gain f the amplifier (include curves fr several different input signal amplitudes). Electrnics I EEEE 381 Lab #4: MOSFET Differential Pair, Active Lad Rev 2017 Page 7 f 11
Appendix A SPICE Instructins Please refer t the fllwing fr assistance in mdifying the MbreakN MOSFET s that it represents the NMOS FETs in the chip. We want t place the MbreakN Schematic symbl n ur schematic then edit and display the prperties t represent the transistrs. We als want t change the name f the spice Mdel frm MbreakN t RIT4007N7. Right Click n the transistr and select Edit Prperties, Pivt, Display, Apply Finally, we want t let SPICE knw where t find the text file that has the SPICE MODEL in it. That is dne by editing the SPICE simulatin prfile. Under the Cnfiguratin Files Tab, select Include, and then Brwse t the Lcatin f the file where the SPICE mdel is. (Nte: yu shuld have already placed the text file that has the RIT4007N7 SPICE mdel in it n yur cmputer in sme lcatin) Electrnics I EEEE 381 Lab #4: MOSFET Differential Pair, Active Lad Rev 2017 Page 8 f 11
*SPICE MODELS FOR RIT DEVICES AND LABS - DR. LYNN FULLER 1-11-2017 *LOCATION DR.FULLER'S COMPUTER *and als at: http://peple.rit.edu/lffeee * *----------------------------------------------------------------------- *Used in Electrnics II fr inverter chip *Nte: Prperties L=10u W=170u Ad=8500p As=8500p Pd=440u Ps=440u NRD=0.059 NRS=0.059.MODEL RIT4007N7 NMOS (LEVEL=7 +VERSION=3.1 CAPMOD=2 MOBMOD=1 +TOX=4E-8 XJ=2.9E-7 NCH=4E15 NSUB=5.33E15 XT=8.66E-8 +VTH0=1.4 U0= 1300 WINT=2.0E-7 LINT=1E-7 +NGATE=5E20 RSH=300 JS=3.23E-8 JSW=3.23E-8 CJ=6.8E-8 MJ=0.5 PB=0.95 +CJSW=1.26E-10 MJSW=0.5 PBSW=0.95 PCLM=5 +CGSO=3.4E-10 CGDO=3.4E-10 CGBO=5.75E-10) * *Used in Electrnics II fr inverter chip *Nte: Prperties L=10u W=360u Ad=18000p As=18000p Pd=820u Ps=820u NRS=0.027 NRD=0.027.MODEL RIT4007P7 PMOS (LEVEL=7 +VERSION=3.1 CAPMOD=2 MOBMOD=1 +TOX=5E-8 XJ=2.26E-7 NCH=1E15 NSUB=8E14 XT=8.66E-8 +VTH0=-1.65 U0= 400 WINT=1.0E-6 LINT=1E-6 +NGATE=5E20 RSH=1347 JS=3.51E-8 JSW=3.51E-8 CJ=5.28E-8 MJ=0.5 PB=0.94 +CJSW=1.19E-10 MJSW=0.5 PBSW=0.94 PCLM=5 +CGSO=4.5E-10 CGDO=4.5E-10 CGBO=5.75E-10) *----------------------------------------------------------------------- These are tw f the several SPICE mdels in the text file RIT_SPICE_Mdels.txt prvided n the lab webpage. Yu shuld dwnlad the entire text file and place it n yur cmputer. Yu can include all the mdels by telling SPICE the lcatin f the dwnladed file as shwn n the page abve (page 8). SPICE will actually nly use the mdels called fr by the devices in yur schematic. Electrnics I EEEE 381 Lab #4: MOSFET Differential Pair, Active Lad Rev 2017 Page 9 f 11
14 2 11 13 6 3 8 1 5 10 12 7 4 9 Enlarged Pin Out Electrnics I EEEE 381 Lab #4: MOSFET Differential Pair, Active Lad Rev 2017 Page 10 f 11
Check-Off Sheet A. Pre-Lab Calculatin f theretical Q-pint, VCOM, differential-mde gain, cmmn-mde gain, and cmmn-mde rejectin rati (CMRR) values fr the differential amplifier. SPICE simulatin f the Q-pint. SPICE simulatin f vdiff t find the differential-mde gain at v. SPICE simulatin f vcm t find the cmmn-mde gain at v. B. Experimental Differential amplifier f Figure 1 built and prper DC peratin verified. Differential amplifier set up as in Figure 3; experimental differential-mde gain btained fr three different input values f vdiff. Differential amplifier set up as in Figure 4; experimental cmmn-mde gain btained fr three different input values f vcm. Experimental value f CMRR-dB calculated. TA Signature: Date: Electrnics I EEEE 381 Lab #4: MOSFET Differential Pair, Active Lad Rev 2017 Page 11 f 11