Managing Complex Impedance, Isolation & Calibration for KGD RF Test Roger Hayward and Jeff Arasmith Cascade Microtech, Inc. Production Products Division 9100 SW Gemini Drive, Beaverton, OR 97008 503-601-1000, roger_hayward@cmicro.com, jeff_arasmith@cmicro.com Abstract -- This paper outlines a number of the most common issues involved with preparing a probe card for Known Good Die (KGD) RF test. These include managing complex impedance, isolation between RF ports, and establishing a plan for RF calibration. For each issue, proactive planning will improve the test accuracy, coverage and repeatability on the test floor. INTRODUCTION Over the past 20 years, consumer RF devices have evolved significantly. Many devices incorporate both RF transceivers and digital sub-systems. Other process-specific components are manufactured for System-In-Package (SIP) applications. Because of this, fabricated components must now be tested thoroughly on-wafer. In many cases, testing for Known Good Die (KGD) is the only time the circuit will be tested prior to integration. Although every RF device designed is created to fill a unique niche, most of the technical challenges behind probing have common themes to them: Low insertion loss, high port-to-port isolation, repeatable RF performance, accurate calibration, accurate power measurement, high bandwidth, low lead inductance, high power, etc. There are times when the design phase of a new product does not consider the need to accurately probe the die for KGD test. This can increase the time required to ramp the part into high volume. Figure 1 Cascade Microtech Pyramid Probes for KGD RF test. This paper presents solutions for a number of challenges faced during wafer-level RF test. Impedance matching networks enable accurate power measurements. Packaged-part bond wire
parasitics need to be minimized, controlled or emulated in the probe card. Controlled-impedance paths improve port-to-port isolation. Finally, establishing a solid, repeatable plan for RF calibration will improve the coverage and accuracy during KGD test. Proper pad placements of RF interfaces will ease the burden of moving a new device into RF test, although this is not always possible. Using best known methods, consider drawing RF ports with ground-signal-ground (GSG) interfaces. Uniform pitch & alignment between ports is helpful as well. When these opportunities are not available, other techniques may be utilized. These will be discussed below. High volume, high density probing is accomplished with the Cascade Microtech Pyramid Probe, revealed in Figure 1 above. Traces are routed within a thin-film polyimide flex circuit. This fabrication technique allows microwave transmission lines to be routed with controlled impedance directly to the probe tip. Low impedance power & control lines are routed in the thin-film as well. MANAGING COMPLEX IMPEDANCE Most consumer RF interfaces do not present 50 ohm impedances to their output. When this is the case, it becomes necessary to add an impedance matching network to the path between the device and the test instrument. For KGD tests, this may reduce a complicated correlation down to a simple power measurement. Power measurements may be performed by a VNA, ATE, or with a low-cost power detection circuit incorporated into the probe card. The port impedance needs to be characterized prior to probe card design. This may be an estimate from simulation, or load-pull measurement. Using the target matching network, sample devices may be probed. An initial design may be completed with these early samples. The final impedance may need to be adjusted slightly by altering one or more components in the network. For devices with high levels of integration, powering up a device for impedance measurements can be a difficult effort. Consider adding a test mode to enable active devices without the added complexity of outboard controllers, firmware, etc. Modes of this sort will allow sub-tests to be completed before the final integration stages. Lumped-Element Impedance Matching For narrowband applications, a lumped-element low-pass or high-pass network usually provides enough flexibility to move the impedance to 50 ohms. A short-length transmission line connects the DUT pads to the matching network. This transmission line must be included as part of the network design. An example matching network is shown in Figure 2 below. Remember that the wires shown in schematics indicate connectivity between components, but nothing else. If components are separated by any distance, the layout will need to include a transmission line which models that portion of the path. In this case, the transmission line TL 1 represents the electrical length from the probe tip, through the thin-film membrane, and onto the printed circuit board (PCB).
E D C B A Port1 L2 C1 L1 TL1 Device Figure 2 Generic low pass impedance matching network. The path includes a transmission line between the DUT and the matching network. Narrowband impedance matching can be designed by utilizing the Smith chart. Impedance is plotted at the center frequency. The plot in Figure 3 includes the impedance of the circuit from Figure 2, as components are introduced from right to left. Start by measuring S 11 looking into point "A," as shown in the figures. The transmission line length is a fixed electrical delay that cannot be changed after the probe card is assembled. Lumped element components are used to shift the impedance to the real axis. Series inductors add reactance, following the constant-resistance path on the Smith chart. Shunt capacitors add capacitive susceptance (lowering the reactance), following the constantconductance path on the chart. Figure 3 Following the impedance from the DUT to 50 ohms. In the example shown in Figure 3, point "A" represents the impedance seen at the device. The initial impedance is 30 + j40 ohms (inductive reactance). The 50 ohm transmission line shifts this impedance to point "B," 30 - j40 ohms (capacitive reactance). L 1 shifts the impedance to an inductive reactance again, seen at point "C." Contributions from the shunt capacitor C 1 lower the
impedance to point "D." Finally, L 2 adds a small amount of inductive reactance to obtain 50 ohms. In a high volume production probe, the lumped-element matching network may be implemented on the printed circuit board, or within the probe itself. In either case, it is important to understand the electrical length delay of the transmission line between the probe tip and the first lumped element. (This is the path between point "A" and "B" on the Smith chart above). Although transmission line losses should be kept to a minimum, this loss can be modeled or measured prior to design of the matching network. 50 ohm 20 ohm 10 ohm Figure 4 Example thin-film probe layout, with 10, 20 and 50 ohm microstrip transmission lines leaving the device. Depending upon how much is understood about the device impedance, it may be difficult to predict the best topology to use for the lumped element matching network. It may be beneficial to add additional shunt and series elements to the chain. For example, the first element may need to be a shunt capacitor if the impedance appears inductive. Proper selection of components will dictate how many or few components are required to achieve an acceptable match. One additional technique for impedance adjustment is to add a series of adjacent shunt elements into the layout of the matching network, such that one shunt element can be introduced at a sliding location along the transmission line. Careful placement of a shunt reactive component may greatly minimize the number of components required to obtain a perfect match. After designing the matching network, it is useful to measure S 11 of the network prior to powering up the device. By terminating onto a 50 ohm structure, the effects of the lumped-element structure (only) may be observed and verified independent of device characterization. Quarter-Wave Transformer Matching The quarter-wave transformer is another technique for narrowband impedance matching a load impedance to a transmission line 1. Matching the DUT impedance Z L to the transmission line impedance Z 0 is accomplished by using a quarter-wavelength matching network impedance
Z TL1, where ZTL 1 = Z0Z L. This technique is useful for transforming from low or high impedance, back to 50 ohms. C B A Port1 TL2 Z=50 Ohm E=Any TL1 Z=16 Ohm E=90 R1 R=5 Ohm Z TL1 = 50 5 = 16Ω Figure 5 Quarter wave transmission line matching network example. Consider the example of a device with 5 ohms output impedance in Figure 5. This may be matched with a quarter-wave 16 ohm transmission line. No other elements are required to achieve 50 ohms. Once the quarter wave transform has completed, the path may continue in 50 ohm line for as long as is required. λ 8 0λ λ 4 Figure 6 Quarter wave transformer matching network from Figure 5. A 16 ohm transmission line matches the 5 ohm load to 50 ohms. Lower impedance transmission lines are useful for power device matching networks. The lower impedance implies a larger structure within the thin-film, which translates to less power loss. The length of the quarter wave transmission line may exceed the distance on the thin-film portion of the probe card for lower frequencies. Lumped elements may be placed on the printed circuit board. For higher frequencies, the quarter wave line may be drawn to length on the membrane, as shown in Figure 7 below.
Figure 7 Thin-film probe layout of a quarter-wave transmission line matching network. Transmission line was drawn to match exact length. A shunt SMT component may be added for fine tuning. The 50 ohm transmission line leaves the membrane to the left. Mixed Transmission Line, Lumped Element Example The quarter wave transmission line technique may be used to match to complex impedances as well. By varying the length of the transmission line slightly, a reactive load may be transformed directly to 50 ohms, or to a point near 50 ohms. (The length of the transmission line does not necessarily have to be exactly a quarter wavelength). Although a small lumped element network may be required in order to achieve an optimal match, the quarter wave transmission line will still perform the bulk of the work. D C B A Port1 TL2 Z=50 Ohm E=Any L L1 L=2nH TL1 Z=18 Ohm E=85 Device1 Z[1]=5+j4 Ohm Figure 8 Mixed matching network example. Network transforms 5 + j4 ohms to 50 ohms. In Figure 8 above, a complex impedance of 5 + j4 ohms is matched to 50 ohms with a transmission line, slightly shorter than a quarter wave. Because the exact impedance of the device may not be known until devices are available to probe, the length and impedance of the transmission line may be estimates. In this example, the Z TL1 impedance chosen is 18 ohms. The impedance at point "B" can be corrected with one series inductor.
Figure 9 Mixed matching network example from Figure 8. Transmission line section performs most of the match. A lumped element network performs final correction. The topology and design of the impedance matching network can be determined from initial simulation or measurements of the device. Since simulated S-parameter data can provide a reasonable starting point, most of the network may be designed and integrated into the probe card. Final adjustments to 50 ohms may be performed with a small, flexible-topology lumped element network on the printed circuit board. EMULATING LEAD INDUCTANCE When designing RF components, the parasitic effects of final packaging are always a concern. Often, it is important to include the effects of the package's lead inductance as a part of the final circuit. This is especially an issue with high-frequency narrowband filters. When probing circuits for KGD test, the probing system is unlikely to have the same lead inductance as the final package. This difference will load the circuit differently, causing different measurement results. In the case of narrowband filters, this will alter the insertion loss, the pass band ripple, and even shift the center and notch frequencies slightly. Unfortunately, it is not always straightforward to calibrate out the effects of lead inductance. Series inductance on the signal lines may be augmented, post-calibration. However, return paths (ground) are more difficult to de-embed. For this reason, it is important for some circuits to load them with the similar parasitics as will be expected after packaging. One way to include the effects of the bond wire inductance is to incorporate the inductance into the probe itself. The series inductance of the bond wire may be emulated through a thin-film inductor, placed right at the probe tip. The inductance may be set to any value from 300pH to 10nH, or may be measured and trimmed after fabrication of the probe.
Figure 10 Example thin-film probe layout, emulating bond wire inductors. Rungs of the ladder are cut to achieve desired inductance, to within 100pH. All paths to the package incorporate bond wire inductance. PROBE ISOLATION MUST EXCEED THE MEASUREMENT NEEDS Port-to-port isolation of the device must be verified as well as direct-path connectivity, for some wireless components, especially switches & filters. The probing ports must demonstrate isolation which exceeds the expected isolation of the device itself. In order to achieve high isolation, the fringe fields of the signals must be kept to a minimum. All close, parallel paths between transmission lines should be eliminated. If possible, high-isolation pairs should arrive at the DUT from different angles, ideally at 90 degrees (or greater). Figure 11 Example thin-film probe layout for a multi-position RF switch. Transmission lines are coplanar waveguide, to minimize loss. Figure 11 above reveals a probe for a multi-position RF switch used for cellular communications. The antenna and transmitter power amplifier are connected from the left. In order to maximize the port isolation, all receiver paths are connected to the DUT from the other quadrants of the probe. The closest coupling distance is approximately 700 microns across the die. The thin-film transmission lines are routed as coplanar waveguide to minimize path loss. The typical isolation with this layout approach is 70dB @ 2.4 GHz.
ESTABLISHING A PLAN FOR RF CALIBRATION RF Calibration is an essential step for proper KGD test. Network analyzer calibration is different from traditional calibration of most lab instruments. Slight changes in environmental conditions (temperature, humidity) as well as aging of critical devices within the instrument require periodic characterization. The measurement accuracy determines how often the network analyzer should be re-calibrated. It is not unusual to calibrate on a daily basis, or at the beginning of a work shift. Calibration may be accomplished by a number of techniques. These include coaxial calibration, calibration with port extensions, fixture de-embedding, and calibration at the probe tips. Coaxial Calibration & Port Extensions Coaxial calibration involves characterizing the loss and delay between the measurement equipment, and the end of the test cables. Once this characterization has been performed, the errors are subtracted mathematically from the measurement. This is known as establishing a reference plane. Figure 12 Network analyzer port with cable calibration. The probe assembly must be accounted-for, prior to performing measurements. Mechanical standards are connected at the end of the test cables. The network analyzer software includes wizards to guide the operator through the process of connecting a short, an open, and a 50 ohm load to each port. The calibration is completed by presenting a thru-path between all combinations of ports. The errors are computed and stored by the network analyzer. Coaxial calibration does not account for the loss & delay within the probe card. Subsequent measurements will include these losses. Network analyzers allow an electrical length delay, as well as a linear loss estimate to be subtracted from each port s measurements. This technique is referred to as a port extension. This extends the reference plane closer to the device under test, as shown in Figure 12 above. Fixture De-Embedding Fixture de-embedding replaces the port extension with a characterized model. Each RF path on the probe card may be characterized for loss, delay & reflections. The errors are represented as a two-port S-parameter model, stored in a Touchstone file. The network analyzer or ATE system will concatenate this error model onto the loss information obtained during coaxial calibration. It is important to characterize each port within the probe card system separately, as each path will have unique electrical lengths and losses.
Figure 13 Network analyzer port with fixture de-embedding. Probe characterization is de-embedded from the cable calibration. Tip Calibration Techniques Calibration may be performed directly at the probe tips, using similar techniques. Impedance Standard Substrates (ISS) are designed to match probes for device characterization and process monitoring. When probing such standards, the operator must either develop a calibration kit for the network analyzer 2 or ATE, or perform the calibration with tools such as WinCal 3. Probing an ISS with a production probe card requires careful planning. The probe tip configuration must be capable of landing onto known standards. The prober must be capable of aligning to the ISS. A thru-path between two ports is required for most calibration techniques. When industry-standard substrates do not match the DUT configuration, it may become necessary to build custom standards to match the probe. A custom thru structure is revealed in Figure 14(b) below. The device layout is replicated. Two of the three RF ports are connected with a 50 ohm transmission line. Other port-to-port thru paths are replicated elsewhere on the structure. One of the common concerns associated with VNA calibration is which algorithm to use. These include TRL, SOLT, LRM and LRRM, as well as many others. Each has their advantages and disadvantages 4,5. For custom RF devices, the probe cards present the additional challenge that the probe positions cannot be altered. This places additional limitations on the choice of which algorithm to use for calibration. For frequencies of interest in the 1-6 GHz range, the SOLR 6 calibration technique has a unique advantage for custom device RF probing. SOLR stands for "Short, Open, Load, Reciprocal." The advantage of this particular calibration technique is that the port-to-port thru-path does not need to be perfect. (This is frequently referred to as the unknown thru technique). As a final step, it is helpful to land on a few known standards, to confirm the calibration produces the desired results. Using known standards, measure S 11 to verify that the 50 ohm load is at the center of the Smith chart and the open and short are dots on the right and left side, respectively. Measuring S 21 on the thru standard should reveal an insertion loss at or near 0 db (the loss measured is the loss between the two probe tips only). Short-length transmission lines are also useful structures to probe for verification.
Figure 14 Substrates for probe tip RF calibration. (A) A standard ISS (left) provides short, load & thru paths for 100-150um GSG probes. (B) Custom structure (right) provides a thru path to match the probe's layout. Designing for Calibration A few design considerations prior to tape out will greatly improve your success when probing for known-good-die. Maintain a fine pitch, 100 to 200um, ground-signal-ground (GSG) configuration. Since the RF field exists in the region between the wires, the return path for RF is just as critical as the driven line. Even at 2 GHz, it is best to place ground pads next to each RF signal. For 2-port calibration, consider placing RF ports in a direct line with each other. For multi-port devices, place respective RF ports at 90 degree angles. This will allow general purpose structures to be used for thru-path verification. The most difficult patterns to align to a standard substrate are when both ports are on the same side of the device. It is equally challenging when ports are on opposite sides of the device, but are not directly across from one another. Confirm that every RF port will have a respective set of standards to probe for calibration and verification. It may be more beneficial to alter the pad placements than to design custom standards to match the probe after tape out. Even when this is not possible, it is always useful to have known standards such as a short, open, load & thru to probe in place of the device. SUMMARY The techniques discussed will lower the time required to bring a new design into high volume production. Proactive design-for-test considerations will result in lower test times, increased accuracy and repeatability, which will ultimately lower the cost to perform the tests. When optimal pad placement is not available, alternate methods may still be employed to insure accurate, repeatable measurements on the test floor. 1 2 3 4 5 6 "Microwave Engineering," David Pozar, 3rd Edition, 2005, Wiley. "Specifying Calibration Standards and Kits for Agilent Vector Network Analyzers," Application Note 1287-11, Agilent Technologies. http://cp.literature.agilent.com/litweb/pdf/5989-4840en.pdf More information on WinCal may be found online at http://www.cmicro.com/wincal. "RF Measurements of Die and Packages," Scott Wartenberg, 2002, Artech House, Inc. On Wafer Vector Network Analyzer Calibration & Measurements, 1998, Cascade Microtech Application Note. See http://www.cmicro.com. "An SOLR Calibration for Accurate Measurement of Orthogonal On-Wafer DUTs," IEEE MTT-S International Microwave Symposium, Denver, CO, June 1997.