3A, 8, MHz ynchronous tep-down onverter DERIPTION The is a MHz fixed frequency synchronous current mode buck regulator. The device integrates both 35mΩ high-side switch and 90mΩ low-side switch that provide 3A of continuous load current over a wide operating input voltage of 4.5 to 8.The internal synchronous power switch increases efficiency and eliminates the need for an external chottky diode. urrent mode control provides fast transient response and cycle-by-cycle current limit. The features short circuit and thermal protection circuits to increase system reliability. Externally programmable soft-start allows for proper power on sequencing with respect to other power supllies and avoids input inrush current during startup. In shutdown mode, the supply current drops below µa. The is available in OP-8 package with the exposed pad. Typical Application ircuit FEATURE 3A ontinuous Output urrent 0ns Minimum On Time Integrated 35mΩ High ide witch Integrated 90mΩ Low ide witch Wide 4.5 to 8 Operating Input Range Output Adjustable from 0.8 to 4 Up to 95% Efficiency Programmable oft-tart <µa hutdown urrent MHz Fixed witching Frequency Thermal hutdown and Over urrent Protection Input Under oltage Lockout Available in OP-8 (EP) package RoH ompliant and 00% Lead(Pb)-Free Halogen-Free APPLIATION Distributed Power ystems Networking ystems FPGA, DP, AI Power upplies Figure. D3475 er.6 May 0
Pin onfigurations Package Type Pin onfigurations OP-8 (EP) Pin Description Number Pin Name Description B 3 W 4 9 (Exposed Pad) GND 5 FB 6 OMP 7 EN 8 High-ide Gate Drive Boost Input. B supplies the drive for the high-side N-hannel DMO switch. onnect a 0.0µF or greater capacitor from W to B to power the high side switch. Power Input. supplies the power to the I, as well as the step-down converter switches. Drive with a 4.5 to 8 power source. Bypass to GND with a suitably large capacitor to eliminate noise on the input to the I. ee Input apacitor. Power witching Output. W is the switching node that supplies power to the output. onnect the output L filter from W to the output load. Note that a capacitor is required from W to B to power the high-side switch. Ground. The exposed pad must be soldered to a large PB and connected to GND for maximum power dissipation. Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive voltage divider connected to it from the output voltage. The feedback threshold is 0.8. ee etting the Output oltage. ompensation Node. OMP is used to compensate the regulation control loop. onnect a series R network from OMP to GND. In some cases, an additional capacitor from OMP to GND is required. ee ompensation omponents. Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator; low to turn it off. onnect to with a 00K pull up resistor for automatic startup. oft-tart ontrol Input. controls the soft-start period. onnect a capacitor from to GND to set the external soft-start period, or leave floating to set the internal soft-start period. A 0.µF capacitor sets the soft-start period to about 5ms. Leave pin floating, and the internal soft-start period is about 300µs. D3475 er.6 May 0
Ordering Information Order Number Package Type Marking Operating Temperature Range DIR OP-8 (EP) Lead Free ode : Lead Free, Halogen Free Packing R: Tape & Reel Operating temperature range I: Industry tandard Package Type D: OP xxxxx P3475-40 to +85 Block Diagram Figure. Functional Block Diagram D3475 er.6 May 0 3
Absolute Maximum Ratings () upply oltage ( ) -------------------------------------------------------- -0.3 to +30 EN oltage ( EN ) -------------------------------------------------------- -0.3 to +6 witch oltages ( W ) ------------------------------------------------------ - to +0.3 Bootstrap oltage ( B ) -------------------------------------------- W -0.3 to W +6 All Other Pins ---------------------------------------------------------------------- -0.3 to +6 Junction Temperature -------------------------------------------------------------------- 50 Lead Temperature ------------------------------------------------------------------------ 60 torage Temperature -------------------------------------------------------- -65 to 50 Output oltage ----------------------------------------------------------- 0.9 to 6 Thermal Resistance θ JA (OP-8_EP) ------------------------------------------------------------------------- 60 /W ED Ratings Human Body Mode --------------------------------------------------------------------------- ±k Recommend Operating onditions () Input oltage ( ) ---------------------------------------------------------------- 4.5 to 8 Operating Temperature Range ------------------------------------------------ -40 to +85 Note (): tress beyond those listed under Absolute Maximum Ratings may damage the device. Note (): The device is not guaranteed to function outside the recommended operating conditions. Electrical haracteristics Unless otherwise specified,,t A +5. ymbol Parameter onditions Min Typ Max. I HUT hutdown upply urrent EN 0 0. 3 µa I Q upply urrent EN, OMP 0.35..5 ma FB Feedback oltage 4.5 8 0.784 0.800 0.86 A EA Error Amplifier oltage Gain 400 / G EA Error Amplifier Transconductance I ±0µA 400 µa/ R D(ON) High-ide witch On-Resistance I W 300mA 35 R D(ON) Low-ide witch On-Resistance I W 300mA 90 mω I LEAKAGE High-ide witch Leakage urrent EN 0, W 0 0 0 µa I LIMIT Upper witch urrent Limit Minimum Duty ycle 3.6 4.8 I NEG Low-side witch Reverse urrent Limit From Drain to ource - A G OMP to urrent ense Transconductance 5.6 A/ F O Oscillation Frequency FB 0.76 0.8. MHz F O hort ircuit Oscillation Frequency FB 0 00 KHz D MAX Maximum Duty ycle FB 0.76 90 % T ON Minimum On Time 0 ns EN EN hutdown Threshold oltage EN Rising..5 EHHY EN hutdown Threshold oltage Hysterisis 0. ULO Input Under oltage Lockout Threshold Rising 3.8 4.0 4. Input Under oltage Lockout Threshold ULOHY Hysteresis 0. I oft-tart urrent 0 6 µa T oft-tart Period 0.µF 5 ms T D Thermal hutdown 60 T DHY Thermal hutdown Hysteresis 0 Unit D3475 er.6 May 0 4
Typical Operating haracteristics ( 0µF, 0µF, L4.7µH, 0.µF,T A +5, unless otherwise noted.) D3475 er.6 May 0 5
Typical Operating haracteristics (ontinued) ( 0µF, 0µF, L4.7µH, 0.µF,T A +5, unless otherwise noted.) Output Ripple Output Ripple D3475 er.6 May 0 6
Typical Operating haracteristics (ontinued) ( 0µF, 0µF, L4.7µH, 0.µF,T A +5, unless otherwise noted.) External oft-tart External oft-tart Internal oft-tart (without apacitor) Internal oft-tart (without apacitor) hut Down hut Down D3475 er.6 May 0 7
Typical Operating haracteristics (ontinued) ( 0µF, 0µF, L4.7µH, 0.µF,T A +5, unless otherwise noted.) Load Transient Response hort ircuit hort ircuit Recovery D3475 er.6 May 0 8
Application Information etting the Output oltage The output voltage is set using a resistive voltage divider connected from the output voltage to FB. The voltage divider divides the output voltage down to the feedback voltage by the ratio: R FB R + R Thus the output voltage is: R + R 0.8 R R can be as high as 00kΩ, but a typical value is 0kΩ. Using the typical value for R, R is determined by: R ( 0.8).5K For example, for a 3.3 output voltage, R is 0kΩ and R is 3.5kΩ. Inductor The inductor is required to supply constant current to the load while being driven by the switched input voltage. A larger value inductor will result in less ripple current that will in turn results in lower output ripple voltage. However, the larger value inductor will have a larger physical size, higher series resistance, and/or lower saturation current. A good rule for determining inductance is to allow the peak-to-peak ripple current to be approximately 30% of the maximum switch current limit. Also, make sure that the peak inductor current is below the maximum switch current limit. The inductance value can be calculated by: L f I L ( Where is the output voltage, is the input voltage, f is the switching frequency, and I L is the peak-to-peak inductor ripple current. hoose an inductor that will not saturate under the maximum inductor peak current, calculated by: ILP ILOAD + ( ) f L Where I LOAD is the load current. The choice of which style inductor to use mainly depends on the price vs. size requirements and any EMI constraints. Optional chottky Diode During the transition between the high-side switch and low-side switch, the body diode of the low-side power MOFET conducts the inductor current. The forward voltage of this body diode is high. An optional chottky diode may be paralleled between the W pin and GND pin to improve overall efficiency. ) Input apacitor The input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the A current while maintaining the D input voltage. Use low ER capacitors for the best performance. eramic capacitors are preferred, but tantalum or low-er electrolytic capacitors will also suffice. hoose X5R or X7R dielectrics when using ceramic capacitors. ince the input capacitor ( ) absorbs the input switching current, it requires an adequate ripple current rating. The RM current in the input capacitor can be estimated by: I I LOAD ( The worst-case condition occurs at, where I I LOAD /. For simplification, use an input capacitor with a RM current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, a small high quality ceramic capacitor, i.e. 0.µF, should be placed as close to the I as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple for low ER capacitors can be estimated by: I LOAD f ( ) where is the input capacitor value. For simplification, choose the input capacitor whose RM current rating greater than half of the maximum load current. Output apacitor The output capacitor ( ) is required to maintain the D output voltage. eramic, tantalum, or low ER electrolytic capacitors are recommended. Low ER capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by: ( ) (R ER + ) f L 8 f Where is the output capacitance value and R ER is the equivalent series resistance (ER) value of the output capacitor. When using ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance which is the main cause for the output voltage ripple. For simplification, the output voltage ripple can be estimated by: 8 f L ( ) ) D3475 er.6 May 0 9
When using tantalum or electrolytic capacitors, the ER dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to: ( ) R ER f L The characteristics of the output capacitor also affect the stability of the regulation system. The can be optimized for a wide range of capacitance and ER values. ompensation omponents employs current mode control for easy compensation and fast transient response. The system stability and transient response are controlled through the OMP pin. OMP is the output of the internal transconductance error amplifier. A series capacitor-resistor combination sets a pole-zero combination to govern the characteristics of the control system. The D gain of the voltage feedback loop is given by: FB A D R LOAD G A EA Where FB is the feedback voltage (0.8), A EA is the error amplifier voltage gain, G is the current sense transconductance and R LOAD is the load resistor value. The system has two poles of importance. One is due to the compensation capacitor ( ) and the output resistor of the error amplifier, and the other is due to the output capacitor and the load resistor. These poles are located at: GEA fp π A f P π R EA LOAD where G EA is the error amplifier transconductance. The system has one zero of importance, due to the compensation capacitor ( ) and the compensation resistor (R ). This zero is located at: f Z π R The system may have another zero of importance, if the output capacitor has a large capacitance and/or a high ER value. The zero, due to the ER and capacitance of the output capacitor, is located at: fer π R ER In this case, a third pole set by the compensation capacitor ( ) and the compensation resistor (R ) is used to compensate the effect of the ER zero on the loop gain. This pole is located at: fp3 π R The goal of compensation design is to shape the converter transfer function to get a desired loop gain. The system crossover frequency where the feedback loop has the unity gain is important. Lower crossover frequencies result in slower line and load transient responses, while higher crossover frequencies could cause the system instability. A good standard is to set the crossover frequency below one-tenth of the switching frequency. To optimize the compensation components, the following procedure can be used:. hoose the compensation resistor (R ) to set the desired crossover frequency. Determine R by the following equation: π f R < G EA G FB G EA G Where f is the desired crossover frequency, which is typically below one tenth of the switching frequency.. hoose the compensation capacitor ( ) to achieve the desired phase margin. For applications with typical inductor values, setting the compensation zero (f Z ) below one-forth of the crossover frequency provides sufficient phase margin. Determine by the following equation: 4 > π R f where R is the compensation resistor. 3. Determine if the second compensation capacitor ( ) is required. It is required if the ER zero of the output capacitor is located at less than half of the switching frequency, or the following relationship is valid: π R ER f < If this is the case, then add the second compensation capacitor ( ) to set the pole f P3 at the location of the ER zero. Determine by the equation: R R π ER 0. f Table. Recommended omponent election (4.5 <8) () R (kω) R (kω) R (kω) (nf) (µf) L(µH). 5 0 0...5 8.75 0 0...8.5 0 3...5.5 0 0. 4.7 3.3 3.5 0 0. 4.7 5 5.5 0 30. 6.8 8 90 0 4. 6.8 0 5 0 4. 0 5 77.5 0 60. 0 FB D3475 er.6 May 0 0
Packaging Information OP-8 (EP) Remark: Exposed pad outline drawing is for reference only. YMBOL MILLIMETER HE M. Normal MAX. M. Normal MAX. A.35 -.75 0.053-0.069 A 0.00-0.5 0.000-0.00 D 4.80 4.90 5.00 0.89 0.93 0.97 E 3.70 3.90 4.00 0.46 0.54 0.57 D.65.00.35 0.065 0.079 0.093 E.65.00.35 0.065 0.079 0.093 E 5.80 6.00 6.0 0.8 0.36 0.44 L 0.40 -.7 0.06-0.050 b 0.3-0.5 0.0-0.00 e.7 0.050 D3475 er.6 May 0