3. For V i > 0, V o 0. For V i < 0, V o V i. The resulting waveform consists only of the negative "humps" of the original cosine wave. Each hump has a duration of 0.5s there is a 0.5s gap between each hump. 3. (c) (d) (e) (f) output passes first (positive) hump only output passes second (negative) hump only output passes first (positive) hump only output passes second (negative) hump only output passes full first (positive) hump /-scale second hump output passes full wave 3.3 For V i > 0, V o V i. For V i < 0, V o -V i. The resulting waveform is a full wave rectified sin wave where there are two positive "humps" for each period of V i (0.5 sec). 3.4 For V i > 0.5V, V o 0.5V. For V i < 0.5V, V o V i. The resulting waveform is the original sine wave with the top halves of the positive "humps" (above 0.5 V) clipped off. For V i < 0.5V, V o 0.5V. For V i > 0.5V, V o V i. The resulting waveform is the original sine wave with the bottom halves of the negative "humps" (below 0.5 V) clipped off. 3.5 Using superposition, Ohm s Law, current division, V I left ----- + --- I left --I left 4 Introduction to Mechatronics Measurement Systems
V I 4left --I, left I 4right ----- + 3 3 I right ---- + I 4right I right I 4right I right I I left + I right I I left + I right I 3 0 I 4 I 4left + I 4right V diode V I 4 3 > 0 > 0 4 > 0 --V > 0 5 3.6 For V in > 0, For V in < 0, --V in 5sin( πt) V in 5sin( πt) The positive "bumps" of the resulting waveform are half the amplitude (5 vs. 0) of the original, the lower bumps are the same. 3.7 In steady state dc, the capacitor is equivalent to an open circuit. Therefore, the steady state current through the capacitor is 0 the steady state voltage across the capacitor is. For V s 0V, the diode is forward biased is equivalent to a short circuit. Therefore, the equivalent resistance of the two horizontal resistors is / from voltage division, V capacitor - V s --V --- + 3 s 6.66V For V s 0V, the diode is reverse biased is equivalent to an open circuit. Therefore, the circuit simplifies to two series resistors V capacitor -V --V + s s 5V Introduction to Mechatronics Measurement Systems 5
3.8 There are three possible states of the diodes. When only the left diode is forward biased, V H. When only the right diode is forward biased, V L. When both diodes are reverse biased, V L < < V H. In this case, the circuit is a voltage divider L i + L V in --V in The upper limit of this state is when V H 5V corresponding to V in 0V. remains at 5V when V in increases above 0V. The lower limit of the double reverse biased state is when V L 5V corresponding to V in 0V. remains at 5V when V in decreases below 0V. It is not possible for both diodes to be reverse biased at the same time in this circuit. The resulting output signal is a sin wave scaled by / with the peaks clipped off at ±0V. 3.9 output passes first (positive) hump only output is 5.V over the whole input cycle 3.0 Use a resistor in series with the LED where: 5V V I -- LED The required resistance value is ( 5V V LED ) - I max 5V -- 50mA 00Ω ( 5V V) - 50mA 60Ω 3. V E 5V V LED V CE.8V V in ( saturation) V E + V BE.8V + 0.7V 3.5V 6 Introduction to Mechatronics Measurement Systems
3. For the LED to be ON, the transistor must be in saturation When the LED is off, I B 0 So for the LED to be ON, When the transistor is fully saturated, V B V LED + 0.7V.7V V C V LED + 0.V.V Assume V B V LED + V BE V + 0.7V.7V V in V B --V in > V B 3.4V 5V V I C C -- - 3.8V.5mA 330Ω 330Ω I B --I 00 C 0.5mA If I is the current through the horizontal k resistor I is the current through the right k resistor, then V B I I + I B + 0.5mA.85mA k V in V B + ( k)i 3.5V 3.3 When the transistor is in full saturation, V CE 0.V V BE 0.7V I C I out I B + I C -- + I 00 C.0I C In the collector-to-emitter circuit, V s I C C V CE I out out giving 5V I C ( k) 0.V.0I C ( k) Introduction to Mechatronics Measurement Systems 7
Now we can solve for the collector emitter currents: I 4.8V C -.39mA.0k I out.0i C.4mA Therefore, I out out (.4mA) ( k).4v the minimum required input voltage is: V in + V BE + I B B.4V + 0.7V + ( 0.39mA) ( k) 3.3V 3.4 : a resistor (e.g., k) to limit the base current while ensuring the transistor is in full saturation : 4 V dc capable of at least A of current 3: power diode capable of carrying at least A for flyback protection 4: ground 3.5 A voltage source (e.g., 5V) current limiting series resistor (e.g., 330 Ω) is required on the LED side. On the phototransistor side, a pull-up resistor (e.g, k) a voltage source (e.g., 5V) is required on the collector lead ground is required on the emitter lead. 3.6 : nothing required : 4 V dc capable of at least A of current 3: power diode capable of carrying at least A for flyback protection 4: ground 3.7 The type of BJT required is an npn an additional resistor must be added in series with the open collector output to pull up the voltage enough to bias the BE junction of the BJT. 3.8 The upper FET is a p-channel enhancement mode MOSFET the lower is an n-channel enhancement mode MOSFET. When V in 5V, the upper MOSFET doesn t conduct but the bottom one does, so 0V. When V in 0V, the upper MOSFET conducts but the bottom one doesn t, so V cc. 3.9 The requirements are that I d( cont) > 0A P dmax IF530N is a good choice ( ) I onon > 00 on 8 Introduction to Mechatronics Measurement Systems
3.0 (c) (d) cutoff ohmic saturation cutoff Introduction to Mechatronics Measurement Systems 9