Symbols for PN junction diodes and MN junction diodes are shown in the gures left and right below, respectively.

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Contents Diode Model Clamping Diodes Level-Shifting Diodes Ebers-Moll BJT Model Simplied NPN BJT Model IV Characteristics Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 1 / 27 Diode Model Diode Model Diodes are important elements in digital electronic circuits, as well as they are used to perform various logic operations, they are also used as variable capacitors, DC voltage level shifters and clamping diodes at logic circuit inputs. Symbols for PN junction diodes and MN junction diodes are shown in the gures left and right below, respectively. PN junction diodes are formed from the combination of P-type and N-type regions. Usually, PN junctions in integrated circuits (ICs) are usually formed by utilizing the two out of the three regions of a bipolar junction transistor, instead of a separate device structure. Turn-on voltage for a PN junction diode is V D(ON) = 0.7 V. MN junction (Schottky Barrier) diodes are formed from the combination of a metal and an N -type semiconductor. Metal used in MN junction diodes is mostly platinum silicide (Pt 5 Si 2 ). As there are no holes present, MN junction diodes are much faster than PN junction diodes. Turn-on voltage for a Schottky Barrier (MN junction) diode is V SBD(ON) = 0.3 V. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 2 / 27

Diode Model Cross sections of some example PN and MN junction diodes as shown in the gures left and right below, respectively, in order to highlight some of the fabrication properties. Diode current-voltage (IV) characteristics are normally governed by the well-known Shockley's diode equation, ) I D = I S (e VD/γ 1 where I S is the reverse saturation current (typically pa for PN junction diodes and µa for MN junction diodes) and γ = φ T = kt/q is the thermal voltage (typically γ = 26 mv at 300 K) with k representing the Boltzman constant, T representing the temperature in kelvins and q representing the elementary charge. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 3 / 27 Diode Model In the analysis of digital circuits, we are going to use the simplied diode model as shown in the gure and summarized in in the diode modes of operation table below The transition point from cuto mode to conduction mode (i.e., when the current is not yet owing) is called as edge of conduction (EOC). Diode Modes of Operation Junction Bias Reverse Forward Mode of Operation Cuto (OFF) Conducting (ON) Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 4 / 27

Diode Model The large signal diode model used in SPICE in shown in the gure below. PN Junction capacitance can be utilized in ICs by applying a negative bias to a diode. Diodes used for this purpose are referred to as varactor diodes and have the modied circuit symbol presented in the gure below. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 5 / 27 Clamping Diodes Clamping and Level-Shifting Diodes When the input to a gate is switched from high-to-low, the input voltage sometimes swings well beyond 0 V. This is called as ringing and may cause physical damage to the gate. Connecting clamping diodes to each input of a gate, as shown in the gure below, eliminates this problem by preventing inputs from falling below 0.7 V. The diodes will not aect the operation of the gate, as the diodes are open circuit for positive inputs. Clamping diodes can be also connected to the output(s) of a gate. Most TTL/STTL families employ clamping diodes at their inputs and sometimes also at their outputs. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 6 / 27

Level-Shifting Diodes It is often required to change the voltage level across particular portions of digital circuits, e.g., to level shift the output voltage. Another use of the diode forward voltage is to ensure that sub-circuits with complementary objectives are not conducting simultaneously. For example, TTL circuits employ two output drivers. Only one driver should be working for the output-low state, while only the other driver should be working for the output-high state. Placement of a voltage level-shifting device between the two drivers ensures the desired operation by allowing only one driver to be on at a time. Example 1: For the circuit below, determine the level-shifting voltage V shift. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 7 / 27 Level-Shifting Diodes BJT Transistors Bipolar junction transistors (BJTs) are very important in digital circuits, e.g., TTL circuits are based on BJTs. Figure below shows a 3D cross-section (without metallization) of an NPN BJT fabricated with the junction isolated technology. In some BJT logic families (e.g., TTL), multiple inputs are achieved by using multi-emitter BJTs as shown in the gure on the left below. A multi-emitter Schottky-clamped BJT (SBJT) is shown in the gure on the right above. The base contact is extended over the N collector region, thus placing a Schottky Barrier (MN) diode in parallel with the base-collector PN junction. This device operates much faster than a normal BJT, and an SBJT does not go into saturation mode. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 8 / 27

Level-Shifting Diodes The most frequently used notation and symbols for BJT transistors are shown in the gure below for the NPN and PNP transistors. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 9 / 27 Ebers-Moll BJT Model Ebers-Moll BJT Model ) I D,BE = I ES (e V BE /γ 1 ) I D,BC = I CS (e V BC /γ 1 I ES : base-emitter reverse saturation current, I CS : base-collector reverse saturation current, γ: thermal voltage (kt/q = 26 mv at 300 K). I E = I D,BE α R I D,BC I C = α F I D,BE I D,BC I B = I E I C α F and α R are the common base forward and reverse amplication factors. (typically α F 1 and 0.2 α R 0.6) Reciprocity theorem: I S = α F I ES = α R I CS I S is known as the transport saturation current. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 10 / 27

A BJT transistor has two PN junctions: the base-emitter PN junction (BE junction) and the base-collector PN junction (BC junction), as depicted in the gure above. As either junction can be forward or reverse biased, there are four modes of operation (or four transistor states) as shown in the table below. BE Junction Bias BC Junction Bias Mode of Operation Reverse Reverse Cuto (OFF) Forward Reverse Forward Active (FA) Reverse Forward Reverse Active (RA) Forward Forward Saturation (SAT) (Forward Saturation (FSAT) or Reverse Saturation (RSAT) in reality) Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 11 / 27 Cuto (OFF) In the cuto (OFF) mode, both PN junctions (BE and BC) of the BJT are reverse-biased. If we assume simplied diode model for the PN junctions in the Ebers-Moll model, both I D,BE and I D,BC are zero. Consequently, I E(OF F ) = 0 I C(OF F ) = 0 and I B(OF F ) = 0 Forward Active (FA) In the forward active (FA) mode, the base-emitter PN junction (BE) is forward biased and the base-collector PN junction is reverse biased. In the Ebers-Moll model, I D,BC becomes zero. Consequently, V BE(F A) = 0.7 V I C(F A) = β F I B(F A) or I C(F A) = α F I E(F A) where β F is the common-emitter current amplication factor given by α F β F = 1 α F Similarly, α F can also be expressed in terms of β F as α F = β F β F + 1 Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 12 / 27

Reverse Active (RA) In the reverse active (RA) mode, the base-emitter PN junction (BE) is reverse biased and the base-collector PN junction is forward biased. In the Ebers-Moll model, I D,BE becomes zero. Consequently, V BC(RA) = 0.7 V I C(RA) = (β R + 1) I B(RA) (I C(RA) < 0) or I E(RA) = α R I C(RA) = β R I B(RA) (I E(RA) < 0) where β R is the reverse active current amplication factor (typically 0.1 β R 2.0) given by β R = α R 1 α R Similarly, α R can also be expressed in terms of β R as α R = β R β R + 1 Note that, negative values for currents mean that currents ow in the reverse directions. In other words, negative I E and I C mean that the current is owing into the emitter and out of the collector for an NPN transistor, and into the collector and out of the emitter for a PNP transistor. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 13 / 27 Saturation (SAT) In the saturation (SAT) mode, both PN junctions (BE and BC) are forward biased. Normally, we only consider the case called forward saturation where base-emitter junction has a stronger bias (i.e., V BE V BC for NPNs). The opposite case (V BC > V BE for NPNs) is called reverse saturation and rarely occurs in digital circuits. Forward Saturation (FSAT): In this mode, base current is large and collector and emitter currents are saturated such that I C < β F I B. Note that, in this mode I C and I E are positive. I C(F SAT ) < β F I B(F SAT ) V BE(F SAT ) = 0.8 V V BC(F SAT ) = 0.6 V V CE(F SAT ) = 0.2 V A saturation parameter σ is dened to indicate the relationship between I C and I B as σ = I C β F I B where σ 1. Note that σ is not constant, it changes according to the operating point, and σ = 1 denotes forward active operation and/or edge of saturation operation. If it is not given, you may assume σ max = 1. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 14 / 27

Reverse Saturation (RSAT): In this mode, base-collector junction has a stronger bias, i.e., V BC > V BE for NPNs, and collector and emitter currents are saturated such that I E < β R I B. Note that, in this mode I C and I E are negative. I E(RSAT ) < β R I B(RSAT ) I C(RSAT ) < (β R + 1) I B(RSAT ) V CE(RSAT ) < 0 (for NPNs) In this course, we are going to refer forward saturation (FSAT) mode as the only saturation (SAT) mode, i.e., SAT = F SAT. In all operation modes (FSAT, RSAT etc.) the following must hold: 1. I C and I E always have the same sign, i.e., always in the same direction, 2. Base current is always nonnegative, i.e., I B 0, 3. KCL is satised, i.e., I E = I C + I B, 4. KVL is satised, i.e., V CE = V BE V BC. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 15 / 27 Summary Cuto (OFF) Forward active (FA) Reverse Active(RA) Saturation (SAT) Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 16 / 27

Simplied NPN BJT Model State Circuit Behaviour Test Condition Cuto (OFF) Forward Active (FA) Reverse Active (RA) Forward Saturation (FSAT) [ Saturation (SAT) ] Reverse Saturation (RSAT) I C = 0, V BE < V BE(F A), I E = 0, I B = 0 V BC < V BC(RA) V BE = V BE(F A), V BC < V BC(RA), I C = β F I B V CE > V CE(F SAT ) > 0 V BC = V BC(RA), V BE < V BE(F A), I C = (β R + 1)I B V CE < V CE(RSAT ) < 0 V CE = V CE(F SAT ), I C < β F I B, V BE = V BE(F SAT ) I C > 0, I E > 0, V BC = V BC(F SAT ) V CE > 0, I B > 0. V CE = V CE(RSAT ), I C < (β R + 1)I B, V BE = V BE(RSAT ) I C < 0, I E < 0, V BC = V BC(RSAT ) V CE < 0, I B > 0. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 17 / 27 IV Characteristics Figure above shows a set of I C versus V CE characteristics for changes in I B (of amount ). For equal increments in I B, the curves in the active regions are approximately evenly spaced, although the curves in the reverse active region are much closer than those in the forward active region. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 18 / 27

Example 2: For the circuit below, determine the state of the transistor and nd currents I B, I C and I E, given β F = 65. Example 3: each BJT. For the circuit below, determine the voltages at the base and emitter of Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 19 / 27 Example 4: negligible. For the circuit below, determine I and V B. Assume the BJT base current is Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 20 / 27

In order to provide a preview to succeeding chapters, this subsection introduces sub-circuits common to all TTL families summarized by the NAND block diagram in the gure below. Input Section For this NAND diagram, input section consists of ANDing of all inputs either with a parallel diode conguration or with a multi-emitter BJT. Drive Splitter Depending on the result of ANDing, the drive splitter turns on one of the two output sections, namely output low and output high driver sections. A typical drive splitter is a BJT acting as a switch, when it is cuto mode it activate the output-high driver and when it is in saturation mode it activates the output-low driver. Driver splitter section also provides an inversion operation. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 21 / 27 Output-High Pull-Up Driver As the output goes low-to-high, current is required to charge the equivalent input-capacitance of the load gates. Output-high pull-up driver provides the current for this charging. Some example pull-up driver sub-circuits are shown in the gure below. A simple voltage driven resistor, also known as passive pull-up, would serve the purpose as shown in the gure (a) above. An emitter-follower shown in the gure (b) above is an active solution which provides a higher output current and hence provides faster switching time for the load gates. For even more sourcing current, a Darlington pair can be used as shown in the gure (c) above. Active pull-up circuitry also provides greater fan-out. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 22 / 27

Output-Low Pull-Down Driver There are two purposes of output-low pull-down circuits: one is to discharge the capacitive load by providing a large sinking current, and another is to provide larger fan-out by sinking currents I IL from all the load gates as shown in the gure below. Some example pull-down driver sub-circuits are shown in the gure below. A simple resistor connected to a negative power supply (or ground), also known as passive pull-down, would serve the purpose as shown in the gure (a) above. A BJT, as shown in the gure (b) above, will server as an active pull-down in saturation mode. Another advantage of active pull-down or pull-up circuits is that they can be activated and/or deactivated, apart from increasing fan-out. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 23 / 27 Discharge Paths In order to turn o a saturated BJT, all of the stored charges in the base region must be removed. A path must therefore be available for base discharge. Some example discharge sub-circuits are shown in the gure below. Figure (a) above displays a circuit with an additional resistor R D that provides passive charge removal. Figure (b) above shows an active conguration for stored charge removal, which provides a much faster discharge (i.e., higher discharge current) than R D itself. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 24 / 27

Base Driving Circuitry On the other hand, the turn-on time of a BJT is dependent on the time required to charge the base of the BJT. Active base driving current is often supplied to BJTs to ensure a shorter turn-on time. An emitter-follower BJT conguration, as shown in the gure below where Q S drives base driving current to Q O, usually supplies this driving current. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 25 / 27 Power Dissipation of BJT Logic Circuits When BJT logic circuits have a single power supply, as shown in the gure above, the power dissipation for a particular gate in a particular state is taken as the power supplied given by P CC = I CC V CC where I CC is the current drawn from V CC and is obtained by summing all the currents leaving the supply voltage source. For example, for the gure above, the current supplied by V CC is I CC = I RB + I RC + I RCP. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 26 / 27

Consequently, the average power dissipated in a logic circuit with two output states (output-low and output-high) is dened as P CC(avg) = I CC(OL) + I CC(OH) 2 V CC Example 5: For the circuit below, calculate the average power dissipation for this gate, if I RB(OH) = 1.55 ma, I RC(OH) = 24.7 µa, I RCP (OH) = 1.21 ma, I RB(OL) = 1.14 ma, I RC(OL) = 4.48 ma and I RCP (OL) = 104 µa. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE315 Electronics II 23-Nov-2017 27 / 27