E Series Power MOSFET SiHP33N6E PRODUCT SUMMARY (V) at T J max. 65 R DS(on) max. () at 25 C V GS = V.99 Q g max. (nc) 5 Q gs (nc) 24 Q gd (nc) 42 Configuration Single D TO22AB G G DS S NChannel MOSFET ORDERING INFORMATION Package Lead (Pb)free Lead (Pb)free and Halogenfree FEATURES Low figureofmerit (FOM): R on x Q g Low input capacitance (C iss ) Reduced switching and conduction losses Ultra low gate charge (Q g ) Available Avalanche energy rated (UIS) Material categorization: for definitions of compliance please see www.vishay.com/doc?9992 APPLICATIONS Server and telecom power supplies Switch mode power supplies (SMPS) Power factor correction power supplies (PFC) Lighting Highintensity discharge (HID) Fluorescent ballast lighting Industrial Welding Induction heating Motor drives Battery chargers Renewable energy Solar (PV inverters) TO22AB SiHP33N6EE3 SiHP33N6EGE3 ABSOLUTE MAXIMUM RATINGS (T C = 25 C, unless otherwise noted) PARAMETER SYMBOL LIMIT UNIT DrainSource Voltage 6 GateSource Voltage V GS ± 3 V Continuous Drain Current (T J = 5 C) V GS at V T C = 25 C 33 I D T C = C 2 A Pulsed Drain Current a I DM 88 Linear Derating Factor 2.2 W/ C Single Pulse Avalanche Energy b E AS 793 mj Maximum Power Dissipation P D 278 W Operating Junction and Storage Temperature Range T J, T stg 55 to 5 C DrainSource Voltage Slope = V to 8 % 7 dv/dt Reverse Diode dv/dt d 2 V/ns Soldering Recommendations (Peak temperature) c for s 3 C Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. V DD = 5 V, starting T J = 25 C, L = 28.2 mh, R g = 25, I AS = 7.5 A. c..6 mm from case. d. I SD I D, di/dt = A/μs, starting T J = 25 C. S6799Rev. F, 2May6 Document Number: 9523
SiHP33N6E THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. UNIT Maximum JunctiontoAmbient R thja 62 Maximum JunctiontoCase (Drain) R thjc.45 C/W SPECIFICATIONS (T J = 25 C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static DrainSource Breakdown Voltage V GS = V, I D = 25 μa 6 V Temperature Coefficient /T J Reference to 25 C, I D = ma.7 V/ C GateSource Threshold Voltage (N) V GS(th) = V GS, I D = 25 μa 2. 4. V GateSource Leakage I GSS V GS = ± 2 V ± na V GS = ± 3 V ± μa = 6 V, V GS = V Zero Gate Voltage Drain Current I DSS = 48 V, V GS = V, T J = 25 C μa DrainSource OnState Resistance R DS(on) V GS = V I D = 6.5 A.83.99 Forward Transconductance a g fs = 3 V, I D = 6.5 A S Dynamic Input Capacitance C iss V GS = V, 358 Output Capacitance C oss = V, 56 Reverse Transfer Capacitance C rss f = MHz 6 Effective Output Capacitance, Energy pf Related b C o(er) 36 V GS = V, = V to 48 V Effective Output Capacitance, Time Related c C o(tr) 468 Total Gate Charge Q g 5 GateSource Charge Q gs V GS = V I D = 6.5 A, = 48 V 24 nc GateDrain Charge Q gd 42 TurnOn Delay Time t d(on) 28 56 Rise Time t r V DD = 48 V, I D = 6.5 A 6 9 TurnOff Delay Time t d(off) R g = 9., V GS = V 99 5 ns Fall Time t f 54 8 Gate Input Resistance R g f = MHz, open drain.2.7. DrainSource Body Diode Characteristics MOSFET symbol D Continuous SourceDrain Diode Current I S 33 showing the G integral reverse Pulsed Diode Forward Current I SM S 88 p n junction diode A Diode Forward Voltage V SD T J = 25 C, I S = 6.5 A, V GS = V.9.2 V Reverse Recovery Time t rr 53 6 ns Reverse Recovery Charge Q rr T J = 25 C, I F = I S, di/dt = A/μs, V R = 2 V 8.5 7 μc Reverse Recovery Current I RRM 26 A Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. C oss(er) is a fixed capacitance that gives the same energy as C oss while is rising from % to 8 % S. c. C oss(tr) is a fixed capacitance that gives the charging time as C oss while is rising from % to 8 % S. S6799Rev. F, 2May6 2 Document Number: 9523
SiHP33N6E TYPICAL CHARACTERISTICS (25 C, unless otherwise noted) I D Drain Current (A) 2 8 6 4 TOP 5 V 4 V 3 V 2 V V V 9. V 8. V 7. V BOTTOM 6. V T J = 25 C R DS(on) OnResistance (Normalized) 3. 2.5 2..5. I D = 6.5 A 2 5. V 5 5 2 25 3 DraintoSource Voltage (V) Fig. Typical Output Characteristics.5 V GS = V. 6 4 2 2 4 6 8 2 4 6 T J Junction Temperature ( C) Fig. 4 Normalized OnResistance vs. Temperature I D Drain Current (A) 7 6 5 4 3 2 TOP 5 V 4 V 3 V 2 V V V 9. V 8. V 7. V BOTTOM 6. V T J = 5 C 5. V 5 5 2 25 3 DraintoSource Voltage (V) Fig. 2 Typical Output Characteristics C Capacitance (pf) C iss C rss V GS = V, f = MHz C iss = C gs C gd x C ds shorted C rss = C gd C oss = C ds C gd 2 3 4 5 6 DraintoSource Voltage (V) C oss Fig. 5 Typical Capacitance vs. DraintoSource Voltage 2 25 I D, DraintoSource Current (A) 8 6 4 2 T J = 5 C T J = 25 C 5 5 2 25 V GS, GatetoSource Voltage (V) Fig. 3 Typical Transfer Characteristics C oss (pf) 5 2 5 C oss E oss 5 5 5 2 3 4 5 6 Fig. 6 C OSS and E OSS vs. E oss (μj) S6799Rev. F, 2May6 3 Document Number: 9523
SiHP33N6E 24 35 V GS GatetoSource Voltage (V) 2 6 2 8 4 = 2 V = 3 V = 48 V I D, Drain Current (A) 3 25 2 5 5 4 8 2 6 2 Q g Total Gate Charge (nc) Fig. 7 Typical Gate Charge vs. GatetoSource Voltage 25 5 75 25 5 T C Temperature( C) Fig. Maximum Drain Current vs. Case Temperature 75 I S Source Current (A) T J = 5 C T J = 25 C. V GS = V...2.4.6.8..2.4.6 V SD SourcetoDrain Voltage (V) Fig. 8 Typical SourceDrain Diode Forward Voltage, Drain to Source Breakdown Voltage (V) 725 7 675 65 625 6 575 6 4 2 2 4 6 8 2 4 6 T J,Temperature ( C) Fig. Typical DraintoSource Voltage vs. Temperature Operation in this area limited by R DS(on) * I DM Limited I D, Drain Current (A) Limited by R D (on) * T C = 25 C ms T J = 5 C Single Pulse. BVDSS Limited DraintoSource Voltage (V) * V GS > minimum V GS at which R DS(on) is specified Fig. 9 Maximum Safe Operating Area µs ms S6799Rev. F, 2May6 4 Document Number: 9523
SiHP33N6E Normalized Effective Transient Thermal Impedance. Duty Cycle =.5.2..5.2 Single Pulse..... Square Wave Pulse Duration (s) Fig. 2 Normalized Thermal Transient Impedance, JunctiontoCase R D t p V GS D.U.T. V DD R G V DD V Pulse width µs Duty factor. % I AS Fig. 3 Switching Time Test Circuit Fig. 6 Unclamped Inductive Waveforms 9 % V Q G Q GS Q GD % V GS t d(on) t r t d(off) t f V G Fig. 4 Switching Time Waveforms Charge Fig. 7 Basic Gate Charge Waveform L Current regulator Same type as D.U.T. Vary t p to obtain required I AS R G I AS D.U.T V DD 2 V.2 µf 5 kω.3 µf D.U.T. V DS V t p. Ω V GS 3 ma Fig. 5 Unclamped Inductive Test Circuit Fig. 8 Gate Charge Test Circuit I G I D Current sampling resistors S6799Rev. F, 2May6 5 Document Number: 9523
SiHP33N6E Peak Diode Recovery dv/dt Test Circuit D.U.T. Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer R g dv/dt controlled by R g Driver same type as D.U.T. I SD controlled by duty factor D D.U.T. device under test V DD Driver gate drive P.W. Period D = P.W. Period V GS = V a D.U.T. l SD waveform Reverse recovery current Body diode forward current di/dt D.U.T. waveform Diode recovery dv/dt V DD Reapplied voltage Inductor current Body diode forward drop Ripple 5 % I SD Note a. V GS = 5 V for logic level devices Fig. 9 For NChannel maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?9523. S6799Rev. F, 2May6 6 Document Number: 9523
Package Information TO22 D L H() Q L() E 2 3 M * b() Ø P A F DIM. MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 4.24 4.65.67.83 b.69.2.27.4 b().4.78.45.7 c.36.6.4.24 D 4.33 5.85.564.624 E 9.96.52.392.44 e 2.4 2.67.95.5 e() 4.88 5.28.92.28 F.4.4.45.55 H() 6. 6.7.24.264 J() 2.4 2.92.95.5 L 3.36 4.4.526.567 L() 3.33 4.4.3.59 Ø P 3.53 3.94.39.55 Q 2.54 3...8 ECN: X5364Rev. C, 4Dec5 DWG: 63 Note M* =.52 inches to.64 inches (dimension including protrusion), heatsink hole for HVM e b C e() J() ASE Package Picture Xi an Revison: 4Dec5 Document Number: 66542
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