Lecture 0: Accelerometers (Part I) ADXL 50 (Formerly the original ADXL 50) ENE 5400, Spring 2004 Outline Performance analysis Capacitive sensing Circuit architectures Circuit techniques for non-ideality cancellation Feedback linearization Sigma-delta modulation Accelerometer Examples CMOS-integrated polysilicon-micromachined accelerometer (Fedder, UC Berkeley) CMOS-micromachined chopper-stabilized capacitive accelerometer (Wu, Carnegie Mellon) ENE 5400, Spring 2004 2
Why Do Analog Devices Do This? Over 40,000,000 car produced worldwide annually The old technology was bulky and expensive (~$00 /car) MEMS accelerometers more reliable, smaller, and less expensive (~$5 /car) ENE 5400, Spring 2004 3 Accelerometer Specifications Accelerometer parameters Sensitivity Transducer sensitivity Bias (offset) Temperature drift of sensitivity Temperature drift of bias offset Noise Cross-axis sensitivity Acceleration limit Bandwidth Shock resistance Supply voltage Units V/g V/g/V mg % / K µg / K µg / Hz /2 % g Hz g V ENE 5400, Spring 2004 4 2
Accelerometer Mechanical sensing element Static: Dynamic: x = m k total a in a = ω substrate in 2 n a in mx&& ( t) + b x& ( t) + k x( t) ma ( t) total total = in ENE 5400, Spring 2004 5 Capacitive Accelerometer Induced displacement is often capacitively sensed using comb fingers (yet the motion in the parallel-plate fashion) How to do interconnects (fabrication issue) affects the sensing circuit architecture MASS ENE 5400, Spring 2004 6 3
Accelerometer Frequency Response Operating frequency is much lower than ω n The quality factor will affect Brownian Noise Transient response (Ringing) X ( s) = ain( s) s 2 ωn + s + ω Q 2 n ENE 5400, Spring 2004 7 Brownian Noise Brownian noise force and noise acceleration F ( f ) = n 4k Tb 4kbTω n an( f ) = mq b ENE 5400, Spring 2004 8 4
Sensing Range vs. Noise Floor Large-ω n accelerometers can have large sensing range, yet with higher Brownian noise floor x m k total a = ω = a Case : x = 20 nm @ 24.7 khz and 50g in Case 2: x =.2 µm @ khz and 50g in 2 n a ( f ) = n 4kbTω n mq ENE 5400, Spring 2004 9 Spring Design Folded-beam spring design Should ensure large spring constant in the nonsensing axis x (sensing) y z ENE 5400, Spring 2004 0 5
Capacitive Sensing ENE 5400, Spring 2004 Capacitive Sensing Standard steps: Modulation Amplification Demodulation Low-pass filtering Circuit architectures: Continuous-time voltage sensing Continuous-time current sensing Switched-capacitor circuit» Demodulation not needed V m, frequency f m -V m ENE 5400, Spring 2004 2 C demodulator sp C sn Pre-amplifier Low-Pass Filter Carrier, frequency f m 6
Simulation V m, frequency f m a in a in C sp V mod C sn LPF -V m f m + s / ω p V o V mod LPF removes the 2x carrier-frequency signal; induced phase lag depends on the pole of the LPF ENE 5400, Spring 2004 3 V o t (s) Modulation Required because capacitance can t be sensed at DC At the same time can avoid the /f noise at the low frequencies How is the modulation frequency related to the circuit and the fabrication technology? Z = / (2πfC); ~6 MΩ for f = 00 khz and C = 00 ff. Therefore the sensing circuit must have comparably high input impedance to avoid substantial signal attenuation» CMOS is a good candidate than bipolar junction transistors (BJT); however its /f noise is worse than BJT ENE 5400, Spring 2004 4 7
Example: Analog Multiplier (the Gilbert Cell) R L R L Can perform modulation and demodulation Think about sinω t*sinω 2 t Can provide a gain larger than one V is the carrier, and V 2 is the modulated signal from sensor Think of that Q3, Q4, Q5, and Q6 as switches that alternatively turn on to pass bias current (e.g. when Q3 and Q6 are on, then Q4 and Q5 are off, and vice versa) _ V out + ENE 5400, Spring 2004 5 Reference: Gray and Meyer, Analysis and design of analog integrated circuits Cont d R L Vout R L R L Vout R L i c3 i c6 i c4 i c5 Q Q2 Q Q2 V 2 V 2 I EE I EE st ½ cycle: Q3 and Q6 on ENE 5400, Spring 2004 6 2nd ½ cycle: Q4 and Q5 on 8
Capacitive Position Sensing x C sp C sn V mp x o V sense -V mn For small-displacement parallel-plate capacitors (x << x o ) : 2Cs x Vsense = Vm C 2C + C x s = ε oa/ x s p 0 o ENE 5400, Spring 2004 7 Fully-Differential Capacitive Sensing Doubled sensitivity than differential sensing Improves the interference rejection with higher common-mode rejection ratio (CMRR) and power supply rejection ratio (PSRR) V sense = V sensep V sensen 4Cs = 2C + C ENE 5400, Spring 2004 8 s p x x o V m Routing shown is on a CMOS-MEMS accelerometer 9
Sensitivity What would you do to increase sensitivity? Can the amplitude of the modulation voltage be arbitrary large? V a sense in = 4Cs 2C + C s p V x m o ω 2 n ENE 5400, Spring 2004 9 Spring-Softening Effect Reduces resonant frequency and possible destabilization if the electrical spring k e completely negates the mechanical spring constant V m (stator) C sp C sn V s (rotor) -V m (stator) ENE 5400, Spring 2004 20 0
Performance Comparison A better design achieves lower noise floor at the same capacitive sensitivity 0000 [Zhang,99] Si bulk [Luo,00] [Lu,95] 000 Poly thin-film CMOS MEMS [ADXL05] 00 [Lemkin,97] Noise Floor (ug/rthz) 0 This [Wu, work 2002] [Bernstein,99] [Yazdi,99] [Smith,94] 0. 0. 0 00 000 0000 00000 ENE 5400, Spring 2004 2 Capacitance Sensitivity (ff/g) Capacitive Sensing Circuits ENE 5400, Spring 2004 22
Continuous-Time Voltage Sensing Use ac modulation voltage; general topologies include: Capacitive feedback» An a.c. virtual ground is provided so it is parasiticinsensitive Open-loop» Not parasitic-insensitive V m C f V m C sp _ C sp C sn + R b C sn R b -V m ENE 5400, Spring 2004 23 -V m Continuous-Time Voltage Sensing In CMOS, the requires dc bias at the high-impedance sensing node can be realized by: A large resistor (large occupied area) A reversed-biased diode (leakage would shift the dc bias) A MOS transistor operated in the sub-threshold region A turned-off MOS switch A reset MOS transistor ENE 5400, Spring 2004 24 2
Continuous-Time Current Sensing Processes the a.c. current Provides a virtual ground and robust d.c. biasing Essentially uses a differentiator which has high-pass frequency response noise amplification Not an attractive choice V m R f C sp _ C sn + -V m ENE 5400, Spring 2004 25 Switch-Capacitor Sensing Circuits It is a natural approach to transfer the accumulated charge on a sensing capacitor to a sensed voltage output DO NOT need ac modulation voltage; the continuous switching action would set the dc bias at the high-impedance capacitive node The switching action also produces a pulsed output, which after a holding and a LPF circuits, becomes the smoothed baseband sensed signal No demodulation required Operate as discrete-time signal processors; analyzed by the z- transform technique ENE 5400, Spring 2004 26 3
Equivalent Resistor using a Switched Capacitor Compare the transferred charges within T: V φ φ 2 V 2 R Q = (V V 2 ) T/R Q = C(V V 2 ) R = T C ENE 5400, Spring 2004 27 V S S 2 S and S 2 close and open on alternate phases: ( cycle = T) () φ on: C charges to V. Q = CV (2) φ 2 on: C discharges to V 2. Q = C(V V 2 ) (3)Next φ on Example: 6 MΩ resistor simulated with pf capacitor, T = 60 µs; easily achieved with modern CMOS C V 2 Discretization Issues Current in SC circuit flows in pulses The lower the clock period, the better approximation to the true, continuous current profile i(t) v(t)/r T 2 T 3 T t ENE 5400, Spring 2004 28 4
Timing Issue The two clock phases should not overlap during on and off T φ Non-overlap φ 2 φ φ 2 V S S 2 V 2 C ENE 5400, Spring 2004 29 A Simple SC Integrator Replace R with a switched capacitor: V i φ φ 2 S S 2 C _ + C 2 V o If parasitic capacitances are not considered, the discrete-time transfer function is: (notice there is a half-cycle delay, see why?) H C z ( z) = C2 z delay ENE 5400, Spring 2004 30 5
A Simple SC Integrator However that integrator is parasitic-sensitive C p3 φ φ 2 C 2 Cp4 V i S S 2 _ C p C + V o C p2 metal poly C C p poly2c p2 H C + C p ( z) = ( ) C2 z z silicon ENE 5400, Spring 2004 3 Parasitic-Insensitive SC Integrator Parasitic capacitances at C are made insensitive because they are all discharged to ground after the φ 2 clock No delay in the integrator; V i directly charges C and through C 2 to change V o C H( z) = C z 2 V i φ φ C C 2 _ φ 2 φ 2 + V o ENE 5400, Spring 2004 32 6
Switched-Capacitor Sensing Circuit φ φ φ 2 V s φ C (x) _ C 2 φ 2 + Vo φ on, charge C ; Q = C V s φ 2 on, Q is transferred to C 2 until the virtual ground is reached C Vo = V s (actual gain depends on the duty cycle) C2 Provide robust DC biasing without having to use specific bias scheme ENE 5400, Spring 2004 33 Cont d: V o with a Sinusoidal Change on C (x) After holding and LPF V o (t) Pulsed output t ENE 5400, Spring 2004 34 7
Non-ideality Cancellation ENE 5400, Spring 2004 35 Circuit and Sensor Offsets The CMOS circuits have offset on the order of - 0 mv (@ d.c.) Worse for minimum-length devices in differential amplifiers Saturation can easily occur if a signal amplification of 00 to 000 is required Mismatch of sensing capacitances (a position offset) results in a signal at the modulation frequency, and thus a dc offset after demodulation circuit offset sensor offset circuit noise sensed signal (weak) 0 f m ENE 5400, Spring 2004 36 Brownian noise f (Hz) 8
Circuit Offset Methods of d.c. offset cancellation ac-coupling capacitance dc feedback Chopper stabilization (CHS) Correlated Double Sampling (CDS) /f noise can be reduced by CHS and CDS V in V o a.c. coupling ENE 5400, Spring 2004 37 DC Feedback for Offset Cancellation Uses a low-pass filter in the feedback loop to realize a high-pass frequency response A offset reduction of ( + A 2 ); V o = A V off /(+A 2 ) V off A + _ V o F(s) A 2 + s / ω p ENE 5400, Spring 2004 38 9
Cont d V off A V + _ E V o F(s) A 2 + s / ω p ENE 5400, Spring 2004 39 Chopper Stabilization Introduced about 50 years ago to realizing high precision d.c. gains with ac-coupled amplifiers Chopper originates from the use of mechanical choppers; now can be integrated on-chip by electronic switches A modulation technique to reduce d.c. offset and /f noise Key: the signal is modulated, amplified, and demodulated back to the base band, while the offset and noise is only modulated once to high frequencies V in + A v V out V carrier ENE 5400, Spring 2004 40 V noise + V offset V carrier 20
Example of a Fully Differential CHS Capacitive Readout Circuit (low-pass filtering) V refp and V refn are stable d.c. voltage sources; the alternating switching actions (choppers) are similar to using two modulating ac voltage sources with opposite phases (why doing this?) Demodulation is realized by alternating switching actions ENE 5400, Spring 2004 4 Correlated Double Sampling Reduces circuit offset and /f noise; usually applied in the SC circuits Requires two phases (φ, φ 2 ) in a sampling period to sample and subtract the offset V in φ φ 2 C C 2 A _ + + _ Voff φ φ φ 2 V out φ φ 2 T T T T 2T 2T 3T 3T ENE 5400, Spring 2004 42 2
Correlated Double Sampling φ is on: V A = T q( nt ) = 2 T q2( nt ) = 2 V in + C 2 C + A _ + _ + V off V out φ 2 is on: V A = q ( nt ) = q ( nt ) = 2 C 2 C + + _ A _ + _ + V off _ V out ENE 5400, Spring 2004 43 Correlated Double Sampling Charge conservation at node A: The output is delayed by T / 2 without the offset voltage ENE 5400, Spring 2004 44 22