IRFM120 N-CHNNEL Electrical Characteristics (T =25% unless otherwise specified) Characteristic Min. Typ. Max. Units Test Condition BS Drain-Source Bre

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Transcription:

dvanced Power MOSFET FETURES IEEE802.3af Compatible! valanche Rugged Technology! Rugged Gate Oxide Technology! Lower Input Capacitance! Improved Gate Charge! Extended Safe Operating rea! Lower Leakage Current : 10 # (Max.) @ =! Lower R DS(ON) : 0.155! (Typ.) IRFM120 BS = R DS(on) = 0.2! I D = 2.3 SOT-223 2 1 3 bsolute Maximum Ratings 1. Gate 2. Drain 3. Source Characteristic alue Units S Drain-to-Source oltage I D Continuous Drain Current (T =25%) 2.3 Continuous Drain Current (T =70%) 1.84 I DM E S I R E R dv/dt Drain Current-Pulsed Gate-to-Source oltage Single Pulsed valanche Energy valanche Current Repetitive valanche Energy Peak Diode Recovery dv/dt ' ( 18 "20 123 2.3 0.24 6.5 mj mj /ns P D Total Power Dissipation (T =25%) * 2.4 W Linear Derating Factor * 0.019 W/% T J, T STG Operating Junction and Storage Temperature Range - 55 to +150 T L Maximum Lead Temp. for Soldering Purposes, 1/8 from case for 5-seconds 300 % Thermal Resistance R $J Characteristic Typ. Max. Units Junction-to-mbient * 52 %/W * When mounted on the minimum pad size recommended (PCB Mount). 2002 Semiconductor Components Industries, LLC December-2017, Rev 3 Publication Order Number: IRFM120/D

IRFM120 N-CHNNEL Electrical Characteristics (T =25% unless otherwise specified) Characteristic Min. Typ. Max. Units Test Condition BS Drain-Source Breakdown oltage =0,I D =250#.B/.T J Breakdown oltage Temp. Coeff. 0.12 /% I D =250# See Fig 7 (th) Gate Threshold oltage 2.0 4.0 =5,I D =250# I GSS Gate-Source Leakage, Forward Gate-Source Leakage, Reverse - n =20 =-20 I DSS Drain-to-Source Leakage Current 1 10 # =30 - = =80,T =125% R DS(on) Static Drain-Source On-State Resistance 0.2 ) =10,I D =1.15 + g fs Forward Transconductance 3.12 S =40,I D =1.15 + C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance 370 95 38 480 110 45 pf =0, =25,f =1MHz See Fig 5 t d(on) t r t d(off) t f Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time 14 14 36 28 40 40 90 70 ns =50,I D =9.2, R G =18) See Fig 13 +, Q g Total Gate Charge 16 22 =80, =10, Q gs Gate-Source Charge 2.7 nc I D =9.2 Q gd Gate-Drain( Miller ) Charge 7.8 See Fig 6 Fig 12 +, Source-Drain Diode Ratings and Characteristics Characteristic Min. Typ. Max. Units Test Condition I S I SM Continuous Source Current Pulsed-Source Current 2.3 18 Integral reverse pn-diode in the MOSFET SD Diode Forward oltage + 1.5 T J =25%,I S =2.3, =0 t rr Reverse Recovery Time 98 ns T J =25%,I F =9.2 Q rr Reverse Recovery Charge 0.34 #C di F /dt=/#s + Notes ; Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature ' L=35mH, I S =2.3, =25, R G =27), Starting T J =25% ( I SD *9.2, di/dt*300/#s, *BS, Starting T J =25% + Pulse Test : Pulse Width = 250#s, Duty Cycle * 2%, Essentially Independent of Operating Temperature - djusted for Cisco 2

N-CHNNEL IRFM120 Fig 1. Output Characteristics Fig 2. Transfer Characteristics Top : 15 10 8.0 7.0 6.0 5.5 5.0 Bottom : 4.5 1. 250 "s Pulse Test 2. T = 25 o C, Drain-Source oltage [] 25 o C 150 o C - 55 o C 1. = 0 2. = 40 3. 250 "s Pulse Test 2 4 6 8 10, Gate-Source oltage [] 0.4 Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward oltage R DS(on), [ #] Drain-Source On-Resistance 0.3 0.2 0.1 = 10 = 20 @ Note : T J = 25 o C 0.0 0 10 20 30 40 I DR, Reverse Drain Current [] 150 o C 25 o C 1. = 0 2. 250 "s Pulse Test 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 SD, Source-Drain oltage [] Capacitance [pf] Fig 5. Capacitance vs. Drain-Source oltage 600 C iss = C gs + C gd ( C ds = shorted ) C C oss = C ds + C gd iss C rss = C gd 400 200 C oss C rss 0, Drain-Source oltage [] 1. = 0 2. f = 1 MHz, Gate-Source oltage [] 10 5 Fig 6. Gate Charge vs. Gate-Source oltage = 20 = 50 = 80 I D = 9.2 0 0 5 5 20 Q G, Total Gate Charge [nc] 3

IRFM120 N-CHNNEL 1.2 Fig 7. Breakdown oltage vs. Temperature 3.0 Fig 8. On-Resistance vs. Temperature BS, (Normalized) Drain-Source Breakdown oltage 1.1 1.0 0.9 1. = 0 2. I D = 250 " R DS(on), (Normalized) Drain-Source On-Resistance 2.5 2.0 1.5 1.0 0.5 1. = 10 2. I D = 4.6 0.8-75 -50-25 0 25 50 75 125 150 175 T J, Junction Temperature [ o C] 0.0-75 -50-25 0 25 50 75 125 150 175 T J, Junction Temperature [ o C] 10 2 Fig 9. Max. Safe Operating rea Operation in This rea is Limited by R DS(on) 1. T = 25 o C "s 1 ms 10 ms ms 2. T J = 150 o C 3. Single Pulse 10-2 10 2, Drain-Source oltage [] DC 10 "s Fig 10. Max. Drain Current vs. mbient Temperature 2.5 2.0 1.5 1.0 0.5 0.0 25 50 75 125 150 T, mbient Temperature [ o C] Z!J (t), Thermal Response 10 2 D=0.5 0.2 0.1 0.05 0.02 0.01 single pulse Fig 11. Thermal Response 1. Z!J (t)=52 o C/W Max. 2. Duty Factor, D=t 1 /t 2 3. T JM -T =P DM *Z!J (t) 10-5 10-4 10-3 10-2 10 2 10 3 t 1, Square Wave Pulse Duration [sec] P DM t 1 t 2 4

N-CHNNEL IRFM120 Fig 12. Gate Charge Test Circuit Waveform 12 * Current Regulator 50K! 200nF 300nF Same Type as 10 Q g Q gs Q gd 3m Current Sampling (I G ) Resistor R 1 R 2 Current Sampling (I D ) Resistor Charge Fig 13. Resistive Switching Test Circuit Waveforms R L in out ( 0.5 rated ) out 90% R G 10 in 10% t d(on) t r t d(off) tf t on t off Fig 14. Unclamped Inductive Switching Test Circuit Waveforms L L 1 E S = L L I 2 2 S BS BS ary t p to obtain required peak I D ID BS I S R G C I D (t) 10 (t) t p t p Time 5

IRFM120 N-CHNNEL Fig 15. Peak Diode Recovery dv/dt Test Circuit Waveforms + I S L Driver RG Same Type as dv/dt controlled by / G I S controlled by Duty Factor 0? ( Driver ) Gate Pulse Width D = Gate Pulse Period 10 I S ( ) I FM, Body Diode Forward Current di/dt I RM ( ) Body Diode Reverse Current Body Diode Recovery dv/dt f Body Diode Forward oltage Drop 6

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