IRF36SPbF Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits Benefits l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dv/dt and di/dt Capability l Lead-Free G D S V DSS D HEXFET Power MOSFET R DS(on) typ. max. I D G S V 9.3mΩ.6mΩ 3A D 2 Pak IRF36SPbF G D S Gate Drain Source Absolute Maximum Ratings Symbol Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V 3 I D @ T C = C I DM Continuous Drain Current, V GS @ V Pulsed Drain Current d 73 4 A P D @T C = 25 C Maximum Power Dissipation 333 W Linear Derating Factor 2.2 W/ C V GS Gate-to-Source Voltage ± 20 V dv/dt Peak Diode Recovery f 23 V/ns T J Operating Junction and -55 to 75 T STG Storage Temperature Range Soldering Temperature, for seconds 300 (.6mm from case) C Avalanche Characteristics E AS Single Pulse Avalanche Energy (Thermally Limited) d 460 mj I AR Avalanche Currentc See Fig. 4, 5, 22a, 22b A E AR Repetitive Avalanche Energy c mj Thermal Resistance Symbol Parameter Typ. Max. Units R θjc Junction-to-Case jk 0.50 C/W R θja Junction-to-Ambient (PCB Mount) i 40
IRF36SPbF Static @ (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units V (BR)DSS Drain-to-Source Breakdown Voltage V V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 0. V/ C R DS(on) Static Drain-to-Source On-Resistance 9.3.6 mω V GS(th) Gate Threshold Voltage 2.0 4.0 V gfs Forward Transconductance S R G Internal Gate Resistance 2.2 Ω I DSS Drain-to-Source Leakage Current 20 µa 250 I GSS Gate-to-Source Forward Leakage 200 na Gate-to-Source Reverse Leakage -200 Dynamic @ (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Q g Total Gate Charge 50 nc Q gs Gate-to-Source Charge 23 Q gd Gate-to-Drain ("Miller") Charge 42 Q sync Total Gate Charge Sync. (Q g - Q gd ) 58 t d(on) Turn-On Delay Time 5 ns t r Rise Time 55 t d(off) Turn-Off Delay Time 77 t f Fall Time 43 C iss Input Capacitance 5380 pf C oss Output Capacitance 690 C rss Reverse Transfer Capacitance C oss eff. (ER) Effective Output Capacitance (Energy Related) 560 C oss eff. (TR) Effective Output Capacitance (Time Related) 750 Diode Characteristics Symbol Parameter Min. Typ. Max. Units I S Continuous Source Current 3 A Conditions V GS = 0V, I D = 250µA Reference to 25 C, I D =.0mAc V GS = V, I D = 62A f V DS = V GS, I D = 250µA V DS = 25V, I D = 62A V DS = V, V GS = 0V V DS = V, V GS = 0V, T J = 25 C V GS = 20V V GS = -20V I D = 62A V DS =50V V GS = V f I D = 62A, V DS =0V, V GS = V V DD = 65V I D = 62A R G = 2.7Ω Conditions V GS = V f V GS = 0V V DS = 25V ƒ =.0 MHz, See Fig. 5 V GS = 0V, V DS = 0V to 80V h, See Fig. V GS = 0V, V DS = 0V to 80V g Conditions MOSFET symbol (Body Diode) showing the I SM Pulsed Source Current 4 A integral reverse G (Body Diode)Ãd p-n junction diode. V SD Diode Forward Voltage.3 V, I S = 62A, V GS = 0V f t rr Reverse Recovery Time ns V R = 85V, 20 T J = 25 C I F = 62A Q rr Reverse Recovery Charge 570 nc di/dt = A/µs f 7 T J = 25 C I RRM Reverse Recovery Current -9.5 A t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LSLD) D S Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by T Jmax, starting, L = 0.24mH R G = 50Ω, I AS = 62A, V GS =V. Part not recommended for use above this value. ƒ I SD 62A, di/dt 935A/µs, V DD V (BR)DSS, T J 75 C. Pulse width 400µs; duty cycle 2%. C oss eff. (TR) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. C oss eff. (ER) is a fixed capacitance that gives the same energy as C oss while V DS is rising from 0 to 80% V DSS. When mounted on " square PCB (FR-4 or G- Material). For recommended footprint and soldering techniques refer to application note #AN-994. ˆ R θ is measured at T J approximately 90 C. R θjc value shown is at time zero. 2
C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRF36SPbF 0 VGS TOP 5V V 6.0V 5.0V 4.7V 4.5V 4.2V BOTTOM 4.0V 0 VGS TOP 5V V 6.0V 5.0V 4.7V 4.5V 4.2V BOTTOM 4.0V 4.0V 60µs PULSE WIDTH Tj = 25 C 0. 0. 0 V DS, Drain-to-Source Voltage (V) 4.0V 60µs PULSE WIDTH Tj = 75 C 0. V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics 0 T J = 75 C 3.0 2.5 I D = 62A V GS = V 2.0.5 V DS = 50V 60µs PULSE WIDTH 0. 2 3 4 5 6 7 8 9 V GS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics.0 0.5-60 -40-20 0 20 40 60 80 20406080 T J, Junction Temperature ( C) Fig 4. Normalized On-Resistance vs. Temperature 000 00 V GS = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd C iss 4.0 2.0.0 I D = 62A V DS = 80V V DS = 50V V DS = 20V 0 C oss 8.0 6.0 C rss 4.0 2.0 V DS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 0.0 0 20 40 60 80 20 40 Q G, Total Gate Charge (nc) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3
Energy (µj) E AS, Single Pulse Avalanche Energy (mj) V (BR)DSS, I D, Drain Current (A) Drain-to-Source Breakdown Voltage (V) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) IRF36SPbF 0 00 OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 75 C 0 µs V GS = 0V.0 0.0 0.5.0.5 2.0 V SD, Source-to-Drain Voltage (V) 20 Fig 7. Typical Source-Drain Diode Forward Voltage 25 20 Fig 8. Maximum Safe Operating Area I D =.0mA ms Tc = 25 C 3ms Tj = 75 C ms Single Pulse DC 0. 0 V DS, Drain-toSource Voltage (V) 80 5 60 40 5 20 0 25 50 75 25 50 75 T C, Case Temperature ( C) 3.5 3.0 2.5 2.0 Fig 9. Maximum Drain Current vs. Case Temperature 95-60 -40-20 0 20 40 60 80 20406080 2000 600 200 T J, Temperature ( C ) Fig. Drain-to-Source Breakdown Voltage I D TOP 3A 27A BOTTOM 62A.5.0 0.5 800 400 0.0 0 0 20 40 60 80 20 25 50 75 25 50 75 V DS, Drain-to-Source Voltage (V) Starting T J, Junction Temperature ( C) Fig. Typical C OSS Stored Energy Fig 2. Maximum Avalanche Energy vs. DrainCurrent 4
E AR, Avalanche Energy (mj) Avalanche Current (A) IRF36SPbF Thermal Response ( Z thjc ) C/W D = 0.50 0. 0.0 0.20 0. 0.05 0.02 0.0 0.00 SINGLE PULSE ( THERMAL RESPONSE ) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc Tc 0.000 E-006 E-005 0.000 0.00 0.0 0. t, Rectangular Pulse Duration (sec) 0 Fig 3. Maximum Effective Transient Thermal Impedance Junction-to-Case Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 50 C and Tstart =25 C (Single Pulse) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Τj = 25 C and Tstart = 50 C. 0..0E-06.0E-05.0E-04.0E-03.0E-02.0E-0 tav (sec) Fig 4. Typical Avalanche Current vs. Pulse Width 500 400 300 200 TOP Single Pulse BOTTOM.0% Duty Cycle I D = 62A Notes on Repetitive Avalanche Curves, Figures 4, 5: (For further info, see AN-5 at www.irf.com). Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 6a, 6b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 3, 5). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see Figures 3) 0 25 50 75 25 50 75 Starting T J, Junction Temperature ( C) Fig 5. Maximum Avalanche Energy vs. Temperature P D (ave) = /2 (.3 BV I av ) = DT/ Z thjc I av = 2DT/ [.3 BV Z th ] E AS (AR) = P D (ave) t av 5
Q RR (nc) I RRM (A) Q RR (nc) V GS(th), Gate threshold Voltage (V) I RRM (A) IRF36SPbF 4.5 60 I F = 4A 4.0 50 V R = 85V 3.5 40 T J = 25 C 3.0 30 I D = 250µA 2.5 I D =.0mA 20 I D =.0A 2.0.5 - -50 0 50 50 200 T J, Temperature ( C ) Fig 6. Threshold Voltage vs. Temperature 0 200 300 400 500 600 700 800 900 0 di F /dt (A/µs) Fig. 7 - Typical Recovery Current vs. di f /dt 60 4000 I F = 62A I F = 4A 50 V R = 85V 3500 V R = 85V 40 T J = 25 C 3000 T J = 25 C 2500 30 2000 20 500 0 0 500 200 300 400 500 600 700 800 900 0 200 300 400 500 600 700 800 900 0 di F /dt (A/µs) di F /dt (A/µs) Fig. 8 - Typical Recovery Current vs. di f /dt Fig. 9 - Typical Stored Charge vs. di f /dt 4000 3500 3000 I F = 62A V R = 85V T J = 25 C 2500 2000 500 0 500 200 300 400 500 600 700 800 900 0 di F /dt (A/µs) Fig. 20 - Typical Stored Charge vs. di f /dt 6
IRF36SPbF - D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD - Re-Applied Voltage Body Diode Inductor Curent Current Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 2. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs 5V tp V (BR)DSS V DS L DRIVER R G 20V V GS tp D.U.T IAS 0.0Ω - V DD A I AS Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms V DS R D V DS V GS D.U.T. 90% R G - V DD VV GS Pulse Width µs Duty Factor 0. % % V GS t d(on) t r t d(off) t f Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms Current Regulator Same Type as D.U.T. Vds Id 50KΩ Vgs 2V.2µF.3µF V GS D.U.T. V - DS Vgs(th) 3mA I G I D Current Sampling Resistors Qgs Qgs2 Qgd Qgodr 7 Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
IRF36SPbF D 2 Pak (TO-263AB) Package Outline Dimensions are shown in millimeters (inches) D 2 Pak (TO-263AB) Part Marking Information Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 8
IRF36SPbF D 2 Pak (TO-263AB) Tape & Reel Information Dimensions are shown in millimeters (inches) TRR.60 (.063).50 (.059) 4. (.6) 3.90 (.53).60 (.063).50 (.059) 0.368 (.045) 0.342 (.035) FEED DIRECTION.85 (.073).65 (.065).60 (.457).40 (.449) 5.42 (.609) 5.22 (.60) 24.30 (.957) 23.90 (.94) TRL.90 (.429).70 (.42) 6. (.634) 5.90 (.626).75 (.069).25 (.049) 4.72 (.36) 4.52 (.78) FEED DIRECTION 3.50 (.532) 2.80 (.504) 27.40 (.079) 23.90 (.94) 4 330.00 (4.73) MAX. 60.00 (2.362) MIN. NOTES :. COMFORMS TO EIA-48. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (.039) 24.40 (.96) 3 30.40 (.97) MAX. 4 Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ IR WORLD HEADQUARTERS: N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit http://www.irf.com/whoto-call/ 9
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