SN7576A Bidirectional Transceiver Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-4-B and ITU Recommendation V. Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments -State Driver and Receiver s Individual Driver and Receiver Enables Wide Positive and Negative Input/ Bus Voltage Ranges Driver Capability...±6 ma Max Thermal-Shutdown Protection Driver Positive- and Negative-Current Limiting Receiver Input Impedance... kω Min Receiver Input Sensitivity...± mv Receiver Input Hysteresis...5 mv Typ Operates From Single 5-V Supply Low Power Requirements R RE DE D SLLSA JUNE 984 REVISED MAY 995 D OR P PACKAGE (TOP VIEW) 4 8 7 6 5 V CC B A GND description The SN7576A differential bus transceiver is a monolithic integrated circuit designed for bidirectional data communication on multipoint bus-transmission lines. It is designed for balanced transmission lines and meets ANSI Standard EIA/TIA-4-B and ITU Recommendation V.. The SN7576A combines a -state differential line driver and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, that can be externally connected together to function as a direction control. The driver differential outputs and the receiver differential inputs are connected internally to form differential input/output (I/O) bus ports that are designed to offer minimum loading to the bus whenever the driver is disabled or V CC =. These ports feature wide positive and negative common-mode voltage ranges making the device suitable for party-line applications. The driver is designed to handle loads up to 6 ma of sink or source current. The driver features positive- and negative-current limiting and thermal shutdown for protection from line fault conditions. Thermal shutdown is designed to occur at a junction temperature of approximately 5 C. The receiver features a minimum input impedance of kω, an input sensitivity of ± mv, and a typical input hysteresis of 5 mv. The SN7576A can be used in transmission-line applications employing the SN757 and SN7574 quadruple differential line drivers and SN757 and SN7575 quadruple differential line receivers. The SN7576A is characterized for operation from C to 7 C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 995, Texas Instruments Incorporated POST OFFICE BOX 655 DALLAS, TEXAS 7565
SN7576A SLLSA JUNE 984 REVISED MAY 995 Function Tables DRIVER INPUT ENABLE OUTPUTS D DE A B H H H L L H L H X L Z Z RECEIVER DIFFERENTIAL INPUTS ENABLE OUTPUT A B RE R VID. V L H. V < VID <. V L? VID. V L L X H Z Open L? H = high level, L = low level,? = indeterminate, X = irrelevant, Z = high impedance (off) logic symbol logic diagram (positive logic) DE RE D 4 EN EN 6 7 A B DE D 4 RE R 6 7 A B Bus R This symbol is in accordance with ANSI/IEEE Std 9-984 and IEC Publication 67-. POST OFFICE BOX 655 DALLAS, TEXAS 7565
SN7576A SLLSA JUNE 984 REVISED MAY 995 schematics of inputs and outputs EQUIVALENT OF EACH INPUT TYPICAL OF A AND B I/O PORTS TYPICAL OF RECEIVER OUTPUT VCC R(eq) VCC VCC 85 Ω NOM Input 6.8 kω NOM 96 Ω NOM 96 Ω NOM Driver input: R(eq) = kω NOM Enable inputs: R(eq) = 8 kω NOM R(eq) = equivalent resistor Input/ Port GND absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC (see Note )............................................................. 7 V Voltage range at any bus terminal.................................................... to 5 V Enable input voltage, V I.................................................................... 5.5 V Continuous total power dissipation..................................... See Dissipation Rating Table Operating free-air temperature range, T A.............................................. C to 7 C Storage temperature range, T stg................................................... 65 C to 5 C Lead temperature,6 mm (/6 inch) from case for seconds............................... 6 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE : All voltage values, except differential input/output bus voltage, are with respect to network ground terminal. PACKAGE DISSIPATION RATING TABLE TA A 5 C DERATING FACTOR TA A = 7 C TA A = 5 C POWER RATING ABOVE TA = 5 C POWER RATING POWER RATING D 75 mw 5.8 mw/ C 464 mw 6 mw P mw 8.8 mw/ C 74 mw 96 mw POST OFFICE BOX 655 DALLAS, TEXAS 7565
SN7576A SLLSA JUNE 984 REVISED MAY 995 recommended operating conditions MIN TYP MAX UNIT Supply voltage, VCC 4.75 5 5.5 V Voltage at any bus terminal (separately or common mode), VI or VIC 7 V High-level input voltage, VIH D, DE, and RE V Low-level input voltage, VIL D, DE, and RE.8 V Differential input voltage, VID (see Note ) ± V High-level output current, IOH Driver 6 ma Receiver 4 µa Low-level output current, IOL Driver 6 Receiver 8 ma Operating free-air temperature, TA 7 C NOTE : Differential-input/output bus voltage is measured at the noninverting terminal A with respect to the inverting terminal B. 4 POST OFFICE BOX 655 DALLAS, TEXAS 7565
SN7576A SLLSA JUNE 984 REVISED MAY 995 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIK Input clamp voltage II = 8 ma VIH = V, VIL =.8 V, VOH High-level output voltage IOH = ma VIH = V, VIL =.8 V, VOL Low-level output voltage IOH = ma 7.7 V. V VOD Differential output voltage IO = OD V VOD Differential output voltage RL = Ω, See Figure.7 RL = 54 Ω, See Figure.5.4 VOD Change in magnitude of differential output voltage ±. V VOC VOC IO Common-mode output voltage Change in magnitude of common-mode output voltage current RL = 54 Ω or Ω, See Figure disabled, VO = V See Note O = 7 V.8 V ±. V IIH High-level input current VI =.4 V µa IIL Low-level input current VI =.4 V 4 µa VO = 7 V 5 IOS Short-circuit output current VO = VCC 5 ma ICC Supply current (total package) No load VO = V 5 s enabled 5 5 s disabled 6 4 All typical values are at VCC = 5 V and TA = 5 C. VOD and VOC are the changes in magnitude of VOD and VOC respectively, that occur when the input is changed from a high level to a low level. In ANSI Standard EIA/TIA-4-B, VOC, which is the average of the two output voltages with respect to GND, is called output offset voltage, VOS. NOTE : This applies for both power on and off; refer to ANSI Standard EIA/TIA-4-B for exact conditions. switching characteristics, V CC = 5 V, T A = 5 C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT td(od) Differential-output delay time 4 6 ns RL =6Ω Ω, See Figure tt(od) Differential-output transition time 65 95 ns tpzh enable time to high level RL = Ω, See Figure 4 55 9 ns tpzl enable time to low level RL = Ω, See Figure 5 5 ns tphz disable time from high level RL = Ω, See Figure 4 85 ns tplz disable time from low level RL = Ω, See Figure 5 4 ns ma ma POST OFFICE BOX 655 DALLAS, TEXAS 7565 5
SN7576A SLLSA JUNE 984 REVISED MAY 995 RECEIVER SECTION electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIT + Positive-going input threshold voltage VO =.7 V, IO =.4 ma. V VIT Negative-going input threshold voltage VO =.5 V, IO = 8 ma. V Vhys Input hysteresis voltage (VIT + VIT ) 5 mv VIK Enable clamp voltage II = 8 ma VID = mv, VOH High-level output voltage See Figure VID = mv, VOL Low-level output voltage See Figure IOH = 4 µa,, IOL = 8 ma, 7.7 V 45.45 V IOZ High-impedance-state output current VO =.4 V to.4 V ± µa II Line input current Other input =, VI = V See Note I = 7 V.8 IIH High-level enable input current VIH =.7 V µa IIL Low-level enable input current VIL =.4 V µa ri Input resistance kω IOS Short-circuit output current 5 85 ma ICC Supply current (total package) No load s enabled 5 5 s disabled 6 4 All typical values are at VCC = 5 V, TA = 5 C. The algebraic convention, in which the less-positive (more-negative) limit is designated minimum, is used in this data sheet for common-mode input voltage and threshold voltage levels only. NOTE : This applies for both power on and power off. Refer to ANSI Standard EIA/TIA-4-B for exact conditions. switching characteristics, V CC = 5 V, C L = 5 pf, T A = 5 C ma ma tplh tphl tpzh tpzl tphz tplz PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Propagation delay time, low-to-high-level output 5 ns VID =.5 5Vto5V, See Figure 6 Propagation delay time, high-to-low-level output 5 ns enable time to high level ns See Figure 7 enable time to low level ns disable time from high level 5 ns See Figure 7 disable time from low level 7 5 ns 6 POST OFFICE BOX 655 DALLAS, TEXAS 7565
SN7576A PARAMETER MEASUREMENT INFORMATION SLLSA JUNE 984 REVISED MAY 995 VOD RL VID VOH RL VOC VOL +IOL IOH Figure. Driver V OD and V OC Figure. Receiver V OH and V OL Generator (see Note A) 5 Ω RL = 6 Ω CL = 5 pf (see Note B) CL Input td(od) 5% % tt(od) 9% td(od).5 V 5% %.5 V tt(od) TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = MHz, 5% duty cycle, tr 6 ns, tf 6 ns, ZO = 5 Ω. B. CL includes probe and jig capacitance. Figure. Driver Test Circuit and Voltage Waveforms Generator (see Note A) or 5 Ω S CL = 5 pf (see Note B) RL = Ω Input tpzh. tphz.5 V VOH Voff TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = MHz, 5% duty cycle, tr 6 ns, tf 6 ns, ZO = 5 Ω. B. CL includes probe and jig capacitance. Figure 4. Driver Test Circuit and Voltage Waveforms POST OFFICE BOX 655 DALLAS, TEXAS 7565 7
SN7576A SLLSA JUNE 984 REVISED MAY 995 or Generator (see Note A) 5 Ω S CL = 5 pf (see Note B) 5 V RL = Ω Input tpzl. tplz 5 V.5 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = MHz, 5% duty cycle, tr 6 ns, tf 6 ns, ZO = 5 Ω. B. CL includes probe and jig capacitance. Figure 5. Driver Test Circuit and Voltage Waveforms Generator (see Note A) 5 Ω CL = 5 pf (see Note B) Input tplh. tphl. VOH VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = MHz, 5% duty cycle, tr 6 ns, tf 6 ns, ZO = 5 Ω. B. CL includes probe and jig capacitance. Figure 6. Receiver Test Circuit and Voltage Waveforms 8 POST OFFICE BOX 655 DALLAS, TEXAS 7565
SN7576A SLLSA JUNE 984 REVISED MAY 995 S kω S 5 V CL = 5 pf (see Note B) 5 kω N96 or Equivalent Generator (see Note A) 5 Ω S TEST CIRCUIT Input tpzh S to S Open S Closed Input tpzl S to S Closed S Open VOH 4.5 V VOL Input S to S Closed S Closed Input S to S Closed S Closed tphz tplz.5 V VOH..5 V. VOL VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = MHz, 5% duty cycle, tr 6 ns, tf 6 ns, ZO = 5 Ω. B. CL includes probe and jig capacitance. Figure 7. Receiver Test Circuit and Voltage Waveforms POST OFFICE BOX 655 DALLAS, TEXAS 7565 9
SN7576A SLLSA JUNE 984 REVISED MAY 995 TYPICAL CHARACTERISTICS VOH V High-Level Voltage V 5 4.5 4.5.5.5.5 DRIVER HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT VCC = 5 V TA = 5 C V OL Low-Level Voltage V 5 4.5 4.5.5.5.5 DRIVER LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT VCC = 5 V TA = 5 C 4 6 8 IOH High-Level Current ma 4 6 8 IOL Low-Level Current ma Figure 8 Figure 9 VOD V Differential Voltage V 4.5.5.5.5 DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT CURRENT VCC = 5 V TA = 5 C VOL V OL Low-Level Voltage V ÁÁ ÁÁ.6.5.4... RECEIVER LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT VCC = 5 V TA = 5 C 4 5 6 7 8 IO Current ma 9 5 5 5 IOL Low Level Current ma Figure Figure POST OFFICE BOX 655 DALLAS, TEXAS 7565
SN7576A TYPICAL CHARACTERISTICS SLLSA JUNE 984 REVISED MAY 995 RECEIVER LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE RECEIVER OUTPUT VOLTAGE vs ENABLE VOLTAGE VOL V Low-Levcel Voltage V ÁÁ ÁÁ.5.4... VCC = 5 V VID =. V IOL = 8 ma VO ÁÁVO Voltage V 5 4 VID =. V Load = 8 kω to GND TA = 5 C VCC = 5 V VCC = 5.5 V VCC = 4.75 V 4 5 6 TA Free-Air Temperature C Figure 7 8.5.5.5 VI Enable Voltage V Figure V VO O Voltage V ÁÁ 6 5 4 VCC = 5.5 V VCC = 4.75 V RECEIVER OUTPUT VOLTAGE vs ENABLE VOLTAGE VID =. V Load = kω to VCC TA = 5 C VCC = 5 V.5.5.5 VI Enable Voltage V Figure 4 POST OFFICE BOX 655 DALLAS, TEXAS 7565
SN7576A SLLSA JUNE 984 REVISED MAY 995 APPLICATION INFORMATION SN6576A SN6576A RT RT Up to Transceivers NOTE A: The line should be terminated at both ends in its characteristic impedance (RT = ZO). Stub lengths off the main line should be kept as short as possible. Figure 5. Typical Application Circuit POST OFFICE BOX 655 DALLAS, TEXAS 7565
PACKAGE OPTION ADDENDUM www.ti.com -Jun-5 PACKAGING INFORMATION Orderable Device Status () Package Type Package Drawing Pins Package Qty SN7576AD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) SN7576ADE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) SN7576ADR ACTIVE SOIC D 8 5 Green (RoHS & no Sb/Br) SN7576ADRE4 ACTIVE SOIC D 8 5 Green (RoHS & no Sb/Br) SN7576AP ACTIVE PDIP P 8 5 Pb-Free (RoHS) SN7576APE4 ACTIVE PDIP P 8 5 Pb-Free (RoHS) Eco Plan () Lead/Ball Finish MSL Peak Temp () CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Level--6C-UNLIM Level--6C-UNLIM Level--6C-UNLIM Level--6C-UNLIM Level-NC-NC-NC Level-NC-NC-NC () The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. () Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed.% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed.% by weight in homogeneous material) () MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page
MECHANICAL DATA MPDIA JANUARY 995 REVISED JUNE 999 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 8.4 (,6).55 (9,) 5.6 (6,6).4 (6,) 4.7 (,78) MAX. (,5) MIN.5 (8,6). (7,6).5 (,8). (5,8) MAX Gage Plane Seating Plane.5 (,8) MIN. (,5) NOM. (,5).5 (,8). (,54). (,5) M.4 (,9) MAX 448/D 5/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS- For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655 DALLAS, TEXAS 7565
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