MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion June 2013 MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion Feaures Buil-in MOSFET(1 A / 550 V) Digially Implemened Acive-PFC Funcion No Addiional Circui for Achieving High PF Applicaion Inpu Range: 80 V AC ~ 308 V AC Buil-In HV Supplying Circui: Self Biasing AOCP Funcion wih Auo-Resar Mode Buil-In Over-Temperaure Proecion (OTP) Cycle-by-Cycle Curren Limi Curren Sense Pin Open Proecion Low Operaing Curren: 0.85 ma (Typical) Under-Volage Lockou wih 5 V Hyseresis Programmable Oscillaion Frequency Programmable LED Curren Analog Dimming Funcion Sof-Sar Funcion Precise Inernal Reference: ±3% Applicaions LED Lamp for Decoraive Lighing LED Lamp for Low-Power Lighing Fixure Descripion The LED lamp driver is a simple IC wih inegraed MOSFET and PFC funcion. The special adoped digial echnique auomaically deecs inpu volage condiion and sends an inernal reference signal o achieve high power facor. When AC inpu is applied o he IC, he PFC funcion is auomaically enabled. When DC inpu is applied o he IC, he PFC funcion is auomaically disabled. The does no need a bulk (elecrolyic) capacior for supply rail sabiliy, which significanly improves LED lamp life. Fuse BD C1 L1 L2 C2 R1 R2 CS VCC GND RT DRAIN HV ADIM Figure 1. Typical Applicaion C3 D1 C4 L3 LED Ordering Informaion Par Number Operaing Temperaure Range Package Packing Mehod MX -40 C o +125 C 7-Lead, Small-Ouline Inegraed Circui (SOIC), JEDEC MS-012,.150-inch, Narrow Body Tape & Reel 2012 Fairchild Semiconducor Corporaion www.fairchildsemi.com Rev. 1.0.2
VCC ZCD ime MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion Block Diagram VCC 2 JFET 7 HV UVLO IAD ZCD 8 DRAIN ADIM 5 DAC Sof-Sar TSD Digial Block RT 4 Oscillaor R Q Reference - + S LEB 1 CS GND 3 Leading-Edge Blanking - 2.5V + AOCP Figure 2. Block Diagram Pin Configuraion CS VCC GND RT DRAIN HV ADIM Figure 3. Pin Configuraion Pin Definiions Pin # Name Descripion 1 CS Curren Sense. Limis oupu curren, depending on he sensing resisor volage. The CS pin is also used o se he LED curren regulaion. 2 VCC VCC. Supply pin for sable IC operaion; ZCD signal deecion used for accurae PFC funcion. 3 GND GROUND. Ground for he IC 4 RT 5 ADIM RT. Programmable operaing frequency using an exernal resisor; he IC has pre-fixed frequency when his pin is open or floaing. Analog Dimming. Connec o he inernal curren source. Use o change he oupu curren using an exernal resisor. If ADIM is no used, connec a 0.1 µf bypass capacior beween he ADIM and GND. 7 HV High Volage. Connec o he high-volage line and supply curren o he IC. 8 DRAIN DRAIN. The drain pin of inernal MOSFET 2012 Fairchild Semiconducor Corporaion www.fairchildsemi.com Rev. 1.0.2 2
MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion Absolue Maximum Raings Sresses exceeding he absolue maximum raings may damage he device. The device may no funcion or be operable above he recommended operaing condiions and sressing he pars o hese levels is no recommended. In addiion, exended exposure o sresses above he recommended operaing condiions may affec device reliabiliy. The absolue maximum raings are sress raings only. Symbol Parameer Min. Max. Uni V CC IC Supply Volage 20 V HV High Volage Sensing 550 V DRAIN Inernal Drain Volage 550 V V ADIM Analog Dimming 5 V V RT RT Pin Volage 5 V V CS Allowable Curren Sensing Deecion Volage 5 V T A Operaing Ambien Temperaure Range -40 +125 C T J Operaing Juncion Temperaure -40 +150 C T STG Sorage Temperaure Range -65 +150 C θ JA Thermal Resisance Juncion-Air (1,2) 135 C/W P D Power Dissipaion 660 mw ESD Elecrosaic Discharge Capabiliy Human Body Model, JESD22-A114 2000 Charged Device Model, JESD22-C101 1000 Noes: 1. Thermal resisance es board. Size: 76.2 mm x 114.3 mm x 1.6 mm (1S0P); JEDEC sandard: JESD51-2, JESD51-3. 2. Assume no ambien airflow. V 2012 Fairchild Semiconducor Corporaion www.fairchildsemi.com Rev. 1.0.2 3
MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion Elecrical Characerisics Typical values are a T A = +25 C. Specificaions o -40 C ~ 125 C are guaraneed by design based on final characerizaion resuls. Symbol Parameer Condiion Min. Typ. Max. Uni V CC Bias Secion V CC V CC Regulaor Oupu Volage V HV=100 V DC 14.0 15.5 17.0 V V CCST+ UVLO Posiive-Going Threshold V CC Increasing 12 13 14 V V CCST- UVLO Negaive-Going Threshold V CC Decreasing 7 8 9 V V CCHYS UVLO Hyseresis 4 5 6 V I HV HV Pin Curren V HV=100 V DC, RT=Open 0.85 1.20 ma I ST Sarup Curren 120 150 μa Swiching Secion R T=5.95 kω 200 250 300 khz f OSC Operaing Frequency R T=87 kω 16 20 24 khz R T Open 40.5 45.0 49.5 khz MIN Minimum On Time (3) 400 ns D MAX Maximum Duy Cycle 50 % LEB Leading Edge Blanking Time (3) 350 ns V RT Volage Reference of RT Pin 1.5 V Sof-Sar Secion ss Sof-Sar Time (3) DC Mode 48 60 72 ms AC Mode 7 Periods Reference Secion V CS1 DC Mode 0.354 0.365 0.376 Inernal Reference Volage of CS Pin V CS2 AC Mode (3) 0.485 0.500 0.515 Proecion Secion OVP VCC Over-Volage Proecion on VCC Pin 17.7 18.7 19.7 V V AOCP Abnormal OCP Level a CS Pin (3) 2.5 V AOCP Abnormal Deecion Time (3) 70 ns T TSDH Thermal Shudown Threshold (3) 140 150 C T TSDHY Thermal Shudown Threshold (3) 50 C Hyseresis Dimming Secion V ADIM(ST+) Analog Dimming Posiive Going (3) Threshold 3.15 3.50 3.85 V V ADIM(ST-) Analog Dimming Negaive Going (3) Threshold 0.50 0.75 V I AD Inernal Curren Source for ADIM Pin 9 12 15 μa Coninued on he following page V 2012 Fairchild Semiconducor Corporaion www.fairchildsemi.com Rev. 1.0.2 4
MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion Elecrical Characerisics (Coninued) Typical values are a T A = +25 C. Specificaions o -40 C ~ 125 C are guaraneed by design based on final characerizaion resuls. Symbol Parameer Condiion Min. Typ. Max. Uni MOSFET Secion BV DSS Breakdown Volage V CC=0 V, I D=250 μa 550 V I LKMOS Inernal MOSFET Leakage Curren V DS=550 V DC, V GS=0 V 250 μa (3) VGS=10 V, VDGS=0 V, R ON(ON) Drain-Source On Resisance T C=25 C 7.3 10.0 Ω C ISS Inpu Capaciance (3) V GS=0 V,V DS=25 V, f=1 MHz 135 pf C OSS Oupu Capaciance (3) V GS=0 V,V DS=25 V, f=1 MHz 21 pf C RSS Reverse Transfer Capaciance (3) V GS=0 V,V DS=25 V, f=1 MHz 3.2 pf d(on) Turn-On Delay (3) V DD=350 V, I D=1 A 10 ns r Rise Time (3) V DD=350 V, I D=1 A 13.4 ns d(off) Turn-Off Delay (3) V DD=350 V, I D=1 A 14.9 ns f Fall Time (3) V DD=350 V, I D=1 A 36.8 ns Noe: 3. These parameers, alhough guaraneed, are no 100% esed in producion. 2012 Fairchild Semiconducor Corporaion www.fairchildsemi.com Rev. 1.0.2 5
MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion Funcional Descripion The is a basic PWM conroller for buck converer opology in Coninuous Conducion Mode (CCM) wih an inelligen PFC funcion ha uses a digial conrol algorihm. An inernal self-biasing circui uses he high-volage swiching device. The IC does no need an auxiliary powering pah o he VCC pin ypical in flyback conrol ICs or PSR produc family. When he inpu volage applied o he HV pin is wihin operaing range (25 V o 500 V), he mainains a 15.5 V DC volage a he VCC pin for sable operaion. The UVLO block funcions such ha when he V CC volage rises higher han V CCST+, he inernal UVLO block releases and sars operaion. Oherwise, he V CC goes down o he V CCST- and IC operaion sops. Normally, he hyseresis funcion provides sable operaion even if he inpu volage is operaing under very noisy or unsable circumsances. power for he IC, has volage ripple as well as he recificaion volage afer bridge, changing volage level according o he V CC capacior value. Using his kind of volage flucuaion on he VCC pin, he IC can deec he ime reference and creae he inernal ZCD signal. For precise and reliable inernal reference for inpu volage signal, he uses a digial echnique (sigma/dela modulaion) and creaes a new inernal signal (DAC_OUT) ha has he same phase as he inpu volage, as shown in Figure 5. This signal eners he final comparaor and is compared wih curren informaion from he sensing resisor. Vbridge Inpu Volage Peak Bridge Diode Oupu Volage JFET Oupu Volage The has a smar inernal digial block for deermining inpu condiion: AC or DC. When an AC source wih 50 Hz or 60 Hz is applied o he IC, he IC auomaically changes is inernal reference signal, which is similar o inpu signal, for creaing high power facor. When a DC source connecs o he IC, he inernal reference immediaely changes o DC. VCC ZCD DAC_OUT VDD Charging Volage JFET Oupu Volage Sof-Sar Funcion The has an inernal sof-sar funcion o reduce inrush curren a sarup. When he IC sars operaion following an inernal sequence, he inernal reference slowly increases for a pre-deermined fixed ime. Afer his ransien period, he inernal reference goes o a seady-sae level. In his ime, he IC coninually ries o find phase informaion from he VCC pin. If he IC succeeds in geing phase informaion, i auomaically follows a similar shape reference made during he ransien imes, 7 periods. If no, he IC has a DC reference level. Vbridge Figure 5. Inernal PFC Funcion Self-Biasing Funcion The self-biasing funcion, using an HV device, can supply enough operaing curren o he IC and guaranee similar sarup ime across he whole inpu volage range (80 V~308 V AC). However, self-biasing has a weakness in high-volage condiion. Normally, he HV device acs as consan curren source, so he inernal HV device has power loss when high inpu volage connecs o he HV pin. This power loss is proporional o inpu volage. To reduce his power loss, one of he possible soluions is an addiional resisor beween he inpu volage source and he HV pin, as shown in Figure 6. ILED L1 LED D1 T/2 = 1/(Inpu Frequency * 2) 7*(T/2) Normal Operaion Fuse L3 Figure 4. Sof-Sar Funcion in AC Inpu Mode BD C1 C2 CS DRAIN VCC HV GND R3 Inernal PFC Funcion: How o Achieve High Power Facor The has a simple, smar, inernal PFC funcion ha does no require addiional pins for deecing inpu phase informaion or an elecrolyic capacior for supply volage sabilizaion. For achieving high PF, he does no use he recificaion capacior afer he bridge diode. This is imporan because he IC insead uses flucuaion in he signal on he VCC pin. Basically, he VCC pin, which is supplies RT ADIM R1 C3 R2 C4 L2 Figure 6. High-Volage Applicaion 2012 Fairchild Semiconducor Corporaion www.fairchildsemi.com Rev. 1.0.2 6
MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion Dimming Funcion The uses he ADIM pin for analog or 0 V o 10 V dimming by using a resisive divider. The peak volage of inernal reference, which is DAC_OUT signal in Figure 5, is changed by he V ADIM level, as shown in Figure 7, and has differen peak level according o he operaing mode. VDAC _ OUT In DCM Mode, inducance is: L m n V f ( 1 Dmin ) [ H] f i s rip If he peak curren is fixed a 350 mapk, he formula for he peak curren is: I LED ( ave. peak) i con i 2 rip [A] (2) (3) 0.5 V 0. 365 V AC Mode DC Mode In FL7701, he LED RMS curren deermines he inducance parameer. To drive for CCM Mode, define LED RMS curren firs, as: 0.5V 3.5V VADIM I LED ( rms) I LED ( ave. peak) 2 [A] Subsiuing Equaion (2) for Equaion (4), he inducance of inducor is obained. (4) Inducor Design Figure 7. V ADIM vs. V DAC_OUT(peak) The fixed inernal duy raio range is below 50%, or around 400 ns, from a iming poin of view. The range is dependen on he inpu volage and number of LEDs in is sring. Minimum duy is calculaed as: D n V f min (1) Vin(max) where: η = efficiency of sysem; V IN(max)= maximum inpu volage; V f = forward drop volage of LED; and n = LED number in series connecion. Curren Limi Average LED Curren VIN Vbridge ZCD DAC VLED Vdrain ILED IFRD Π 3Π 4Π 2Π Inpu Volage Peak Inpu Volage Peak Bridge Diode Oupu Volage Inpu Volage Peak VDD Charging Volage irip IMOSFET on off Curren peak a LED average curren maximum poin (ILED(ave.peak)) DCM Dmin 1-Dmin (a) DCM Mode i Curren peak a LED curren maximum poin (ILED(peak)) Average LED Curren (ILED(ave)) 0.5 i 0.5 i CCM DCM Iinpu T/2 = 1/(Inpu Frequency * 2) T = 1/Inpu Ferquency Figure 9. Typical Performance Characerisics Curren min a LED curren maximum poin (ILED(min)) Dmin on off 1-Dmin (b) CCM Mode Figure 8. DCM and CCM Operaion 2012 Fairchild Semiconducor Corporaion www.fairchildsemi.com Rev. 1.0.2 7
MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion Example Applicaion Circuis L1 D1 LED Fuse L3 CS DRAIN BD C1 C2 VCC HV GND R1 C3 R2 RT ADIM C4 L2 Figure 10. Applicaion Circui wihou Elecrolyic Capacior L1 LED D1 ZD C5 Fuse L3 CS DRAIN BD C1 C2 VCC HV GND R1 C3 R2 RT ADIM C4 L2 Figure 11. Applicaion Circui wih Elecrolyic Capacior L1 CS DRAIN Fuse VCC HV R1 BD C1 C2 GND RT ADIM C4 L3 R2 C3 D1 LED ZD C5 L2 Figure 12. Applicaion Circui of High-Side Operaion wih Elecrolyic Capacior 2012 Fairchild Semiconducor Corporaion www.fairchildsemi.com Rev. 1.0.2 8
17.0 6.0 16.5 5.5 VCCHV [V] VCC[V] 16.0 15.5 5.0 15.0 4.5 14.5 14.0-40 -20 0 20 40 60 80 100 4.0-40 120-20 0 Figure 13. 20 40 60 80 100 120 VCC vs. Temperaure Figure 14. 14.0 VCCHYS vs. Temperaure 150 140 130 IST[ A] VCCST+[V] 13.5 13.0 120 110 12.5 100 12.0-40 -20 0 20 40 60 80 100 90-40 120-20 0 Figure 15. 20 40 60 80 100 120 100 120 VCCST+ vs. Temperaure Figure 16. 9.0 IST vs. Temperaure 48 47 fosc [khz] VCCST-[V] 8.5 8.0 46 45 7.5 44 7.0-40 -20 0 20 40 60 80 100 43-40 120-20 Figure 17. 20 40 60 80 VCCST- vs. Temperaure 2012 Fairchild Semiconducor Corporaion Rev. 1.0.2 0 Figure 18. fosc vs. Temperaure (RT=Open) www.fairchildsemi.com 9 MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion Typical Characerisics
D MAX [%] OVP VCC [V] f OSC [khz] V CS1 [V] f OSC [khz] V RT [V] MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion Typical Characerisics 24 1.7 22 1.6 20 1.5 18 1.4 16 1.3 Figure 19. f OSC vs. Temperaure (RT=87kΩ) Figure 20. V RT vs. Temperaure 300 0.375 280 0.370 260 0.365 240 0.360 220 0.355 200 0.350 Figure 21. f OSC vs. Temperaure (RT=5.95kΩ) Figure 22. V CS vs. Temperaure 52 19.5 51 19.0 50 18.5 49 18.0 48 17.5 Figure 23. D MAX vs. Temperaure Figure 24. OVP VCC vs. Temperaure 2012 Fairchild Semiconducor Corporaion www.fairchildsemi.com Rev. 1.0.2 10
I DSS [ A] I AD [ A] BV DSS [V] MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion Typical Characerisics 15 14 13 640 620 12 600 11 10 9 580 560 Figure 25. I AD vs. Temperaure Figure 26. BV DSS vs. Temperaure 0.5 0.4 0.3 0.2 0.1 0.0 Figure 27. I DSS vs. Temperaure 2012 Fairchild Semiconducor Corporaion www.fairchildsemi.com Rev. 1.0.2 11
MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion Physical Dimensions 7 5.00 4.80 3.81 6 5 A B 0.65TYP 3.81 6.20 5.80 4.00 3.80 1.75TYP 3.85 7.35 PIN #1 (0.33) 1 2 3 4 1.27 TOP VIEW 0.25 C B A 1.27 LAND PATTERN RECOMMENDATION SEE DETAIL A 0.25 0.10 0.25 0.19 1.75 MAX 0.51 0.33 FRONT VIEW C 0.10 C OPTION A - BEVEL EDGE OPTION B - NO BEVEL EDGE R0.10 R0.10 8 0 0.90 0.406 (1.04) DETAIL A SCALE: 2:1 0.50 0.25 x 45 GAGE PLANE 0.36 SEATING PLANE NOTES: A) THIS PACKAGE DOES NOT FULLY CONFORMS TO JEDEC MS-012 VARIATION AA. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) DRAWING FILENAME : M07Brev3 Figure 28. 7-Lead, Small-Ouline Inegraed Circui (SOIC), JEDEC MS-012,.150-Inch Narrow Body Package drawings are provided as a service o cusomers considering Fairchild componens. Drawings may change in any manner wihou noice. Please noe he revision and/or dae on he drawing and conac a Fairchild Semiconducor represenaive o verify or obain he mos recen revision. Package specificaions do no expand he erms of Fairchild s worldwide erms and condiions, specifically he warrany herein, which covers Fairchild producs. Always visi Fairchild Semiconducor s online packaging area for he mos recen package drawings: hp://www.fairchildsemi.com/packaging/. 2012 Fairchild Semiconducor Corporaion www.fairchildsemi.com Rev. 1.0.2 12
2012 Fairchild Semiconducor Corporaion www.fairchildsemi.com Rev. 1.0.2 13 MOSFET Inegraed Smar LED Lamp Driver IC wih PFC Funcion
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