Loss-Free Resstor-based Power Factor Correcton usng a Sem-brdgeless Boost Rectfer n Sldng- Mode Control A. Marcos-Pastor, E. Vdal-Idarte, Member, IEEE, A. Cd-Pastor, Member, IEEE and L. Martínez-Salamero, Senor Member, IEEE Abstract In ths work, a Loss-Free Resstor based on a sembrdgeless rectfer s proposed for power factor correcton applcatons. Ths partcular brdgeless rectfer type s composed of two dfferent boost cells whch operate complementarly durng each half-lne cycle. In case of two unbalanced nductors, many control technques can produce dfferent nductor current rpples durng each half-lne cycle that can result n the addton of a DC component to the lne current. Ths work demonstrates that the applcaton of sldng-mode control by means of hysteretc controllers results n a 1st order stable system that can mtgate these harmful consequences due to ts capablty to ensure the symmetry of the lne nput current waveform for both postve and negatve half-lne cycles. Thus, the system does not absorb any DC component from the grd and t s also capable to reduce dramatcally the ampltude of the 3rd harmonc. The theoretcal predctons have been valdated by means of PSIM smulatons and expermentally on a prototype of 1 kw whch has been controlled usng only one sldng control surface. avod the use of the dode brdge, known as brdgeless topologes. In [5] several boost-based brdgeless power factor correcton converters are evaluated n terms of number of components, power factor, effcency and power losses. In [6] a performance evaluaton of brdgeless boost-based rectfers Index Terms AC-DC power converson, loss-free resstor, sldng-mode control, power factor correcton, sem-brdgeless boost rectfer. P I. INTRODUCTION OWER Factor Correcton (PFC) s one of the most actve research lnes n the feld of power processng because electronc equpment must guara ntee the complance of standard regulatons [1]. For the last twenty years many power DC-DC converters have been proposed for power factor correcton applcatons []. The soluton s not unque but t usually becomes a tradeoff between cost and qualty of the lne current waveform [3]. The most popular PFC actve power crcut conssts of a boost converter connected to the grd by a dode brdge rectfer, as shown n Fg. 1.a because of ts man advantages: grounded transstor, smplcty and hgh effcency. However, the man drawback of ths topology s the use of an nput dode brdge that produces the largest share of the total losses [4]. The need for a hgher effcency from the PFC stage has led crcut desgners to develop lower power losses alternatves whch Ths work was supported n part by the Spansh Mnstero de Educacón e Innovacón under Projects DPI010-16084, DPI013-47437- R, DPI013-4793-R and CSD009-00046. The work of A. Marcos- Pastor was supported by the Spansh Mnstero de Economía y Compettvdad under Grant BES-011-045309. The authors are wth the Departament d Engnyera Electrònca, Elèctrca Automàtca, Escola Tècnca Superor d Engnyera, Unverstat Rovra Vrgl, 43007 Tarragona, Span (emal: adra.marcos@urv.cat; angel.cd@urv.cat; enrc.vdal@urv.cat; lus.martnez@urv.cat). c) Fg. 1. Tradtonal PFC boost converter wth dode brdge. Brdgeless PFC boost converter. c) Sem-brdgeless PFC boost converter.
s presented. The basc topology of the brdgeless PFC boost rectfer [7] s shown n Fg. 1.b. Compared to the conventonal PFC boost converter, one dode s elmnated from the lne-current path, so that the lne current only flows through two semconductors and, therefore, conducton losses are reduced. However, the man drawback of ths converter s that the nput voltage sensor and the current sensor must be solated. In addton, the brdgeless PFC boost converter n Fg. 1.b has larger common-mode nose than the conventonal PFC boost rectfer [8]. A dfferent topology s depcted n Fg. 1.c showng a modfcaton of the basc brdgeless PFC boost rectfer by means of the addton of two slow recovery dodes (D A, D B ) and a second nductor (L ), ths resultng n two DC-DC boost crcuts, one for each half-lne cycle [9]. Ths topology, known as sem-brdgeless boost rectfer or dual-boost rectfer, s a more sutable soluton for practcal mplementaton than the basc brdgeless topology n terms of sensng the nput voltage and current varables [9,10]. The man dfference of the sem-brdgeless rectfer wth respect to the basc brdgeless topology s that n the frst one the whole lne current AC enters nto the PFC crcut through a dfferent nductor each half-lne cycle, whereas n the second one the whole lne current flows through the same nductor. For that reason, the sem-brdgeless rectfer can present an undesred behavor n case that ts two nductors have dfferent nductance values produced by dfferent factors, such as temperature, ageng or magnetc core characterstcs. The most mportant consequence related to ts performance conssts n the exstence of dfferent nductor current rpples durng each half-lne cycle (Fg. ) whch can lead to problematc EMI ssues and an njecton of a DC component to the lne current (Fg. 3). A DC component wll be produced f the average value of the lne nput current for the postve half-lne cycle s not equal to the average value of the negatve half-lne cycle. The exstence of a DC current component s partcularly harmful for dstrbuton power transformers because t can saturate ther magnetc core. In ths case, the absorpton of reactve power s ncremented leadng to more power losses and, n consequence, overheatng [11]. The exstence of these undesred phenomena n case of unbalanced nductors depends on the appled current-mode control technque as t can be observed n TABLE I. Many current controllers n PFC applcatons operate at a constant frequency wth Pulse-Wdth Modulaton (PWM) [1-14], average current-mode controllers beng the most popular. However, other constant frequency-based control technques can be found, such as valley current-mode control and peak current-mode control n both contnuous conducton-mode (CCM) and dscontnuous conducton-mode (DCM). In case of unbalanced nductors, the frst three control technques would produce dfferent nductor current rpples durng each half-lne cycle leadng to a DC component addton to the absorbed lne current. Also, some varable frequency controllers, such as one-cycle control technque wth constant on-tme n crtcal conducton-mode (CrCM), can also produce both undesred phenomena. Fg.. Respectve nductor current rpples n case of unbalanced nductors usng the sem-brdgeless boost rectfer. Fg. 3. Injecton of a DC component to lne current n case of unbalanced nductors. TABLE I CHARACTERISTICS OF DIFFERENT CONTROL TECHNIQUES FOR SEMI-BRIDGELESS RECTIFIER IN CASE OF UNBALANCED INDUCTORS Appled Current Control Technque Swtchng Frequency Conducton Mode Inductor Current rpples for each halflne cycle DC harmonc current njecton Average Current-Mode Constant CCM Dfferent No Valley Current-Mode Constant CCM Dfferent Yes Peak Current-Mode Constant CCM Dfferent Yes DCM Equal Yes One-cycle wth constant ON-tme Varable CrCM Dfferent Yes Hysteretc control Varable CCM/CrCM Equal No
In a clear-cut contrast, hysteretc controllers are capable to ensure the symmetry of each half-lne cycle of lne current because the wdth of the controlled varable s gong to be determned by the hysteress control sgnal. The use of hysteretc controllers goes back n tme to the early years of DC-DC swtchng converters when the resultng regulators where called self-oscllatng because the change of topology was produced by the change of the nternal state of the converter rather than by the acton of an external sgnal as n PWM systems [15]. It has been shown recently that the most approprate technque to descrbe the dynamc behavor of hysteress-based swtchng converters s the sldng-mode control (SMC) approach [16], provded that sldng motons can be nduced n the varable structure system descrbng the swtchng converter [17]. The use of SMC theory has allowed the synthess of Loss- Free Resstors (LFRs) [18] by establshng the requrements that power converters must fulfll n order to present a proportonal relaton between both nput voltage and current n steady-state [19-]. The technque reported n [19] s employed here to mpose a LFR behavor to a sem-brdgeless boost rectfer for PFC applcatons. It s expected that the hysteress employed n the control mplementaton of the sldng-mode-based Loss-Free Resstor (SLFR) wll ensure the symmetry of the absorbed grd current and therefore the absence of low frequency harmoncs and a DC component n that current. It has to be ponted out that the proposed work s an extenson of the work presented n [3] by justfyng now the use of SMC n a sem-brdgeless boost converter and ncludng more accurate smulatons as well as the correspondng expermental results. The rest of the paper s structured as follows. The sem-brdgeless boost rectfer modelng s presented n secton II, and the desgn of the LFR n sldng-mode control and ts stable behavor are presented n secton III. Smulatons and expermental results of the desgned LFR for PFC applcatons llustrate the effectveness of the proposed approach n secton IV. Fnal conclusons are dscussed n secton V. II. SEMI-BRIDGELESS BOOST RECTIFIER MODELING The sem-brdgeless rectfer has less conducton losses because of the absence of one dode n the current path flow n comparson to the classc boost converter wth an nput dode brdge. Bascally, the sem-brdgeless rectfer s confgured by two dfferent boost converters, wth an extra dode for each boost, that operate durng each half-lne cycle. Therefore, the two actve swtches can be controlled ndependently by the same control sgnal or other gatng technques [10,13]. In [4] t has been seen that a synchronous rectfcaton only contrbutes to decrease power losses n low power cases but ths mprovement s lost when the on state resstance ncrements as a consequence of temperature rse-up of the MOSFET. In ths work, each MOSFET of the converter wll be controlled by a dfferent sgnal as llustrated n Fg. 4: u 1 for MOSFET Q 1 and u for MOSFET Q. The conducton through each MOSFET channel has been restrcted by the followng c) d) Fg. 4. Operaton of the sem-brdgeless boost converter. Operaton of boost cell 1 durng the postve half-lne cycle of the nput voltage (u =0): u 1=1, u 1=0. Operaton of boost cell durng the negatve half-lne cycle of the nput voltage (u 1=0): c) u =1, d) u =0.
condtons: control sgnal u wll be 0 durng the postve halflne cycle of nput voltage v AC (t), whereas control sgnal u 1 wll be 0 durng the negatve half-lne cycle. Although the two addtonal slow recovery dodes (D A, D B ) provde a return path to the nput current, part of the lne current flows through the body dode of the MOSFET and the nductor of the nactve boost cell. In consequence, the sembrdgeless boost converter presents four dfferent conducton states whch are llustrated n Fg. 4. It has to be ponted out that t s dffcult to predct how much current wll crculate through ths uncontrolled path because t wll depend on ts large-sgnal mpedance. Ths mpedance s manly determned by the forward drop voltage and the parastc resstance of the MOSFETs body dode and the seres resstance of the nactve boost nductor. In addton, all the parastc elements present a dependence on the temperature what adds another source of uncertanty to the crculatng current value. To deal wth ths partcular operaton, four possble currentsensng crcuts are dscussed n [10] where a resstor n seres wth the nput and a dfferental-mode amplfer s proposed as the least expensve soluton. However, the hgh nput common-mode voltage and the hgh swtchng frequency can nduce nose to the sensed current sgnal and, n consequence, the resultng power factor can be degraded. In ths paper, although t s a more expensve soluton, the whole nput current s gong to be sensed by a Hall effect sensor placed between the lne termnal and one of the nput termnals of the rectfer (Fg. 5) because of ts smplcty. The exstence of the uncontrolled current paths does not affect to the mathematcal analyss snce the sensed nput current corresponds to one of the two nductors dependng on the sgn of the nput lne voltage. For that reason, the state vector of the system can be defned as: [ ] T x t = t v t (1) Ln Co where n determnes whch of both nductors s operatng each half-lne cycle, and t s defned as: 1 f v > 0 AC n = f v < 0 AC Consderng that the rectfer s an deal loss-less system and that the load conssts n a resstor of value R o, the state matrces A ON, A OFF, B ON and B OFF are the followng: 0 0 1 Ln AON = BON = n 0 1 v t RoC o 0 0 1 L 1 n Ln AOFF = BOFF = vn t 1 1 C 0 o RoC o where v n (t) s the absolute value of the lne nput voltage v AC (t). The dynamcs of the system are descrbed durng ntervals t ON and t OFF of the swtchng perod as follows: x t = A x t + B ON x t = A x t + B x t where OFF ON OFF () (3) (4) (5) stands for the tme dervatve operaton of x(t). Equatons (4) and (5) can be combned n the followng blnear expresson: = + δ + ( + γ ) n x t Ax t Bx t u t where: A = A δ = B OFF OFF B = A A ON γ = B B ON OFF OFF (6) (7) Fg. 5. Hall effect current sensor placement. III. SYNTHESIS OF THE SLIDING LOSS-FREE RESISTOR The Loss-Free Resstor s a two-port swtchng structure whose nput current s proportonal to the nput voltage and all the absorbed nput power P s deally transmtted to the output. For that reason, Loss-Free Resstors are consdered a type of POPI (Power Output = Power Input) [18] systems because the nput power s deally equal to the output power P o, and n partcular the steady-state equatons of a Loss-Free Resstor can be presented as follows: V I = V I (8) V 1 1 = ri (9) 1 1
where V 1, I 1, V and I are the steady-state averaged value of nput and output varables respectvely. The parameter r s the nput resstve mpedance that the crcut exhbts n steadystate. Sometmes the emulated resstance value s defned as 1/g, where g represents the admttance of the resstor. The equvalent crcut model of an deal LFR s presented n Fg. 6. In the case of a DC-DC swtchng converter, a LFR can be syntheszed by applyng the sldng-mode control technque on the nput current of the system as llustrated n Fg. 7. Contnuous-tme sldng-mode control s generally used n control desgn for systems whch lead to a dscontnuous control acton and ths feature s used to generate the control sgnals of the power converter [17]. A. Sldng surface Fg. 6. Schematc model of an deal LFR. (, ) = s x t t gv t 1 1 (10) The swtchng functon (10) results n a dscontnuous control acton as a functon of the sldng surface. u t 0 f s( x, t) > 0 = 1 f s( x, t) < 0 (11) Ths swtchng law s the responsble of nducng a sldng regme on the swtchng surface theoretcally at an nfnte frequency. In practce, a hysteretc wndow s ntroduced n the comparator to lmt the maxmum value of the swtchng frequency. Fgure 8 llustrates a LFR based on a sem-brdgeless boost rectfer operatng at varable swtchng frequency. Apart from the sldng-mode regulaton loop, a logc block that depends on the sgn of the nput voltage v AC has been added for two dfferent reasons. Frstly, to enable the swtchng of only one of the MOSFETs durng each half lne cycle and, secondly, to use only one sldng surface to control both boost converters. In ths case the proposed sldng surface s the followng: s x t = t gv t (1), AC AC As depcted n the fgure, to handle MOSFET Q, the swtchng law (11) has to be nverted because sgnals AC (t) and v AC (t) are both negatve durng the negatve half perod of the nput voltage, what changes the sgn of (1). For that reason, control sgnals have to be: The sldng surface s the core of the sldng-mode control and t wll determne the behavor of the controlled varable. It s mandatory that the controlled varable has to be a contnuous functon n order to mplement sldng-mode control on t. Bascally, snce our objectve s to synthesze a LFR, the sldng surface s(x,t) has to be chosen as shown n Fg. 7. 1 g Σ s( x, t) 1 Σ g vac ( t ) u t w( t ) Fg. 7. Block dagram of a sldng LFR based on a DC-DC swtchng converter. Fg. 8. Block dagram of the sldng LFR based on a sem-brdgeless rectfer.
u u 1 u f v AC f v < AC f v > AC u f v AC = = 0 0 0 0 > 0 < 0 (13) In turn, t has to be ponted out that AC (t) nput current s postve wth respect to nductor L durng the negatve half perod of the nput voltage and, for that reason, (1) can be rewrtten as follows n terms of the state varable Ln (t): s x t = t gv t, (14), Ln n where has been defned n (). Fnally, the gradent of the sldng surface s s x, t s x, t s( x, t) = = 1 0 t v t Ln Co B. Equvalent control [ ] (15) Next step s to calculate the equvalent control u eq (t) that s defned as the smooth control law that deally constrans the state trajectores on the swtchng surface once t s reached. It s calculated as u eq (, ), Ax (, ), Bx s x t + δ = (16) s x t + γ where <a,b> stands for the scalar product of a and b. The equvalent control s bounded by the maxmum and mnmum values of u n (t) 0 < u < 1 (17) eq A necessary condton for the exstence of sldng motons on the swtchng surface s the transversalty condton that s s x, t, Bx t + γ 0 (18) In ths case, t can be demonstrated that (, ), Bx v Co s x t + γ = (19) so that the transversalty condton s accomplshed provded that the output voltage s dfferent from 0. Moreover, L 1 s( x, t), Ax + δ = ( vco vn ) (0) L Thus u eq n n vn = 1 (1) v Co whch s the same than the u eq (t) obtaned n a boost converter. In order to satsfy condton (17), the output voltage has to be hgher than the nput voltage. It s mportant to remark that, despte the exstence of two control sgnals, the combnaton of both of them generates the exstence of only one u eq (t). C. Ideal Sldng Dynamcs Analyss When the system s n sldng-mode regme,.e. s(x,t)=0, ths mples that Ln (t)=gv n (t) and, n consequence, the dynamcs of the system can be expressed as follows when substtutng u n (t)=u eq (t) and mposng the condton s(x,t)=0 n (6). Ln = 0 1 gv t v t () n Co vco = C v t R o Co o As we can see n () the order of the system has been reduced from to 1. D. Equlbrum pont The equlbrum pont of the system (X * ) can be deduced from the mposed current by the sldng-mode and the reduced dynamcs (). * Ln V = gv = n r n v = V gr = V * Co n o n R r o (3) It has to be ponted out that the equlbrum pont represents the root mean square (rms) value of the varables n steadystate regme, so that, V n stands for the rms value of the lne voltage V AC. In addton, the transferred output power to the load wll be Vn P = V g = o n (4) r as expected from a POPI system. E. Stablty analyss By defnng z t = v t, (5) Co equaton () becomes o C z t Equvalently, o C z t z t = gvn R z + = gv R o n o (6), (7)
whch corresponds to a stable system (bounded nput, bounded output) because ts natural response has a pole at -/R o C o and the nput sgnal gv n (t) s bounded. Therefore, v z Co the system descrbed by () s stable. = s bounded, ths mplyng that IV. APPLICATION TO POWER FACTOR CORRECTION In order to valdate the prevous analyss, a syntheszed SLFR pre-regulator for PFC has been smulated usng the PSIM package and mplemented afterwards. The detals of the mplemented sensng and controller crcuts are gven n Fg. 9. As t can be seen n Fg. 9.a, a Hall effect sensor generates the current sgnal AC sensed (t) that s proportonal to AC (t), whle two voltage dvders have been placed at the nput termnals of the sem-brdgeless rectfer to generate two dfferent voltage sgnals v A (t) and v B (t). Besdes, sgnals u 1 (t) and u (t) stand for the control sgnals of the two MOSFETs of the system. Each boost-cell of the converter s actvated dependng on the sgn of nput voltage v AC (t), whch s determned by the comparson of both sgnals v A (t) and v B (t) as llustrated n Fg. 9.b. One NOT and two AND logc gates generate sgnals u 1 (t) and u (t) from sgnals u(t) and u as defned n (13). The scheme of the hysteretc controller s depcted n Fg. 9.c n whch an analogue multpler and dfferent operatonal amplfers have been ntroduced to generate the swtchng functon s(x,t). On one hand, multpler AD633 generates the current reference from both sgnals g ext and v AC sensed (t), the latter beng obtaned by the dfferental amplfer U 3. Note that sgnal g ext determnes the power that the system has to absorb from the grd and, for that reason, t has been ntroduced to the system wth an external power supply to be adjusted manually. On the other hand, sgnal AC sensed (t) crculates through resstor R s to generate a voltage sgnal proportonal to the nput current AC (t). The swtchng functon s(x,t) s calculated by the dfferental amplfer U 6 and ntroduced to comparators U 7 and U 8 that also receve the hysteress bounds -H and H. These sgnals have been adjusted to -1 V and 1 V respectvely for all operaton condtons. In order to generate control sgnals u(t) and u( t ), the output of comparator U 7 s connected to the SET nput of flp-flop MC1407, and the output of comparator U 8 to ts RESET nput. The expermental prototype s depcted n Fg. 10 and the man components are lsted n TABLE II. Two dfferent types of dodes have been used, SC dodes for D 1 and D and fast recovery slcon based dodes for D A and D B. The use of SC technology for dodes D 1 and D allows of reachng hgher effcences n the rectfer because of the reduced reverse recovery charge of SC dodes, what mples lower swtchng losses. TABLE II POWER ELECTRONIC COMPONENTS OF THE SEMI-BRIDGELESS BOOST CONVERTER PROTOTYPE Devce Part # / Value # of devces Fast SC Dode IDH10SG60C MOSFET IPW60R160C6 Regular Dode STTH6004W Inductor 77110-A7 / 60 µh Capactor B43501A6157M / 150 µf Drver MCP1407 Current Transducer LA5-NP 1 180 kω v A(t) 1 kω LA5-NP AC sensed(t) + v AC (t) 180 kω v B(t) 1 kω - AC (t) Sem-brdgeless Boost Converterbased PFC u 1 (t) u (t) Load c) Fg. 9. Input current and nput voltage sensng components of the sem-brdgeless boost rectfer. Boost-cell selector. c) Hysteretc controller.
Fg. 10. Complete prototype of the sem-brdgeless rectfer. All the smulated and expermental results have been carred out under the European standard condtons: an nput voltage of 30 V rms and a lne frequency of 50 Hz. Frst group of results corresponds to the nomnal operaton condtons, consderng that both nductors present the same nductance value, whereas the second group llustrates the system operaton when the two nductors becomee unbalanced. Fgure 11 depcts the steady-state response of the system when t operates at full output power,.e. 1 kw. Fgure 11.a corresponds to the PSIM smulaton whle Fg. 11.b corresponds to the expermental results. It can be seen n both fgures how nput lne voltage v AC and lne current AC are n phase, mplyng that a hgh power factor s acheved. The test condtons of ths experment are detaled n TABLE III, where the control parameter r determnes the absorbed nput power from the AC grd. It has to be ponted out that the swtchng frequency of the system s varable and depends on both operaton pont and hysteress wdth [5,6]. Consderng the parameters shown n TABLE III, the measured swtchng frequency les n the regon from 5 khz to 70 khz. TABLE III TEST CONDITIONS OF THE SEMI-BRIDGELESS BOOST CONVERTER AT FULL POWER OPERATION Parameter Emulated nput resstance Output Voltage Output Load Output Power Symbol r v Co R o P o Value 51.79 Ω 40 V (average) 176.4 Ω 1 kw Moreover, Fg. 1 depcts how the current flows through each nductor alternatvely every half lne cycle perod of the nput voltage v AC. As n the prevous case, the frst pcture corresponds to the smulaton and the second one has been taken expermentally also at 1 kw of rated output power. Once agan, smulated and expermental results are n good agreement. As expected, all the nput lne current crculates through nductor L 1 durng the postve half perod of v AC, whle t crculates through L durng the negatve half perod. However, as aforementoned, not all the lne current returns through dodes D A and D B because a slght part of the current returns through the body dode of the nactve MOSFET and ts correspondng nductor, as t can be notced n the fgure. Fg. 11. Steady-state response of SLFR-based pre-regulator: smulaton and expermental results. CH1: lne current AC (5 A/dv). CH: lne voltage v AC (100 V/dv). CH3: output capactor voltage v Co (100 V/dv, 4 ms/dv). Fg. 1. Steady-state response of the SLFR-based pre-regulator: smulaton and expermental result.ch1: nductor current L1 ( A/dv). CH: nductor current L ( A/dv, 4 ms/dv).
For example, when v AC s postve, the lne current returns to the AC mans through dode D A and the path confgured by the body dode of MOSFET Q and nductor L. And the other way round for the negatve half perod. In order to obtan a correct smulaton, the parastc parameters of the components have to be taken nto account. In partcular, an approxmated value of the followng parameters have been ntroduced n the smulaton: seres resstance and threshold voltage of dodes D A and D B, threshold voltage of body dodes of MOSFETS Q 1 and Q and seres resstance of nductors L 1 and L. The SLFR-based PFC has been subjected to perodc step perturbatons of the output load from 5.6 Ω to 177.8 Ω every 00 µs and the correspondng smulaton and expermental results are llustrated n Fgs. 13.a and 13.b respectvely. It can be observed that the average nput power remans constant because the absorbed lne current s not affected by the load perturbaton. In turn, the output voltage vares proportonally to the load changes as t can be expected n a LFR POPI crcut. The test condtons of ths experment are summarzed n TABLE IV. As a consequence of the change n the coordnate of the equlbrum correspondng to the output voltage, the swtchng frequency becomes slghtly reduced and, for that reason, two dfferent values of the output power are obtaned for each load condtonn [5]. Power factor (PF) and total harmonc dstorton (THD) have been measured wth a 360-AMX Pacfc AC Power Source. The prototype s effcency n turn has been measured wth a PM6000 Voltech Unversal Power Analyzer for dfferent power operaton condtons rangng from 300 W to 1 kw (Fg. 14) and for 40 V of output voltage wthout takng nto account the controller and drver s power consumpton. It TABLE IV TEST CONDITIONS OF THE SEMI-BRIDGELESS BOOST CONVERTER SUBJECTED TO OUTPUT LOAD PERTURBATIONS Parameter Emulated nput resstance Output Voltage Range Output Load Output Power P o1 (wth load R o1 ) P o1 (wth load R o ) can be observed n Fg. 14..a that the THD s reduced when the output power s ncreased because bascally the rms value of the nput current s hgher that ts hgh-frequency rpple. It s mportant to remark thatt the nductor current rpple s determned by the hysteress wdth whch does not depend on the power operatng pont. Hence, nductor current rpple wll be constant all tme f the hysteress wdth s constant. It can also be noted that the PF ncreases wth the ncrement of the output power as can be expected. On the other hand, as expected, the sem-brdgelesss boost rectfer presents a better THD (%) 50 40 30 0 THD Symbol r v Co R o1 R o PF Value 77.38 Ω 347 V 410 V (average) 177.8 Ω 5.6 Ω 677 W 665 W 1 0,98 0,96 0,94 PF 10 0,9 0 00 400 600 800 1000 Output Power [W] 0,9 99 98 Effcency (%) 97 96 95 Sem-brdgeless Boost Rectfer Conventonal Boost Rectfer Fg. 13. Transent response of the LFR-based pre-regulator to a step perturbaton of the output load from 5.6 Ω to 177..8 Ω and to 5.6 Ω: smulaton and expermental results. CH1: AC (5 A/dv). CH: v AC (100 V/dv). CH3: v Co (100 V/dv, 40 ms/dv). 94 00 400 600 800 1000 Output Power [W] Fg. 14. THD and PF versus output power n the sem-brdgeless rectfer, Measured effcency versus output power n both sem- boost brdgeless and conventonal rectfers.
effcency than a conventonal PFC wth an nput dode brdge (PB3006) under the same operatng condtons (Fg. 14.. Whle the effcency of the sem-brdgeless prototype reaches a peak of 98 %, the correspondng peak of a conventonal boost rectfer only reaches a 96.5 %. In case of two unbalanced nductors, the sem-brdgeless boost rectfer generates a DC component n the absorbed current from the grd dependng on the appled control technque, e.g., the valley current-mode control technque n CCM. Fgure 15.a llustrates two smulated nput grd current waveforms ( AC1 and AC ) whch have been obtaned from a sem-brdgeless boost rectfer consderng that nductor L presents a 15% more nductance than L 1,.e. L 1 =60 µh and L =713 µh. Current AC1 s controlled by a valley current- AC results from the applcaton mode control whereas current of SMC. As t can be observed n Fg. 15.b, n the frst case, the nductor currents have dfferent current rpples due to the dfference n ther nductance value, whereas n the second case, both nductor current rpples become equal. Fgure 15.c depcts the correspondng harmoncs of smulated lne currents. As t can be seen, both cases meet the harmonc lmts determned by standard regulaton IEC 61000-3- for Class A equpment. However, the dfference n nductor current rpple ( L1 L ) generated by the frst control tech- 0,8 c) Ampltude [A rms] 0,7 0,6 0,5 0,4 0,3 0, DC component 3 rd harmonc IEC 61000-3- Class A AC1 Valley Current Mode Control AC Sldng Mode Control c) IEC 61000-3- Class Fundamental harmonc 3 rd harmonc 0,1 0 0 4 6 8 10 1 14 16 18 0 4 6 8 30 3 34 36 38 40 Harmonc number Fg. 15. Valley Current-Mode (VCM) controlled lne current AC1 and lne current AC usng SMC (5 A/dv, 4 ms/dv) wth dfferent nductors. Inductor currents L1 and L usng VCM control and SMC control (.5 A/dv, 4 ms/dv). c) Low frequency harmoncs spectrum of AC1 and AC. Fg. 16. Steady-state expermental response of LFR-based pre-regulator wth unbalanced nductors usng sldng-mode control. nductor current L1 ( A/dv). CH: nductor current L ( A/dv, 4 ms/dv). Lne current AC ( A/dv, 10 ms/dv). c) Low frequency harmoncs spectrum of lne current AC (50 ma rms/dv, 500 Hz/dv) and IEC 61000-3- Class A lmts.
nque results n a DC component n the case of AC1. In addton, the constant frequency operaton produces the hgh ampltude of 3 rd harmonc due to the output voltage rpple. On the other hand, SMC s capable to ensure the symmetry of AC avodng the exstence of both DC component and 3 rd harmonc. However, SMC produces the emergence of other low frequency harmoncs wth lttle ampltude. Fgure 16 llustrates the steady-state operaton of the LFR under SMC wth the test condtons of TABLE III but havng two unbalanced nductors wth a dfference of a 15% of ther nductance value. It can be observed n Fg. 16.a that both nductor currents have the same rpple ampltude ensurng the symmetry of lne current despte presentng a dfference n ther nductance values (Fg. 16.. In addton, the scope shows that the mean value of lne current s approxmately zero, what mples that the pre-regulator s not absorbng any DC current from the grd. As t can be observed n Fgure 16.c, harmoncs ampltude of lne current of Fg. 16.b are n accordance wth the theoretcal predctons and they meet the lmts defned by the IEC 61000-3- Class A regulaton. V. CONCLUSIONS In ths work, a LFR based on a sem-brdgeless boost rectfer has been syntheszed usng sldng-mode control wth only one sldng control surface that uses the contnuous-tme sgnal of the nput current sensed by a Hall effect sensor. The applcaton of sldng-mode control ensures the whole system stablty at the same tme that reduces the order of the system to a 1 st order system. Moreover, t has been demonstrated that the mplementaton of sldng-mode control by means of hysteretc comparators s capable to mtgate the harmful consequences of havng two unbalanced nductors,.e. dfferent current rpples for each half-lne cycle and the njecton of a DC component to the absorbed lne current. It has been also seen that the mplementaton of SMC results n the reducton of the 3 rd harmonc ampltude. The expected theoretcal predctons and the feasblty of the rectfer have been valdated by dfferent expermental results whch have been obtaned from a 1 kw prototype n whch SC dodes have been ncluded. However, t has to be remarked that the sem-brdgeless boost converter presents a lower achevable power densty than other rectfer topologes due to the exstence of two boost-cells that operate alternatvely each half-lne cycle. Further research contemplates a comparatve study n terms of sze, effcency and thermal performance wth respect to other PFC crcuts desgned to work at a lower swtchng frequency n order to acheve a hgher effcency. REFERENCES [1] Lmts for Harmonc Current Emssons (Equpment Input Current 16 A Per Phase), IEC 61000-3-, Part 3-, 005. [] M. Matsuo, K. Matsu, L. Yamamoto and F. Ueda, "A Comparson of Varous DC-DC Converters and ther Applcaton to Power Factor Correcton, n 6th Annual Conference of the IEEE Industral Electroncs Socety (IECON), 000, vol., pp. 1007-1013. [3] O. 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Sung, "Comparatve Performance Analyss of Hgh Densty and Effcency PFC Topologes," IEEE Transactons on Power Electroncs, vol. 9, pp. 666-679, June, 014. [14] X. Lu, Y. Xe, L. Cheng, Z. Wang and C. Gu, "Sem-brdgeless Boost PFC Rectfer for Wde Voltage Input Range based on Voltage Feed-forward Control," n 7th Internatonal Power Electroncs and Moton Control Conference (IPEMC), 01, pp. 1894-1899. [15] F. F. Judd and C.-t. Chen, "On the Performance and Desgn of Self- Oscllatng DC-to-DC Converters," IEEE Transactons on Industral Electroncs and Control Instrumentaton, vol. IECI-19, no. 3, pp. 89-97, August, 197. [16] J. A. Barrado, A. El Aroud, H. Valderrama-Blav, J. Calvente and L. Martnez-Salamero, "Analyss of a Self-Oscllatng Bdrectonal DC-DC Converter n Battery Energy Storage Applcatons," IEEE Transactons on Power Delvery, vol. 7, no. 3, pp. 19-1300, July, 01. [17] V. Utkn, J. Guldner and J. Sh, Sldng mode control n electromechancal systems, CRC Press, nd edton, Taylor and Francs Group, 009. [18] S. Snger, "Realzaton of loss-free resstve elements," IEEE Transactons on Crcuts and Systems, vol. 37, pp. 54-60, January, 1990. [19] A. Cd-Pastor, L. Martnez-Salamero, A. El Aroud, R. Gral, J. Calvente and R. Leyva, "Synthess of loss-free resstors based on sldng-mode control and ts applcatons n power processng," Control Engneerng Practce, vol. 1, no. 5, May, 013. [0] F. Flores-Bahamonde, H. Valderrama-Blav, L. Martínez-Salamero, J. Maxé-Altés and G. García, Control of a three-phase AC/DC VIENNA converter based on the sldng mode loss-free resstor approach, IET Power Electroncs, vol. 7, no. 5, pp. 1073-108, May, 014. [1] R. Haroun, A. Cd-Pastor, A. El Aroud and L. Martnez-Salamero, "Synthess of Canoncal Elements for Power Processng n DC Dstrbuton Systems Usng Cascaded Converters and Sldng-Mode
Control," IEEE Transactons on Power Electroncs, vol. 9, no. 3, pp. 1366-1381, March, 014. [] R. Haroun, A. El Aroud, A. Cd-Pastor, G. Garca, C. Olalla and L. Martnez-Salamero, "Impedance Matchng n Photovoltac Systems Usng Cascaded Boost Converters and Sldng-Mode Control," IEEE Transactons on Power Electroncs, DOI: 10.1109/TPEL.014.339134. [3] A. Marcos-Pastor, E. Vdal-Idarte, A. Cd-Pastor and L. Martnez- Resstor based on a Salamero, "Synthess of a Sldng Loss-free Sem-brdgeless Boost Rectfer for Power Factor Correcton Applcatons," n 39th Annual Conferencee of the IEEE Industral Electroncs Socety (IECON), 013, pp. 1343-1348. [4] L. Bng, R. Brown and M. Soldano, "Brdgeless PFC mplementaton usng one cycle control technque," n 0th Annual IEEE Appled Power Electroncs Conference and Exposton (APEC), 005, vol., pp. 81-817. [5] O. López-Santos, L. Martínez-Salamero, G. García, H. Valderrama- of a sldng-mode Blav and D. O. Mercur, Effcency analyss controlled quadratc boost converter, IET Power Electroncs, vol. 6, no., pp. 364-373, February, 013. [6] O. López-Santos, L. Martínez-Salamero, G. García, H. Valderrama- Control Desgn Blav and T. Serra-Polanco, Robust Sldng-Mode for a Voltage Regulated Quadratc Boost Converter, IEEE Transactons on Power Electroncs, DOI: 10.1109/TPEL.014.35066. Adra Marcos-Pastorr receved the Ingenero Técnco Industral en Electrónca Industral and Ingenero en Automátca y Electrónca Industral graduate degrees from the Unverstat Rovra Vrgl, Tarragona, Span, n 009 and 011 respectvely. He also receved the M.S. degree n Electroncs Engneerng n 01 and the nter-unversty postgraduate degree n Unversty Teachng n 014 from the same Unversty where he s currently workng towards hs Ph.D. degree. He worked as a research engneer n the feld of autonomous robotcs n m-bot Solutons S.L., a spn-off of Unverstat Rovra Vrgl n 010-011. Snce 011 he s a member of the research group on Industral Electroncs and Automatc Control of the same Unversty where he has worked as lecture assstant n 011-013. Hs research nterests on power electroncs are n the feld of power factor correcton applcatons and power condtonng for electrc vehcles and renewable energy systems. Enrc Vdal-Idarte (S 97 M 04) receved the Lcencado en Informatca degree and the Ph.D. degree from the Unverstat Poltècnca de Catalunya (UPC), Barcelona, Span, n 1993 and 001, respectvely. He s currently an Assocate Professor wth the Department of Electroncs, Electrcal Engneerng and Automatc Control (DEEEA), Techncal School of Engneerng (ETSE), Rovra Vrgl Unversty (URV), Tarragona, Span, where he s workng n the feld of dgtal and robust control of power converters. He s member of the GAEI research group on Industral Electroncs and Automatc Control, whose man research felds are power condtonng for vehcles, satelltes, and renewable energy. Angel Cd-Pastor (M 07) graduated as Ingenero en Electrónca Industral n 1999 and as Ingenero en Automàtca y Electrónca Industral n 00 at Unverstat Rovra Vrgl, Tarragona, Span. He receved the M.S. degree n desgn of mcroelectroncs and mcrosystems crcuts n 003 from Insttut Natonal des Scences Applquées, Toulouse, France. He receved the Ph.D. degree from Unverstat Poltècnca de Catalunya, Barcelona, Span, and from Insttut Natonal des Scences Applquées, LAAS-CNRS Toulouse, France n 005 and 006, respectvely. He s currently an Assocated Professor at the Departament d Engnyera Electrònca, Elèctrca Automàtca, Escola Tècnca Superor d Engnyera, Unverstat Rovra Vrgl, Tarragona, Span. Hs research nterests are n the feld of power electroncs and renewable energy Systems. Lus Martínez-Salamero receved the Ingenero de Telecomuncacón degree n 1978 and the Ph.D. degree n 1984, both at the Unversdad Poltécnca de Cataluña, Barcelona, Span. From 1978 to 199, he taught crcut theory, analog electroncs and power processng at the Escuela Técnca Superor de Ingeneros de Telecomuncacón de Barcelona, Barcelona, Span. From 199 to 1993, he was a vstng professor at the Center for Sold State Power Condtonng and Control, Department of Electrcal Engneerng, Duke Unversty, Durham, NC. From 003 to 004 and 010 to 011, he was a vstng scholar at the Dvson of Power Devces and Power Integraton of the Laboratory of Archtecture and Systems Analyss (LAAS), Natonal Agency for Scentfc Research (CNRS), Toulouse, France. Snce 1995 he has been a full professor wth the Department t of Electrcal Electronc and Automatc Control Engneerng, School of Electrcal and Computer Engneerng, Rovra Vrgl Unversty, Tarragona, Span, where he s the drector of the Research Group n Industral Electroncs and Automatc Control (GAEI). Hs research nterests nclude structure and control of power condtonng systems, namely, electrcal archtecture of satelltes and electrc vehcles, as well as nonlnear control of converters and drves, and power condtonng for renewable energy. Dr. Martínez-Salamero has publshed a large number of papers n scentfc journals and conference proceedngs n the felds of modellng, smulaton, and control of power converters, and holds a U.S. patent on dual voltage electrcal dstrbuton n vehcles. He was guest edtor of the IEEE Transactons on Crcuts and Systems Specal Issue on Smulaton, Theory and Desgn of Swtched-Analog Networks (Aug. 1997). He organzed n cooperaton wth the European Space Agency (ESA) the 5th European Space Power Conference (ESPC-98) n Tarragona and served durng two terms (1996-00) as a dean of the School of Electrcal and Computer Engneerng. He was presdent of Spansh Jont Chapter of the IEEE Power Electroncs and Industral Electroncs Socetes from 005 to 008, and dstngushed lecturer of the IEEE Crcuts and Systems Socety n the perod 001-00. He s currently dstngushed professor of Rovra Vrgl Unversty.