i- Line Photoresist Development: Replacement Evaluation of OiR

Similar documents
(ksaligner & quintel resolution)

Major Fabrication Steps in MOS Process Flow

Critical Dimension Enhancement of DUV Photolithography on the ASML 5500/300. Francesca Calderon Miramonte High School August 13th, 2015

Part 5-1: Lithography

Semiconductor Manufacturing Technology. Semiconductor Manufacturing Technology. Photolithography: Resist Development and Advanced Lithography

Process Optimization

Photolithography Technology and Application

DOE Project: Resist Characterization

Photolithography I ( Part 1 )

Lecture 7. Lithography and Pattern Transfer. Reading: Chapter 7

Outline. 1 Introduction. 2 Basic IC fabrication processes. 3 Fabrication techniques for MEMS. 4 Applications. 5 Mechanics issues on MEMS MDL NTHU

PHGN/CHEN/MLGN 435/535: Interdisciplinary Silicon Processing Laboratory. Simple Si solar Cell!

Device Fabrication: Photolithography

immersion optics Immersion Lithography with ASML HydroLith TWINSCAN System Modifications for Immersion Lithography by Bob Streefkerk

KMPR 1010 Process for Glass Wafers

Contrast Enhancement Materials CEM 365HR

Applications of Maskless Lithography for the Production of Large Area Substrates Using the SF-100 ELITE. Jay Sasserath, PhD

William Reiniach 5th Year Microelectronic Engineering Student Rochester Institute of Technology

+ Preferred material for tool O Acceptable material for tool X Unacceptable material for tool

Module 11: Photolithography. Lecture11: Photolithography - I

Section 2: Lithography. Jaeger Chapter 2 Litho Reader. The lithographic process

Contrast Enhancement Materials CEM 365iS

Section 2: Lithography. Jaeger Chapter 2. EE143 Ali Javey Slide 5-1

MICRO AND NANOPROCESSING TECHNOLOGIES

Section 2: Lithography. Jaeger Chapter 2 Litho Reader. EE143 Ali Javey Slide 5-1

EE143 Fall 2016 Microfabrication Technologies. Lecture 3: Lithography Reading: Jaeger, Chap. 2

Obducat NIL 6. Nanoimprinting with NRF s NIL 6

Dr. Dirk Meyners Prof. Wagner. Wagner / Meyners Micro / Nanosystems Technology

Lecture 13 Basic Photolithography

The End of Thresholds: Subwavelength Optical Linewidth Measurement Using the Flux-Area Technique

Development of a LFLE Double Pattern Process for TE Mode Photonic Devices. Mycahya Eggleston Advisor: Dr. Stephen Preble

MICROBUMP CREATION SYSTEM FOR ADVANCED PACKAGING APPLICATIONS

Optolith 2D Lithography Simulator

THE USE OF A CONTRAST ENHANCEMENT LAYER TO EXTEND THE PRACTICAL RESOLUTION LIMITS OF OPTICAL LITHOGRAPHIC SYSTEMS

CHAPTER 2 Principle and Design

Lithographic Process Evaluation by CD-SEM

MEMORANDUM. This is a summary of the activities and projects that I was involved in during 2009.

AZ 1512 RESIST PHOTOLITHOGRAPHY

FINDINGS. REU Student: Philip Garcia Graduate Student Mentor: Anabil Chaudhuri Faculty Mentor: Steven R. J. Brueck. Figure 1

Microlens formation using heavily dyed photoresist in a single step

Chapter 3 Fabrication

2 Integrated Circuit Manufacturing:

UV LED ILLUMINATION STEPPER OFFERS HIGH PERFORMANCE AND LOW COST OF OWNERSHIP

Positive-Tone Photosensitive Polyimide Coatings for Lens Layer in image sensors. Introduction of the characteristic of CS-series

Chapter 6. Photolithography

Photolithography II ( Part 2 )

CMOS Digital Integrated Circuits Lec 2 Fabrication of MOSFETs

MeRck. nlof 2000 Series. technical datasheet. Negative Tone Photoresists for Single Layer Lift-Off APPLICATION TYPICAL PROCESS

UFNF YES Image Reversal & HMDS Oven Revision 6.0 1/22/2014 Page 1 of 5. YES Image Reversal and HMDS Oven SOP

Photoresist Absorbance and Bleaching Laboratory

Module - 2 Lecture - 13 Lithography I

Lithography Is the Designer s Brush. Lithography is indispensible for defining locations and configurations of circuit elements/functions.

DIY fabrication of microstructures by projection photolithography

Lithography. 3 rd. lecture: introduction. Prof. Yosi Shacham-Diamand. Fall 2004

Chapter 6 Photolithography

Fabrication of suspended micro-structures using diffsuser lithography on negative photoresist

Semiconductor Technology

EE 143 Microfabrication Technology Fall 2014

MeRck. AZ nlof technical datasheet. Negative Tone Photoresist for Single Layer Lift-Off APPLICATION TYPICAL PROCESS. SPIN CURVE (150MM Silicon)

Module 11: Photolithography. Lecture 14: Photolithography 4 (Continued)

College of Engineering Department of Electrical Engineering and Computer Sciences University of California, Berkeley

Low-power carbon nanotube-based integrated circuits that can be transferred to biological surfaces

32nm High-K/Metal Gate Version Including 2nd Generation Intel Core processor family

Technology for the MEMS processing and testing environment. SUSS MicroTec AG Dr. Hans-Georg Kapitza

Photolithography. References: Introduction to Microlithography Thompson, Willson & Bowder, 1994

Integrated Focusing Photoresist Microlenses on AlGaAs Top-Emitting VCSELs

A BASIC EXPERIMENTAL STUDY OF CAST FILM EXTRUSION PROCESS FOR FABRICATION OF PLASTIC MICROLENS ARRAY DEVICE

This writeup is adapted from Fall 2002, final project report for by Robert Winsor.

From Sand to Silicon Making of a Chip Illustrations May 2009

A study on the fabrication method of middle size LGP using continuous micro-lenses made by LIGA reflow

Soft Electronics Enabled Ergonomic Human-Computer Interaction for Swallowing Training

OPC Rectification of Random Space Patterns in 193nm Lithography

BI-LAYER DEEP UV RESIST SYSTEM. Mark A. Boehm 5th Year Microelectronic Engineering Student Rochester Institute of Technology ABSTRACT

FOTECAP TOPAZ (4100 Series) Diazo standard capillary film

Key Photolithographic Outputs

SUSS Mask Aligner. Purpose: To expose photoresist on a wafer using a photomask

Advanced Packaging Solutions

ECSE 6300 IC Fabrication Laboratory Lecture 3 Photolithography. Lecture Outline

Surface Topography and Alignment Effects in UV-Modified Polyimide Films with Micron Size Patterns

Nanomanufacturing and Fabrication

Project Staff: Feng Zhang, Prof. Jianfeng Dai (Lanzhou Univ. of Tech.), Prof. Todd Hasting (Univ. Kentucky), Prof. Henry I. Smith

Nanomanufacturing and Fabrication By Matthew Margolis

Optical Issues in Photolithography

Optical Lithography. Keeho Kim Nano Team / R&D DongbuAnam Semi

Heidelberg µpg 101 Laser Writer

Copyright 1997 by the Society of Photo-Optical Instrumentation Engineers.

EG2605 Undergraduate Research Opportunities Program. Large Scale Nano Fabrication via Proton Lithography Using Metallic Stencils

MICROCHIP MANUFACTURING by S. Wolf

Lithography. Taking Sides to Optimize Wafer Surface Uniformity. Backside Inspection Applications In Lithography

KrF EXCIMER LASER LITHOGRAPHY TECHNOLOGY FOR 64MDRAM

Newer process technology (since 1999) includes :

Copyright 2002 by the Society of Photo-Optical Instrumentation Engineers.

Chapter 2 Silicon Planar Processing and Photolithography

Lesson Plan Title Primary Subject Area Grade Level Overview Approximate Duration MA Frameworks Interdisciplinary Connections Lesson Objectives

MICROLITHOGRAPHY 2004

Supplementary Materials for

FABRICATION OF CMOS INTEGRATED CIRCUITS. Dr. Mohammed M. Farag

Wet particle source identification and reduction using a new filter cleaning process

Exhibit 2 Declaration of Dr. Chris Mack

Critical dimension sensitivity to post-exposure bake temperature variation in EUV photoresists

Transcription:

i- Line Photoresist Development: Replacement Evaluation of OiR 906-12 Nishtha Bhatia High School Intern 31 July 2014 The Marvell Nanofabrication Laboratory s current i-line photoresist, OiR 897-10i, has been discontinued, and in order to maintain i-line lithography, a new resist has to be qualified. To this end, we report the development of optimal coat programs using OiR 906-12 photoresist on the svgcoat1 and subsequent characterization of resulting photoresist profiles. The measurements and data regarding photoresist thickness following different steps of the photolithography process (coat, softbake, development, hardbake or UV bake) have been recorded and presented, along with coat recipes. Images from the LEO scanning electron microscope have been included to display satisfactory resolved features of the photoresist at different thicknesses. Ultimately, the goal of this report is to summarize the findings of the OiR 906-12 photoresist qualification process, as well as discuss and analyze their results, in order to make a seamless transition to it. I. INTRODUCTION A. Background Information Abstract: Photolithography is the process of transferring geometric shapes on a mask or reticle to a thin film of photoresist on the surface of a substrate, typically a silicon wafer. It is comprised of several different steps. First, the wafers to be used in the process are chemically cleansed in order to remove any particulate matter on their surface. This often includes traces of organic, ionic, and metallic impurities that can often create unwanted defects and interfere with achieving a uniform photoresist coating. Once the silicon wafer has been properly cleaned, photoresist can be applied to it. Photoresist is a photosensitive liquid polymer that chemically changes when exposed to light. The most common application technique, called spin coating, involves high-speed centrifugal spinning to apply photoresist films at a targeted thickness. There is an indirect relationship between spin speed and photoresist coat thickness; the slower the spin speed is, the thicker the photoresist coat will be. Following the photoresist application, the wafers undergo soft baking. During this step of the photolithography process, almost all solvents are removed from the photoresist film. The resulting film is photosensitive meaning it will react chemically to light. Before the silicon wafers can be exposed, mask alignment must take place. A mask, also known as a photomask or reticle is a square glass plate with a patterned metal film on one side. During this step of the process, the mask is aligned with the wafer so that the pattern has the ability to be transferred, and has correct overlay with existing layers on the wafer. Once aligned, the photoresist-coated wafers are exposed with high intensity UV light. The wavelength of light at the i-line is 436 nm. The resist solubility in the photoresist developer increases until it becomes completely soluble this occurs at a threshold.

Positive photoresist is commonly used in the Marvell Nanofabrication Laboratory. When this type of resist is exposed to ultraviolet (UV) light, the chemical structure of the resist changes so that it is more soluble in a developer solution. The developer ultimately dissolves away the exposed resist leaving windows of the bare, underlying material. The mask has the exact copy of what appears on the wafer. Finally, the wafers are hard baked (or in some cases, UV baked). Hard baking densifies the photoresist further, and improves adhesion of the photoresist to the wafer surface. [1] B. Project Background This project has been carried out to qualify the 906-12 OiR resist. It was designed to find optimal conditions that will consistently produce standardized 1.2, 1.7, 2.1, and 2.8 µm films of resist and to resolve 0.7 µm, or better, lines and spaces. The main objective of the project was to qualify the 906-12 OiR i-line photoresist in order to make a seamless switch towards standardizing it as the new i-line resist at the Marvell Nanofabrication Laboratory. II. EXPERIMENTAL A. Experimental Setup This experiment makes use of seven different tools: nanospec, prime oven, svgcoat1, gcaws6, svgdev1, the UV Bake, and the LEO scanning electron microscope. What follows is a brief explanation of each piece of equipment s role. The nanospec is used to take measurements of the photoresist thickness at different steps throughout the procedure, including pre-development, post development, post hard baking, and post UV baking. The film thickness of the wafer is calculated based on the interference spectra generated when the light from the nanospec passes through the film on the wafer. Measurements are taken throughout the process to gauge accuracy in attaining the targeted 1.2, 1.7, 2.1, and 2.8 µm film thicknesses, as well as to compare thickness lost following the different steps of photolithography. The prime oven uses HMDS (as wet chemistry) to modify the surface chemistry of the wafers. Priming reduces the water content on the wafer surface, helping photoresist adhere to its surface, once applied. Svgcoat1 is used to dispense photoresist onto 6-inch Si wafers through the spin coat technique previously discussed. After the coat, this tool performs the soft bake process on wafers in order to prepare them for exposure. For this experiment, the parameters of svgcoat1 were modified to hand dispense 906-12 OiR photoresist, by adjusting the SPIN operation in event 3 to DSP1 for all but the 2.8 µm thick film. Once the switch is officially made to the new photoresist, these modifications to the programs will not be necessary because the resist will be automatically dispensed. Gcaws6 is a fully automated reduction step and repeat camera (stepper). It is capable of projecting sub-micron feature sizes as small as 0.7 µm. Alignment is conducted with this tool using the AWH automatic wafer handler. This machine exposes the wafers with the designated focus and exposure values users enter in.

Svgdev1 is where the now primed, photoresist-coated, and exposed wafers are developed. The exposed photoresist from gcaws6 becomes soluble, and is removed with OPD 4262 developer. The patterns that appear are exact copies of the mask used during exposure. For this experiment, 6-inch, p-type, test-grade, Si wafers were used. For each of the targeted 1.2, 1.7, 2.1, and 2.8 µm resist film thicknesses, three wafers were used. One wafer was used to measure resist thickness loss after development and hardbake (not exposed). Another was used to measure resist thickness loss after development and UV bake (not exposed). The third wafer had a test pattern exposed onto it using an ideal focus and exposure time and was later examined with the LEO scanning electron microscope (SEM). For convenience, wafers have been given an ID that corresponds to the target thickness of resist coated on them. B. Experimental Procedure First, we primed the wafers in the prime oven with HMDS, using recipe #2, which lasts for eleven minutes at 90 degrees and 780 torr. Then, we coated the bare wafers with the svgcoat1 track. For the 1.2, 1.7, and 2.1 µm thick wafers, we performed a dynamic dispense of the photoresist according to the spin speeds in Table 1. For the 2.8 µm thick wafers, we had to dispense the photoresist statically. In all cases a pipette was used to manually apply resist. In order to do this, we modified the settings for programs 1, 3, 5, and 7. After coating the wafers, we measured the pre-development photoresist thickness. Following this, we exposed the set of wafers that were to be inspected with the leo SEM (one for each thickness) on gcaws6 with the focus and exposure values summarized in Table 1. These ideal exposure conditions were previously found by using a focus exposure matrix. We then developed wafers in svgdev1 with the standard post exposure bake and development (1,1). Following this, we took measurements of the wafers to monitor any thickness loss that may have occurred. Two wafers were then run through the svgdev1 track once again to be hard baked (Program 1 only, no developer dispense), while the third was put in the UV bake machine. Following this, measurements of the wafers were taken and recorded to, again, gauge thickness lost during the process. Once all the steps were complete, we took the wafers and examined them with the leo SEM to analyze the profile of resolved features. It was important that the observed thickness in the SEM images agreed with that obtained by the nanospec. All the data collected through the findings were recorded in Table 11. C. Development of New Spin Coat Programs on svgcoat1 In order to attain the correct thicknesses with the new, 906-12 i-line photoresist, the spin speeds in Table 1 had to be taken into account to adjust programs on the svgcoat1 track. Table 1: Expected spin speeds to produce targeted photoresist thicknesses in the experiment. These experiment film thickness vs. spin speed values were plotted against the projected, theoretical film thickness vs. spin speed values to create Table 2. ID Target Thickness Svgcoat1 process to Spin speed (µm) modify (rpm) 1 1.2 (1, 1) 4100 2 1.7 (3, 1) 2000 3 2.1 (5, 1) 1300 4 2.8 (7, 4) 820

Table 2: Spin speeds with targeted and actual 906-12 film thickness As the graph reveals, the thicker the desired photoresist film, the slower the spin speed during coating. We modified the coat recipes to dynamically (1.2, 1.7, and 2.1 µm) and manually (2.8 µm) dispense the 906-12 OiR photoresist. For the first three wafers, this only required modifying event 3 to change the dispense operation to the spin operation. However, the 2.8 µm resist film required many more modifications. Although originally run with a modified event 3, we later completely changed programs 4 and 7 to get accurate results. See the Supplemental Materials section for a complete listing of the program tables, both original and modified. III. RESULTS AND DISCUSSION A. 1.2, 1.7, and 2.1 µm All the 1.2, 1.7, and 2.1 µm thick resist coated wafers went through the same process: dynamic dispensed at the speeds reported in Table 1, along with a contact soft bake. After coating the wafers with 1.2, 1.7, and 2.1 µm thick films of 906-12 OiR photoresist, we used the nanospec to take measurements of the actual thickness and compare it with the target. Prior to development, the measurements of the coatings were extremely close to the targeted thicknesses, as summarized in Table 3 below. Table 3: Pre-development photoresist thickness measurements (µm) Target Thickness Top Left Flat Right Center Aver. (µm) 1.2 A 1.1890 1.1881 1.1853 1.1886 1.834 1.1870 1.2 B 1.1759 1.1759 1.1737 1.1752 1.2007 1.1804 1.7 A 1.6938 1.6928 1.6882 1.6879 1.7156 1.6957 1.7 B 1.7454 1.7385 1.7398 1.7412 1.7605 1.7451 2.1 A 2.1013 2.0926 2.0939 2.0987 2.0927 2.0959 2.1 B 2.1279 2.1112 2.1105 2.1146 2.1237 2.1176

The focus and exposure values for the wafers of these 3 thicknesses were chosen after careful analysis of previous focus-exposure matrix experiments. They are shown in Table 4 below. Resist Thickness on Exposure Focus 1.2 µm 1.0-8 1.7 µm 1.2-10 2.1 µm 1.8-10 Table 4: Focus and exposure values for 1.2, 1.7, and 2.1(µm) wafers in this experiment After this, wafers were run through the svgdev1 track with the standard programs (1, 1). Postdevelopment measurements of the 2.1 µm resist coated wafer is summarized in Table 5. As the table shows, there was some thickness lost (approx. 0.11 microns) Table 5: Post-development measurements (µm) Top Left Flat Right Center Aver. 2.1 1.9952 1.9877 1.9915 1.9953 1.9917 1.9923 One set of wafers (one of each thickness - 1.2, 1.7, and 2.1 um) was run through svgdev1 again, this time only receiving a hard bake (not developed) at 120 C for 1 min. The measurements taken post-hard bake are located in Table 6. There was more thickness lost during this step. Table 6: Post Hard Bake Measurements (µm) Top Left Flat Right Center Aver. 1.2 1.248 1.277 1.1229 1.1232 1.1268 1.1250 1.7 1.6014 1.6007 1.599 1.6025 2.6269 1.6063 2.1 1.9829 1.9784 1.9783 1.9817 1.9781 1.9799 Another set of wafers was run through the UV bake. There was no significance between the UV bake and hard bake in terms of thickness loss. Table 7: Post UV Bake Measurements (µm) Proc. Top Left Flat Right Center Aver. 1.2 A 1.1020 1.1202 1.0983 1.1020 1.0976 1.1030 1.7 A 1.6250 1.6186 1.6169 1.6316 1.6359 1.6256 2.1 S 1.9407 1.9328 2.9384 1.9551 1.9522 1.9438 B. 2.8 µm s The 2.8 µm wafer had to have more modifications made to the svgcoat1 program than the other three thicknesses and went through a proximity bake. This was because going through a contact bake left a ghost image of rings on the wafer, as shown in Image 1.

Image 1: The result of doing a contact bake (left) vs. proximity bake (right) on the 2.8 um thick wafer. Prior to development, the measurements of the coatings were extremely close to the desired thicknesses, as summarized in Table 8. Table 8: 2.8 Pre-development measurements (µm) Top Left Flat Right Center Aver. 2.8 A 2.7923 2.8350 2.8379 2.8038 2.8166 2.8170 2.8 B 2.9112 2.8946 2.8410 2.8487 2.8780 2.8747 We were able to accurately achieve the measurements because of the settings we achieved in changing Programs 4 and 7. This was a big change to the measurements taken on July 15th, 2014, when the 2.8 um wafer was run on Program 5 with only a modified event 3: The focus and exposure values for the 2.8 um wafer are located in Table 9. 2.8 Table 9: Focus and Exposure for 2.8 s Exposure 3.4 Focus -8 The 2.8 wafers were run through the svgdev1 track with the standard programs. Following their development, we recorded the measurements post-development (µm). Top Left Flat Right Center Aver. 2.8 2.6311 2.6270 2.6150 2.6211 2.6131 2.6215 Following this, one set of wafers was run through the svgdev1 again for a hard bake. Top Left Flat Right Aver. 2.8 A 2.6311 2.6270 2.6150 2.6211 2.6131 Table 10: Post hard bake (µm) There was thickness lost in after the hardbake, but not an appreciable amount. The UV bake, however, resulted in excessive damage to the photoresist film, and thus, it is not recommended to UV bake wafers with resist this tick on them.

C. SEM Images Following the entire photolithography process, we examined the wafers using the LEO scanning electron microscope. This allowed us to check for uniformity across the film of photoresist on the wafer. In addition to this, we were able to observe the profile of resist lines and spaces. The images we collected displayed uniformity across the wafers, and we were able to detect features as small as 0.5 microns. The images are displayed below. Beginning with left-most image, moving counterclockwise! 1.2, 1.7, 2.1, and 2.8 µm thick.

ID IV. Conclusion Svgcoat1 Process to be modified Svgdev1 Process Spin Speed (rpm) Target Thickness (µm) Table 11: Finalized measurements Measured Measured Thickness Thickness Thickness after Hard- Pre-dev Postdev(µm) Bake (µm) Thickness after UV Bake 1 (1,1) (1,1) 4100 1.2 1.1870 -- 1.1250 1.1030 0.5 2 (3,1) (1,1) 2000 1.7 1.6957 -- 1.6063 1.6256 0.6 3 (5,1) (1,1) 1300 2.1 2.0959 1.9923 1.9799 1.9438 0.6 4 (4,7) (1,1) 820 2.8 2.8170 2.6131 2.6113 -- 0.6 Min Res Feat Table 12: Focus and Exposure values final Thickness (µm) Focus Exposure (sec) 1.2-8 1.0 1.7-10 1.2 2.1-10 1.8 2.8-8 3.4 Tables 11 and 12 summarize the data from the entire experiment. The values provided in the tables provided consistent measurements throughout the entire project, and thus have proved to be reliable. VI. Acknowledgements Thank you to Jeff Clarkson for mentoring me throughout my time at the Nanolab, helping me execute this entire project every step of the way, and guiding me on how to present its findings in this report. Thank you to Cheryl Chang for teaching me the general photolithography process, showing me how to use the different tools that comprise it, and providing me with previous data that proved helpful in shaping this project. Thank you to Kim Chan for helping me whenever problems arose, taking pictures on the LEO SEM for reference, and adjusting program settings to provide accurate results. Thank you David Lo and Greg Mullins for maintaining lithography equipment that performed very well during my experiments. VII. References [1] "Photolithography Basics." CEPSR Clean Room. Columbia University Center for Engineering and Physical Science Research, PDF file. 20 July 2014. <https://www.clean.cise.columbia.edu/process/photolithography_lessons.pdf>

V. Supplemental Material 1.2 ORIGINAL Program 1 1 SPIN 0 30.0 0.00 00 1 2 SPIN 0 01.0 0.50 00 1 3 DSP1 1 - - 0.50 50 1 4 SPIN 0 01.5 0.50 20 1 5 SPIN 0 30.0 4.1 50 1 6 END 0 0.00 0.00 00 Modified Program 1 3 SPIN 0 10.0 0.50 50 2.1 ORIGINAL Program 5 1 SPIN 0 30.0 0.00 00 5 2 SPIN 0 01.0 0.50 50 5 3 DSP1 1 - - 0.50 50 5 4 SPIN 0 01.5 0.50 20 5 5 SPIN 0 30.0 1.30 50 5 6 END 0 0.00 0.00 50 Modified Program 5 3 SPIN 0 10.0 0.50 50 1.7 ORIGINAL Program 3 1 SPIN 0 30.0 0.00 01 3 2 SPIN 0 01.0 0.50 50 3 3 DSP1 1 - - 0.50 50 3 4 SPIN 0 01.5 0.50 20 3 5 SPIN 0 30.0 2.00 50 3 6 END 0 0.00 0.00 00 Modified Program 3 3 SPIN 0 10.0 0.50 00 2.8 Modified Program Coat 7 1 SPIN 0 15.0 0.00 01 7 2 SPIN 0 03.0 0.50 01 7 3 SPIN 0 30.0 0.82 01 7 4 END 0 30.0 0.00 00 Oven 4 1 STEP 000.0 0.15 00 4 4 2 STEP 005.0 0.10 00 4 4 3 STEP 100.0 0.05 00 4 4 4 COOL 006.0 - - 00 4 4 5 END 000.0 - - 00 4