Lecture 6 Differential Amplifiers (I) DIFFERENTIAL AMPLIFIERS Outline 1. Introduction. Incremental analysis of differential amplifier 3. Common-source differential amplifier Reading Assignment: Howe and Sodini, Chapter 11, Sections 11-1-11.3, 11.6 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 1
Summary of Key Concepts In differential amplifiers, signals are represented by difference between two oltages Differential amplifier amplifies the difference between two oltages but rejects common mode signals Improed noise immunity Using half-circuit technique, small-signal operation of differential amplifiers is analyzed by breaking the problem into two simpler ones Differential mode problem Common mode problem Common-mode rejection ratio (CMRR) is an important figure of merit for differential amplifiers Differential amplifiers require good deice matching 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6
1. Introduction Two problems found in single-transistor amplifier stages are: Bias and gain sensitiity to deice parameters (µc ox, V T ) Sensitiity can be mitigated but often at a price in terms of performance or cost (gain, power, deice area, etc.) Vulnerability to ground and power supply noise In dense IC s there is cross-talk, 60 Hz coupling, substrate noise, etc. 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 3
Introduction (contd.) Solution : represent releant signal by the difference between two oltages Differential Amplifier: Amplifies difference between two oltages Rejects components common to both oltages 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 4
MOSFET Differential Amplifier Basic Configuration O responds to difference between I s If I1 I symmetry O1 O O 0 If I1 > I M1 conducts more than M i 1 > i O1 < O O < 0 O insensitie to common mode signals: If both O1 and O moe in sync, symmetry is presered O unchanged If ground V DD or V SS hae noise, symmetry presered O unchanged If V T or µc ox change, symmetry presered O unchanged. Need precise deice matching 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 5
Differential-mode and Common-mode signals Distinguish between common-mode and differential-mode: Then: ID I1 IC I1 + ID Similarly at the output: O 1 OC + Then:, I IC + ID I1 I I, IC OD, O OC OD OD O1 + O1 O O, OC 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 6
. Incremental analysis of differential amplifier Consider generic differential amplifier: Figures of Merit: Differential-mode oltage gain (want it high): a dm od id Common-mode oltage gain (want it small): a cm oc ic Common-mode rejection ratio (want it ery high): CMRR a a dm cm 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 7
Incremental analysis of differential amplifier (contd.) Two steps to simplify the problem: 1. Use superposition and break the problem into two:. Exploit symmetry: Circuit broken into two half circuits. 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 8
Incremental analysis of differential amplifier Differential-mode Analysis No oltage relatie to ground along axis of symmetry circuit identical to: 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 9
Incremental analysis of differential amplifier Differential-mode Analysis (contd.) Need to sole: Differential-mode oltage gain: a dm od id o i o1 i1 In differential mode: Then: and id i1 i o1 o o 1 1 a dm id o id 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 10
Incremental analysis of differential amplifier Common-mode Analysis No current across wires connecting the two half-circuits circuit is identical to: 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 11
Incremental analysis of differential amplifier Common-mode Analysis (contd.) Common-mode oltage gain: + o oc acm ic ic o1 In common mode, o1 o, then: o1 acm ic 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 1
3. Common-source differential amplifier (source-coupled pair) Biasing Issues: must keep MOSFET s in saturation Upper limit to V I1 and V I : MI and M drien into linear regime: V IC,max V O1 + V T V T + V DD R D I BIAS Lower limit to V I1 and V I : set by circuit that implements I BIAS. 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 13
Common-source differential amplifier (small-signal equialent circuit model) 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 14
Common-source differential amplifier Differential-mode half circuit g o1 m1 R D id Then the differential mode gain is o1 adm gm 1 id R D 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 15
Common-source differential amplifier Common-mode half circuit o1 gm 1R 1+ g D m1 r ob ic Then the common-mode gain is a cm o1 ic gm 1R 1+ g D m1 r ob Common-mode Rejection Ratio (CMRR): a g dm m1 D CMMR 1+ gm 1 a g cm m1r D 1+ g R m1 To get good CMRR, need good current source. r ob r ob 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 16
Large-signal response of differential amplifier Examine large-signal transfer function: If I1 I O1 O O 0 If I1 > I M1 conducts more than M i 1 > i O1 < O O < 0 If I1 >> I M1 conducts strongly, M turns off i 1 I BIAS, i 0 O1 OD,min O1,min I BAIS V R DD D I BAIS R D, O O1,max V DD Symmetric behaior for I1 < I and I1 << I 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 17
Large-signal response of differential amplifier (contd.) Saturating behaior for large differential input signals: ID that leads to amplifier saturation ( I1 >> I ): With: ID, sat GS1 GS Then: GS1 GS V V T T + IBAIS W C L µ ox ID, sat IBAIS W µ C L ox 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 18
Large-signal response of differential amplifier (contd.) For small ID, O is linear in I differential amplifier For large ID, O saturates: once ID is large enough, O independent of ID logic inerter Can do logic with this: Logic 0 -V ID,sat, logic 1 V ID,sat Regeneratie if V O (swing) >V ID,sat Used in some MOSFET logic styles Used with Si BJTs: Emitter-Coupled Logic (ECL) And GaAs FETs: Source-Coupled FET Logic (SCFL) 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 19
What did we learn today? Summary of Key Concepts In differential amplifiers, signals are represented by difference between two oltages Differential amplifier amplifies the difference between two oltages but rejects common mode signals Improed noise immunity Using half-circuit technique, small-signal operation of differential amplifiers is analyzed by breaking the problem into two simpler ones Differential mode problem Common mode problem Common-mode rejection ratio (CMRR) is an important figure of merit for differential amplifiers Differential amplifiers require good deice matching 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 0
Wrap-up of 6.01 6.01: Introductory subject to microelectronic deices and circuits MICROELECTRONIC DEVICES Semiconductor physics: electrons / holes and drift / diffusion Metal-oxide-semiconductor field-effect transistors (MOSFETs): drift of carriers in inersion layer Bipolar junction transistors (BJTs): minority carrier diffusion MICROELECTRONIC CIRCUITS Digital circuits (mainly CMOS): no static power dissipation; power, delay & density as W & L Analog circuits (BJT and CMOS): f τ and g m as L : howeer, A omax as L Follow-on Courses 6.15J Microelectronics Processing Technology 6.70J Integrated Microelectronic Deices 6.301 Solid State Circuits 6.371 Introduction to VLSI Systems 6.374 Analysis and Design of Digital ICs 6.775 Design of Analog MOS LSI 6.01 Electronic Deices and Circuits-Fall 000 Lecture 6 1