Typical Application Circuit V CC HIN,, LIN,, FAULT EN GND Pin Description V CC HIN,, LIN,, FAULT EN RCIN ITRIP V SS PIN NO. PIN NAME PIN FUNCTION V B,

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SOIC8 -Phase Bridge Driver General Description The is a high voltage, high speed power MOSFET and IGBT drivers with a three independent high and low side referenced output channels for -phase applications. The floating channels can be used to drive N-channel power MOSFETs or IGBTs in the high side configuration which operates up to 6V. Logic inputs are compatible with CMOS or LSTTL outputs, down to.v logic. A current trip function which terminates all six outputs can be derived from an external current sense resistor. An enable function is available to terminate all six outputs simultaneously. An open-drain FAULT signal is provided to indicate that an over-current or under-voltage shutdown has occurred. Over-current fault conditions are cleared automatically after a delay programmed externally via an RC network connected to the RCIN input. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. Features Packages/Order information Fully operational to +6 V. V logic compatible dv/dt Immunity ±5 V/nsec Floating channel designed for bootstrap operation Gate drive supply range from V to V UVLO for all channels Cross-conduction prevention logic Over-current shutdown turns off all six drivers Externally programmable delay for automatic fault clear Independent half-bridge drivers -5V negative Vs ability Matched propagation delay for all channels Applications VCC HIN HIN HIN 5 LIN 6 LIN 7 LIN 8 FAULT 9 ITRIP EN RCIN VSS COM LO VB 8 HO 7 VS 6 5 VB HO VS VB HO 9 VS 8 7 LO 6 LO 5 Motor Control Air Conditioners/ Washing Machines General Purpose Inverters Micro/Mini Inverter Drives Part number Order Code Package SAC-R SOIC8 Version. / Jun 6

Typical Application Circuit V CC HIN,, LIN,, FAULT EN GND Pin Description V CC HIN,, LIN,, FAULT EN RCIN ITRIP V SS PIN NO. PIN NAME PIN FUNCTION V B,, HO,, V S,, LO,, COM VCC Low side and logic fixed supply voltage HIN Signal Input for Phase High-side HIN Signal Input for Phase High-side HIN Signal Input for Phase High-side 5 LIN Signal Input for Phase Low-side 6 LIN Signal Input for Phase Low-side 7 LIN Signal Input for Phase Low-side Up to 6V 8 FAULT Indicates over-current (ITRIP)or low-side under-voltage lockout 9 ITRIP Analog input for overcurrent shutdown. EN Logic input to enable I/O functionality RCIN External RC network input used to define FAULT CLEAR delay VSS Logic ground COM Low side gate drivers return LO Low side gate driver outputs for Phase 5 LO Low side gate driver outputs for Phase 6 LO Low side gate driver outputs for Phase 8 VS High voltage floating supply return for Phase TO LOAD Version. / Jun 6

9 HO High side gate driver outputs for Phase VB High side floating supply for Phase VS High voltage floating supply return for Phase HO High side gate driver outputs for Phase VB High side floating supply for Phase 6 VS High voltage floating supply return for Phase 7 HO High side gate driver outputs for Phase 8 VB High side floating supply for Phase Functional Block Diagram HIN LIN HIN LIN HIN LIN VSS EN INPUT NOISE FILTER INPUT NOISE FILTER INPUT NOISE FILTER INPUT NOISE FILTER INPUT NOISE FILTER INPUT NOISE FILTER INPUT NOISE FILTER DEADTIME& SHOOT-THROUGH PREVENTION DEADTIME& SHOOT-THROUGH PREVENTION DEADTIME& SHOOT-THROUGH PREVENTION UV DETECT VSS/COM LEVEL SHIFTER VSS/COM LEVEL SHIFTER VSS/COM LEVEL SHIFTER VSS/COM LEVEL SHIFTER HV LEVEL SHIFTER HV LEVEL SHIFTER HV LEVEL SHIFTER SET RESET UV RETECT SET RESET SET RESET DELAY LATCH LATCH UV RETECT LATCH UV RETECT DRIVER DRIVER DRIVER DRIVER VB HO VS VB HO VS VB HO VS VCC LO ITRIP.5V INPUT NOISE FILTER S SET Q DOMINANT R LATCH VSS/COM LEVEL SHIFTER DELAY DRIVER LO RCIN FAULT VSS/COM LEVEL SHIFTER DELAY DRIVER LO COM Version. / Jun 6

Absolute Maximum Ratings [Note] Symbol Definition MIN. MAX. Units V B,, High side floating supply -. 65 V S,, High side floating supply return V B - 5 V B +. V HO,,, High side gate drive output V S -. V B +. V CC Low side and main power supply -. 5 V LO,, Low side gate drive output -. V CC +. V IN Logic input of HIN & LIN -. V CC +. VSS Logic ground V CC -5 V CC +. V RCIN RCIN input voltage V SS V CC V FLT FAULT output voltage V SS -. V CC +. dv S /dt Allowable Offset Supply Voltage Transient 5 V/ns ESD HBM Model.5 kv Machine Model V P D Package Power Dissipation @ TA 5 C 8 Lead SOIC.65 W Rth JA Thermal Resistance Junction to Ambient 8 Lead SOIC C /W T J Junction Temperature 5 T S Storage Temperature -55 5 C T L Lead Temperature (Soldering, seconds) Note : Exceeding these ratings may damage the device. Recommended Operating Conditions Symbol Definition MIN. MAX. Units V B,, High side floating supply V S + V S + V S,, High side floating supply return - 6 V V HO,, High side gate drive output voltage V S,, V B,,, V CC Low side supply V LO,, Low side gate drive output voltage V CC V V IN Logic input voltage(hin & LIN) V CC V SS Logic ground -5 5 V RCIN RCIN input voltage V SS V CC V FLT FAULT output voltage V SS V CC T A Ambient temperature - 5 C Version. / Jun 6

Dynamic Electrical Characteristics V BIAS (V CC, V BS ) = 5V, V S,, =V SS =COM, C L = pf and T A = 5 C unless otherwise specified. Symbol Definition MIN. TYP. MAX. Units t onh High side turn-on propagation delay 5 75 t offh High side turn-off propagation delay 5 75 t onl Low side turn-on propagation delay 5 75 t offl Low side turn-off propagation delay 5 75 t r High side Turn-on rise time 9 7 t r Low side Turn-on rise time 9 7 t f High side Turn-off fall time 9 t f Low side Turn-off fall time 9 t EN ENABLE low to output shutdown propagation delay 6 65 titrip ITRIP to output shutdown propagation delay 5 7 tbl ITRIP blanking time tflt ITRIP to FAULT propagation delay 6 t FLTIN Input filter time (HIN, LIN) 5 5 t filteren Input filter time (EN) t FLTCLR FAULT clear time RCIN: R = MΩ, C = nf..9.5 ms DT Deadtime 9 MT Matching delay ON and OFF 5 5 MDT Matching delay, max (t on, t off ) min (t on, t off ), (t on, t off are applicable to all channels) 5 PM Output pulse width matching 8 ns ns Version. 5 / Jun 6

Static Electrical Characteristics V BIAS (V CC, V BS ) = 5V, T A = 5 C unless otherwise specified. Symbol Definition MIN. TYP. MAX. Units V IH Logic (HIN & LIN) input voltage.5 V IL Logic (HIN & LIN) input voltage - -.8 V OH High level output voltage, V BIAS - V O - -. V OL Low level output voltage, V O - -. V EN,TH+ Enable positive going threshold.5 V EN,TH Enable negative going threshold.8 V V IT,TH+ ITRIP positive going threshold.7.6.55 V IT,HYS ITRIP input hysteresis.7 V RCIN,TH+ RCIN positive going threshold 8 V RCIN,HYS RCIN input hysteresis V IN,CLAMP Input clamp voltage (HIN, LIN, ITRIP and EN) 5.6 I QCC Quiescent V CC supply current ma I QBS Quiescent V B supply current I LK Leakage current from V S (6V) to GND 5 I IN+ Logic input bias current 5 I IN- Logic input bias current 6 I EN+ High ENABLE input bias current.5 I EN-- Low ENABLE input bias current I ITRIP+ High ITRIP input bias current.5 I ITRIP- Low ITRIP input bias current I RCIN RCIN input bias current ua V CCU+ 8 8.9 9.8 V CC supply UVLO threshold V CCU- 7. 8. 9. V BSU+ 8 8.9 9.8 V BS supply UVLO threshold V BSU- 7. 8. 9 V I O+ Output high short circuit pulsed current I O- Output low short circuit pulsed current 6 R on_rcin RCIN low on resistance R on_fault FAULT low on resistance ma Ω Version. 6 / Jun 6

Logic Function & Timing Spec HIN,, LIN,, HIN,, HO,, LO,, LIN,, EN ITRIP FAULT RCIN HO,, LO,, HIN,, 5% 5% t on PW IN t r 9% % 5% PW OUT 5% t off 9% % t f EN HO,, LO,, RCIN 5% t EN 9% LIN,, 5% 5% ITRIP 5% 5% LO,, HO,, 5% 5% DT DT 5% 5% FAULT Any output t FLT t ITRIP 5% 5% 9% t FLTCLR t in,fil t in,fil n HIN/LIN ON OFF ON OFF ON OFF high HO/LO low Version. 7 / Jun 6

Turn-off Delay Time (ns) Turn-on Delay Time (ns) Turn-on Delay Time (ns) Turn-off Delay Time(ns) Turn-on Delay Time(ns) Turn-on Delay Time (ns) Characterization Curves 8 6-5 -5 5 5 75 5 Fig Turn-On Delay Time vs. Temperature 8 6..5..5 5. Input Voltage (V) 8 6 6 8 Fig Turn-On Delay Time vs. Supply Voltage 8 6-5 -5 5 5 75 5 Fig Turn-On Delay Time vs. Input Voltage Fig Turn-Off Delay Time vs. Temperature 8 8 6 6 6 8 Fig5 Turn-Off Delay Time vs. Supply Voltage..5..5 5. Input Voltage (V) Fig6 Turn-Off Delay Time vs. Input Voltage Version. 8 / Jun 6

Deadtime (ns) Deadtime(ns) Turn-Off Fall Time (ns) Turn-Off Fall Time (ns) Turn-On Rise Time (ns) Turn-On Rise Time (ns) -5-5 5 5 75 5 Fig7 Turn-On Rise Time vs. Temperature 5 5-5 -5 5 5 75 5 Fig9 Turn-Off Fall Time vs. Temperature 6 8 Fig8 Turn-On Rise Time vs. Supply Voltage 5 5 6 8 Fig Turn-Off Fall Time vs. Supply Voltage 6 8 5 6-5 -5 5 5 75 5 Fig Deadtime vs. Temperature 6 8 Supply Voltage(V) Fig Deadtime vs. Supply Voltage Version. 9 / Jun 6

ITRIP to Output Propogation Delay(ns) ITRIP to FAULT Indication Time (ns) EN to Output Shutdown Time (ns) ITRIP to Output Shutdown Time (ns) EN to Output Shutdown Time(ns) EN to Output Shutdown Time(ns) 8 6-5 -5 5 5 75 5 Fig EN to Output Shutdown Time vs. Temperature 8 6..5..5 5. EN Voltage(V) Fig5 EN to Output Shutdown Time vs. EN Voltage 8 6 6 8 Supply Voltage(V) Fig EN to Output Shutdown Time vs Supply Voltage 5 9 6-5 -5 5 5 75 5 Fig6 ITRIP to Output Shutdown Time vs. Temperature 5 9 8 6 6 6 8 Supply Voltage(V) Fig7 ITRIP to Output Shutdown Time vs. Supply Voltage -5-5 5 5 75 5 Fig8 ITRIP to FAULT Indication Time vs. Supply Voltage Version. / Jun 6

Logic "" Input Voltage (V) Logic "" Input Voltage (V) FAULT Clear Time(ns) Logic "" Input Voltage (V) ITRIP to FAULT Indication Time (ns) ITRIP to FAULT Indication Time (ns) 8 6 6 8 Supply Voltage(V) Fig9 ITRIP to FAULT Indication Time..5..5..5..5. 6 8 Supply Voltage(V) 8 6 vs. Supply Voltage -5-5 5 5 75 5 Fig FAULT Clear Time vs. Temperature 5-5 -5 5 5 75 5 Fig FAULT Clear Time vs. Supply Voltage Fig Logic "" Input Threshold vs. Temperature 5 6 8 Supply Voltage ( ) -5-5 5 5 75 5 Fig Logic "" Input Threshold vs. Supply Voltage Fig Logic "" Input Threshold vs. Temperature Version. / Jun 6

Low Level Output Voltage(V) ITRIP Positive going Threshold (V) High Level Output Voltage(V) High Level Output Voltage(V) Input Voltage (V) High Level Output Voltage(V).5 6 8 Fig.5 Logic "" Input Threshold vs. Supply Voltage.5..... 6 8 Fig7 High Level Output vs. Voltage.... Max. -5-5 5 5 75 5..8.6.. Fig6 High Level Output vs. Temperature. -5-5 5 5 75 5 Fig8 Low Level Output vs. Temperature. 8.8 7.6 6 5... 6 8 Fig9 Low Level Output vs. Voltage -5-5 5 5 75 5 Fig ITRIP Positive Going Threshold vs. Temperature Version. / Jun 6

Offset Supply Leakage Current(mA) VCC Supply Current( ) VCC/VBS Undervoltage Lockout(+) (V) Offset Supply Leakage Current( ) ITRIP Positive going Threshold (V) VCC/VBS Undervoltage Lockout(-) (V) 8 7 6 5 6 8 9 8 7 Fig ITRIP Positive Going Threshold vs. Supply Voltage 6-5 -5 5 5 75 5 9 8 7 6-5 -5 5 5 75 5 5 Fig VCC/VBS UnderVoltage(-) Max vs. Temperature -5-5 5 5 75 5 Fig V CC /V BS UnderVoltage(+) vs. Temperature Fig Offset Supply Current vs. Temperature 5 5 5 6 VB Boost Voltage (V) -5-5 5 5 75 5 Fig5 Offset Supply Current vs. Boost Voltage Fig6 VCC Supply Current vs. Temperature Version. / Jun 6

V BS Supply Current( ) VCC Supply Current( ) V BS Supply Current( ) 5 5 6 8 Fig7 VCC Supply Current vs. Supply Voltage 5 75 5 5 75 5 5 6 8 Fig9 V BS Supply Current vs. Supply Voltage 75 5 5 75 5 5-5 -5 5 5 75 5 Fig8 V BS Supply Current vs. Temperature Logic "" input Current( ) 5 5 5-5 -5 5 5 75 5 Fig Logic "" Input Current vs. Temperature 5 5 Logic "" input Current ( ) Logic "" input Current ( ) 6 8-5 -5 5 5 75 5 Fig Logic "" Input Current vs. Supply Voltage Fig Logic "" Input Current vs. Temperature Version. / Jun 6

High IEN Current ( ) High ITRIP Current ( ) Low ITRIP Current ( ) High ITRIP Current ( ) 5 Logic "" input Current ( ) 6 8 Fig Logic "" Input Current vs. Voltage 5 6 8 Fig5 High ITRIP Current vs. Supply Voltage 8 6-5 -5 5 5 75 5 Fig High ITRIP Current vs. Temperature 5-5 -5 5 5 75 5 Fig6 Low ITRIP Current vs. Temperature 5 Low ITRIP Current ( ) 6 8 8 6-5 -5 5 5 75 5 Fig7 Low ITRIP Current vs. Supply Voltage Fig8 High IEN Current vs. Temperature Version. 5 / Jun 6

High IEN Current ( ) Low IEN Current ( ) Output Sourse Current (ma) RCIN Input Bias Current ( ) 5 5 Low ITRIP Current ( ) Typ 6 8 Fig9 High IEN Current vs. Supply Voltage 5 6 8 Fig5 Low IEN Current vs. Supply Voltage -5-5 5 5 75 5 Fig5 Low IEN Current vs. Temperature 5 Max -5-5 5 5 75 5 Fig5 RCIN Input Bias Current vs. Temperature 5 5 RCIN Input Bias Current ( ) 6 8-5 -5 5 5 75 5 Fig5 RCIN Input Bias Current vs. Supply Voltage Fig5 Output Sourse Current vs. Temperature Version. 6 / Jun 6

Output Sink Current (ma) Output Sourse Current (ma) Output Sink Current (ma) 5 8 6 8 Fig55 Output Source Current vs. Supply Voltage 8 6 6 8 Fig57 Output Sink Current vs. Supply Voltage 6-5 -5 5 5 75 5 Fig56 Output Sink Current vs. Temperature RCIN Low On Resistance ( ) 5 5 5-5 -5 5 5 75 5 Fig58 RCIN Input Resistance vs. Temperature 5 5 RCIN Low On Resistance ( ) 5 5 Typ 6 8 FAULT Low On Resistance ( ) 5 5-5 -5 5 5 75 5 Fig59 RCIN Input Resistance vs. Supply Voltage Fig6 FAULT Input Resistance vs. Temperature Version. 7 / Jun 6

5 FAULT Low On Resistance ( ) V S Offset 5 5 6 8 Fig6 FAULT Input Resistance vs. Supply Voltage - - -6-8 - 6 8 V BS Floating Fig6 Maximum V S Negative Offset vs. Supply Voltage Version. 8 / Jun 6

Package Information SOIC8 Package Dimensions Size MIN(mm) TYP(mm) MAX(mm) Symbol Symbol Size MIN(mm) TYP(mm) MAX(mm) A - -.65 D 7.89 8.9 8.9 A. -. E...5 A.5..5 E 7. 7.5 7.7 A.97..7 e.7bsc b.9 -.8 L.7 -. b.8.. L.BSC c.5 -. θ - 8 c..5.6 SOIC8 Package Outlines Mark Package ABYWX SOIC8 Note:AB:Product code,y:year code; W:Week code; X:Package code Version. 9 / Jun 6

Important Notice Mosway Technologies Ltd. reserves the right to make changes without further notice to any products or specifications herein. Mosway Technologies Ltd. does not assume any responsibility for use of any its products for any particular purpose, nor does Mosway Technologies Ltd assume any liability arising out of the application or use of any its products or circuits. Mosway Technologies Ltd does not convey any license under its patent rights or other rights nor the rights of others. Version. / Jun 6