Advance Datasheet Revision: January 215 Applications Military SatCom Phased-Array Radar Applications Terminal Amplifiers X = 3.7mm Y = 3.2mm Product Features RF frequency: 43 to 46 GHz Linear Gain: 2 db typ. Psat: 39 dbm typ. PAE @ Psat: 2% Die Size: < 11.84 sq. mm..2um GaN HEMT 4 mil substrate DC Power: 28 VDC @ 18 ma Product Description The monolithic GaN HEMT amplifier is a broadband, two-stage power device, designed for use in Military SatCom and Radar Applications. To ensure rugged and reliable operation, HEMT devices are fully passivated. Both bond pad and backside metallization are Ti/Au, which is compatible with conventional die attach, thermocompression, and thermosonic wire bonding assembly techniques. Performance Characteristics (Ta = 25 C) Specification Min Typ Max Unit Frequency 43 46 GHz Linear Gain 18 2 db Input Return Loss 17 22 db Output Return Loss 17 25 db P1dB 35.5 dbm Psat 38.5 39 dbm PAE @ Psat 2 % Vd1=Vd1a, Vd2=Vd2a 28 V Vg1=Vg1a -4.5 V Vg2=Vg2a -4.5 V Id1+Id1a 336 ma Id2+Id2a 672 ma * Pulsed-Power On-Wafer Absolute Maximum Ratings (Ta = 25 C) Parameter Min Max Unit Vd1=Vg1a, Vd2=Vg2a 2 28 V Id1+Id1a 336 ma Id2+Id1a 672 ma Vg1, Vg1a, Vg2, Vg2a -5 V Input drive level TBD dbm Assy. Temperature 3 deg. C (6 seconds) 214 Northrop Grumman Systems Corporation Phone: (31) 814-5 Fax: (31) 812-711 E-mail: as-mps.sales@ngc.com Page 1
Input Return Loss (db) Output Return Loss (db) Gain (db) Pout (dbm), Gain (db), PAE% Advance Datasheet Revision: January 215 Vd = 28. V, Id1+Id1a = 336 ma, Id2+Id2a = 672 ma Linear Gain vs. Frequency Power, Gain, PAE% vs. Frequency ** 26 24 22 2 18 16 14 12 1 8 6 4 2 4 41 42 43 44 45 46 47 48 45 4 35 3 25 2 15 1 Gain SS Gain@Pin=dBm 5 P1dB Psat PAE%@Psat Max PAE% 4 41 42 43 44 45 46 47 48 Input Return Loss vs. Frequency Output Return Loss vs. Frequency -5-5 -1-15 -2-25 -3-35 4 41 42 43 44 45 46 47 48-1 -15-2 -25-3 -35 4 41 42 43 44 45 46 47 48 * Pulsed-Power On-Wafer, ** CW Fixtured 214 Northrop Grumman Systems Corporation Phone: (31) 814-5 Fax: (31) 812-711 E-mail: as-mps.sales@ngc.com Page 2
Input Return Loss (db) Output Return Loss (db) Gain (db) Pout (dbm), Gain (db), PAE% Advance Datasheet Revision: January 215 Vd = 24. V, Id1+Id1a = 336 ma, Id2+Id2a = 672 ma * Linear Gain vs. Frequency 24 22 2 18 16 14 12 1 8 6 4 2 38 39 4 41 42 43 44 45 46 47 48 49 5 Power, Gain, PAE% vs. Frequency 45 4 35 3 25 2 15 1 5 Gain(dB)@Pin=dBm P1dB(dBm) Psat (dbm) PAE%@Psat PAE% Max 4 41 42 43 44 45 46 47 48 Input Return Loss vs. Frequency Output Return Loss vs. Frequency -5-5 -1-15 -2-25 -3-35 38 39 4 41 42 43 44 45 46 47 48 49 5-1 -15-2 -25-3 -35 38 39 4 41 42 43 44 45 46 47 48 49 5 * Pulsed-Power On-Wafer 214 Northrop Grumman Systems Corporation Phone: (31) 814-5 Fax: (31) 812-711 E-mail: as-mps.sales@ngc.com Page 3
Pout (dbm) Pout (dbm) Pout (dbm), Gain (db), PAE% Pout (dbm), Gain (db), PAE% Advance Datasheet Revision: January 215 Vd = 28. V, Id1+Id1a = 336 ma, Id2+Id2a = 672 ma Power, Gain, PAE% vs. Frequency * Power, Gain, PAE% vs. Frequency ** 45 4 35 3 25 2 15 1 Gain @ 1dBm (db) P1dB (dbm) 5 Psat (dbm) PAE% @ Psat Max PAE% Linear Gain (db) 4 41 42 43 44 45 46 47 48 45 4 35 3 25 2 15 1 Gain SS Gain@Pin=dBm 5 P1dB Psat PAE%@Psat Max PAE% 4 41 42 43 44 45 46 47 48 Output Power vs. Input Power * Output Power vs. Input Power ** 42 4 38 36 34 32 3 28 26 24 22 2 18 16 14 42.5 GHz 43.5 GHz 44.5 GHz 45.5 GHz 46.5 GHz 2 4 6 8 1 12 14 16 18 2 22 24 26 42 4 38 36 34 32 3 28 26 24 22 2 18 16 14 41 GHz 42 GHz 43 GHz 44 GHz 45 GHz 46 GHz 2 4 6 8 1 12 14 16 18 2 22 24 26 * Pulse-Power On-Wafer, ** CW Fixtured 214 Northrop Grumman Systems Corporation Phone: (31) 814-5 Fax: (31) 812-711 E-mail: as-mps.sales@ngc.com Page 4
Id (ma) Id (ma) Advance Datasheet Revision: January 215 Vd = 28. V, Id1+Id1a = 336 ma, Id2+Id2a = 672 ma Power, Gain, PAE% vs. Frequency * Power, Gain, PAE% vs. Frequency ** 12 11 1 9 8 Id1_42.5G Id1_44.5G Id1_46.5G Id2_43.5G Id2_45.5G Id1_43.5G Id1_45.5G Id2_42.5G Id2_44.5G Id2_46.5G 12 11 1 9 8 Id1_41G Id1_43G Id1_45G Id1_47G Id2_42G Id2_44G Id2_46G Id1_42G Id1_44G Id1_46G Id2_41G Id2_43G Id2_45G Id2_47G 7 7 6 6 5 5 4 4 3 3 2 2 4 6 8 1 12 14 16 18 2 22 24 26 2 2 4 6 8 1 12 14 16 18 2 22 24 26 * Pulse-Power On-Wafer, **CW Fixtured Thermal Properties Preliminary Thermal Properties with die mounted with 1mil 8/2 AuSn Eutectic to 25mil CuW Shim. Junction Temperature Tjc Thermal Resistance θjc Shim Boundary Conditions Temperature Vd = 28V, Id1+Id1a = 368 ma * 25 ºC 162.8 ºC 4.9 ºC/W Id2 + Id2a = 921 ma * 49.6 ºC 2. ºC ** 5.3 ºC/W Pin=25.95 dbm Pout=39.8 dbm * Vd = 28. V, Idq1+Id1aq = 336 ma, Id2q+Id2aq = 672 ma ** Max recommended. Pre-qualification reliability testing indicates that MTTF in excess of 1 5 hours can be achieved by ensuring Tjc is kept below 2ºC. 214 Northrop Grumman Systems Corporation Phone: (31) 814-5 Fax: (31) 812-711 E-mail: as-mps.sales@ngc.com Page 5
Advance Datasheet Revision: January 215 Vd = 28. V, Id1+Id1a = 336 ma, Id2+Id2a = 672 ma * Freq GHz S11 Mag S11 Ang S21 Mag S21 Ang S12 Mag S12 Ang S22 Mag S22 Ang 34..11-11.841.484-122.815.3 76.615.117 1.41 34.5.96-115.16.564-138.227.3 27.194.97-23.379 35..71-126.967.657-153.93.2 19.337.8-45.269 35.5.55-148.663.762-169.695.2 65.428.57-63.815 36..59 17.195.887 174.835.2 28.841.41-85.852 36.5.49 66.15 1.32 158.855.3 49.684.25-133.162 37..44 87.52 1.21 143.65.3 21.637.2 2.382 37.5.46 111.189 1.429 127.274.4 34.5.15 43.11 38..54 77.822 1.71 11.887.4 38.93.13 51.419 38.5.6 7.129 2.73 93.64.6 14.638.19 41.519 39..59 54.528 2.547 75.429.7 16.914.45 97.535 39.5.57 4.942 3.125 55.173.8-5.825.86 143.48 4..75 36.181 3.831 33.623.8-17.491.13 118.876 4.5.83 3.121 4.657 1.49.9-45.99.178 92.759 41..87 3.891 5.599-14.815.9-66.837.22 62.945 41.5.15 22.66 6.537-4.73.1-93.443.226 35.64 42..11 4.235 7.69-67.989.1-112.892.212 3.391 42.5.115-7.29 8.54-97.87.11-138.365.157-26.472 43..123-23.958 9.177-127.764.11-7.641.87-46.456 43.5.91-41.38 9.317-156.756.11 74.75.39-48.488 44..67-47.232 9.458 111.449.13 136.755.45-4.377 44.5.4-78.825 1.192 15.96.11 119.834.65-17.427 45..2-6.9 11.289 117.318.11 86.296.73-61.977 45.5.19-6.146 1.787 81.44.16 52.268.54-117.24 46..41 53.231 1.14 47.229.12 18.448.65-16.45 46.5.78 78.114 8.66 11.82.13-4.884.17 134.47 47..17 56.365 6.82-21.376.1-6.62.135 99.37 47.5.129 37.462 5.21-5.756.7-94.563.146 74.3 48..171 15.729 3.87-76.996.8-78.311.154 54.56 48.5.175-1.411 2.886-1.2.6-35.341.146 38.277 49..182-12.623 2.168-12.84.8 41.826.139 14.877 49.5.166-26.498 1.642-141.538.11 35.637.115 2.399 5..143-38.35 1.233-158.589.4 67.183.84-2.484 * Pulsed-Power On-Wafer 214 Northrop Grumman Systems Corporation Phone: (31) 814-5 Fax: (31) 812-711 E-mail: as-mps.sales@ngc.com Page 6
VG1A VD1A VG2B VD2B VG1 VD1 VG2 VD2 Advance Datasheet Revision: January 215 Die Size and Bond Pad Locations (Not to Scale) 2438µm 1838 µm 1438 µm 138 µm RFIN X = 37 µm 25 µm Y = 32 25 µm DC Bond Pad = 1 x 1.5 µm RF Bond Pad = 1 x 1.5 µm Chip Thickness = 11 5 µm RFOUT 119 µm 32 µm 138 µm 1438 µm 1838 µm 2438 µm 37 µm Biasing/De-Biasing Details: Bias for 1 st stage is from top. The 2 nd stages must bias up from both sides. Listed below are some guidelines for GaN device testing and wire bonding: a. Limit positive gate bias (G-S or G-D) to < 1V b. Know your devices breakdown voltages c. Use a power supply with both voltage and current limit. d. With the power supply off and the voltage and current levels at minimum, attach the ground lead to your test fixture. i. Apply negative gate voltage (-5 V) to ensure that all devices are off ii. Ramp up drain bias to ~1 V iii. Gradually increase gate bias voltage while monitoring drain current until 2% of the operating current is achieved iv. Ramp up drain to operating bias v. Gradually increase gate bias voltage while monitoring drain current until the operating current is achieved e. To safely de-bias GaN devices, start by debiasing output amplifier stages first (if applicable): i. Gradually decrease drain bias to V. ii. Gradually decrease gate bias to V. iii. Turn off supply voltages f. Repeat de-bias procedure for each amplifier stage 214 Northrop Grumman Systems Corporation Phone: (31) 814-5 Fax: (31) 812-711 E-mail: as-mps.sales@ngc.com Page 7 Approved for Public Release: Northrop Grumman Case 13-xxxx, 5/xx/13
VG1A VD1A VG2A VD2A VG1 VD1 VG2 VD2 Advance Datasheet Revision: January 215 VD1 VG2 VD2 Suggested Bonding Arrangement [4] [4] =.1uF, 5V (Shunt) [4] VG1 =.1uF, 5V (Shunt) = 1 pf, 5V (Shunt) RF Input RF Output Substrate RFIN RFOUT Substrate VG1A [4] [4] =.1uF, 15V (Shunt) =.1uF, 15V (Shunt) = 1 Ohms, 3V (Series) VD1A VG2A VD2A = 1 pf, 15V (Shunt) Recommended Assembly Notes 1. Bypass caps should be 1 pf (approximately) ceramic (single-layer) placed no farther than 3 mils from the amplifier. 2. Best performance obtained from use of <1 mil (long) by 3 by.5 mil ribbons on input and output. 3. Part must be biased from both sides as indicated. 4. The.1uF, 5V capacitors are not needed if the drain supply line is clean. If Drain Pulsing of the device is to be used, do NOT use the.1uf, 5V Capacitors. Mounting Processes Most NGAS GaN IC chips have a gold backing and can be mounted successfully using either a conductive epoxy or AuSn attachment. NGAS recommends the use of AuSn for high power devices to provide a good thermal path and a good RF path to ground. Maximum recommended temp during die attach is 32 o C for 3 seconds. Note: Many of the NGAS parts do incorporate airbridges, so caution should be used when determining the pick up tool. CAUTION: THE IMPROPER USE OF AuSn ATTACHMENT CAN CATASTROPHICALLY DAMAGE GaN CHIPS. PLEASE ALSO REFER TO OUR GaN Chip Handling Application Note BEFORE HANDLING, ASSEMBLING OR BIASING THESE MMICS! 214 Northrop Grumman Systems Corporation Phone: (31) 814-5 Fax: (31) 812-711 E-mail: as-mps.sales@ngc.com Page 8 Approved for Public Release: Northrop Grumman Case 15-25 1/7/15