Features n 6 Maximum Offset Votage n 3 Maximum Input Bias Current n 3µA Suppy Current per Ampifier n Rai-to-Rai Output Swing n 2dB Minimum Votage Gain, V S = ±V n./ C Maximum V OS Drift n 4nV/ Hz Input Noise Votage n 2.7V to ±V Suppy Votage Operation n Operating Temperature Range: 4 C to C n Space Saving 3mm 3mm DFN Package Appications n Thermocoupe Ampifiers n Precision Photo Diode Ampifiers n Instrumentation Ampifiers n Battery-Powered Precision Systems n Low Votage Precision Systems LT6/LT62 Dua/Quad 3µA, 4nV/ Hz, Rai-to-Rai Output Precision Op Amp Description The LT 6/LT62 op amps combine ow noise and high precision input performance with ow power consumption and rai-to-rai output swing. Input offset votage is trimmed to ess than 6. The ow drift and exceent ong-term stabiity guarantee a high accuracy over temperature and time. The 3 maximum input bias current and 2dB minimum votage gain further maintain this precision over operating conditions. The LT6/LT62 work on any power suppy votage from 2.7V to 36V and draw ony 3µA of suppy current on a V suppy. The output swings to within 4mV of either suppy rai, making the ampifier a good choice for ow votage singe suppy appications. The LT6/LT62 are specified at V and ±V suppies and from 4 C to C. The LT6 (dua) is avaiabe in SO-, MS and space saving 3mm 3mm DFN packages. The LT62 (quad) is avaiabe in SO-4 and 6-pin SSOP packages. L, LT, LTC, LTM, Linear Technoogy and the Linear ogo are registered trademarks and SoftSpan is a trademark of Linear Technoogy Corporation. A other trademarks are the property of their respective owners. Typica Appication Low Power Programmabe Output Range 6-Bit SoftSpan DAC V S LT236-2V Output Step Response /2 LT6 6 C2 27pF 7 SUPPLY CURRENT.6mA TO 4mA DEPENDING ON CODE V/DIV V V 9.µF 2 R R V CC R COM R2 6 R2 REF 3 R OFS 4 R FB I OUT C 27pF V S 2 V/DIV V 4 3 2 CLR CS/LD SCK SDI SDO 6-BIT DAC LTC92 I OUT2 AGND GND 6 7 3 /2 LT6 4 V S V OUT µs/div 6 TAb 6 TA 62fc
LT6/LT62 Absoute Maximum Ratings Tota Suppy Votage (V to V )...4V Differentia Input Votage (Note 2)...V Input Votage... V to V Input Current (Note 2)... ±ma Output Short-Circuit Duration (Note 3)... Indefinite (Note ) Operating Temperature Range (Note 4)...4 C to C Specified Temperature Range (Note )...4 C to C Maximum Junction Temperature... C Storage Temperature Range... 6 C to C Lead Temperature (Sodering, sec)...3 C Package/Order Information TOP VIEW OUT A IN A IN A V 2 3 4 A DD PACKAGE -LEAD (3mm 3mm) PLASTIC DFN T JMAX = C, θ JA = 43 C/W UNDERSIDE METAL CONNECTED TO V (PCB CONNECTION OPTIONAL) B 7 6 OUT A IN A 2 A IN A 3 V 4 IN B B IN B 6 OUT B 7 V OUT B IN B IN B TOP VIEW S PACKAGE 4-LEAD PLASTIC SO D C 4 3 2 OUT D IN D IN D V IN C 9 IN C OUT C T JMAX = C, θ JA = C/W OUT A IN A 2 IN A 3 V 4 A TOP VIEW 7 6 S PACKAGE -LEAD PLASTIC SO T JMAX = C, θ JA = 9 C/W B V OUT B IN B IN B OUT A IN A 2 A 3 IN A V 4 IN B B IN B 6 OUT B 7 NC OUT A IN A 2 IN A 3 V 4 TOP VIEW GN PACKAGE 6-LEAD PLASTIC SSOP TOP VIEW A V 7 OUT B 6 IN B IN B MS PACKAGE -LEAD PLASTIC MSOP T JMAX = C, θ JA = 22 C/W D C 6 4 3 2 OUT D IN D IN D V IN C 9 IN C OUT C NC T JMAX = C, θ JA = 3 C/W B 2 62fc
LT6/LT62 Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT6CDD#PBF LT6CDD#TRPBF LACD -Lead (3mm 3mm) Pastic DFN C to 7 C LT6IDD#PBF LT6IDD#TRPBF LACD -Lead (3mm 3mm) Pastic DFN 4 C to C LT6ACDD#PBF LT6ACDD#TRPBF LACD -Lead (3mm 3mm) Pastic DFN C to 7 C LT6AIDD#PBF LT6AIDD#TRPBF LACD -Lead (3mm 3mm) Pastic DFN 4 C to C LT6CS#PBF LT6CS#TRPBF 6 -Lead Pastic SO C to 7 C LT6IS#PBF LT6IS#TRPBF 6I -Lead Pastic SO 4 C to C LT6ACS#PBF LT6ACS#TRPBF 6A -Lead Pastic SO C to 7 C LT6AIS#PBF LT6AIS#TRPBF 6AI -Lead Pastic SO 4 C to C LT6CMS#PBF LT6CMS#TRPBF LTCGC -Lead Pastic MSOP C to 7 C LT6IMS#PBF LT6IMS#TRPBF LTCGC -Lead Pastic MSOP 4 C to C LT62CS#PBF LT62CS#TRPBF LT62CS 4-Lead Pastic SO C to 7 C LT62IS#PBF LT62IS#TRPBF LT62IS 4-Lead Pastic SO 4 C to C LT62ACS#PBF LT62ACS#TRPBF LT62ACS 4-Lead Pastic SO C to 7 C LT62AIS#PBF LT62AIS#TRPBF LT62AIS 4-Lead Pastic SO 4 C to C LT62CGN#PBF LT62CGN#TRPBF 62 6-Lead Pastic SSOP C to 7 C LT62IGN#PBF LT62IGN#TRPBF 62I 6-Lead Pastic SSOP 4 C to C LT62ACGN#PBF LT62ACGN#TRPBF 62A 6-Lead Pastic SSOP C to 7 C LT62AIGN#PBF LT62AIGN#TRPBF 62AI 6-Lead Pastic SSOP 4 C to C Consut LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a abe on the shipping container. For more information on ead free part marking, go to: http://www.inear.com/eadfree/ For more information on tape and ree specifications, go to: http://www.inear.com/tapeandree/ 62fc 3
LT6/LT62 Eectrica Characteristics The denotes the specifications which appy over the fu operating temperature range, otherwise specifications are at. V S = V, V; V CM = 2.V; R L to V; uness otherwise specified. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OS Input Offset Votage (Note ) LT6AS, LT62AS LT6ADD, LT62AGN LT6S, LT62S LT6DD, LT62GN, LT6MS V OS / T Input Offset Votage Drift (Note 6) LT6AS, LT6S, LT62AS,LT62S LT6ADD,LT6DD, LT62AGN, LT62GN, LT6MS I OS Input Offset Current (Note ) LT6AS, LT6ADD, LT62AS, LT62AGN LT6S, LT6DD, LT62S, LT62GN, LT6MS I B Input Bias Current (Note ) LT6AS, LT6ADD, LT62AS, LT62AGN LT6S, LT6DD, LT62S, LT62GN, LT6MS 2 6 2 3 7 2 7 2 3 2 7 2.2..2.2 2 3 4 6 9 2 2 ±3 ±4 ±6 ±9 ±2 ± Input Noise Votage.Hz to Hz 4 nv P-P e n Input Noise Votage Density f = khz 4 nv/ Hz i n Input Noise Current Density f = khz, Unbaanced Source Resistance. / Hz R IN Input Resistance Common Mode, V CM = V to 3.V Differentia 2 2 C IN Input Capacitance 4 pf V CM Input Votage Range (Positive) Guaranteed by CMRR 3. 4 V Input Votage Range (Negative) Guaranteed by CMRR.7 V CMRR Common Mode Rejection Ratio V CM = V to 3.V 7 3 db Minimum Suppy Votage Guaranteed by PSRR 2.4 2.7 V PSRR Power Suppy Rejection Ratio V S = 2.7V to 36V, V CM = /2V S 2 3 db A VOL Large-Signa Votage Gain R L = k, V OUT = V to 4V R L = 2k, V OUT = V to 4V Channe Separation V OUT = V to 4V 4 db 3 2 2 2 / C / C GΩ MΩ V/mV V/mV 4 62fc
LT6/LT62 Eectrica Characteristics The denotes the specifications which appy over the fu operating temperature range, otherwise specifications are at. V S = V, V; V CM = 2.V; R L to V; uness otherwise specified. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OUT Maximum Output Swing No Load, mv Overdrive 3 mv (Positive, Referred to V ) 6 mv I SOURCE = ma, mv Overdrive 2 7 mv 22 mv Maximum Output Swing No Load, mv Overdrive 4 mv (Negative, Referred to V) 6 mv I SINK = ma, mv Overdrive 22 mv 27 mv I SC Output Short-Circuit Current (Note 3) V OUT = V, V Overdrive, Source 4 ma 4 ma V OUT = V, V Overdrive, Sink 2 ma 4 ma SR Sew Rate A V =, R F = k, R G = k GBW Gain Bandwidth Product f = khz.6..4 2 22.9 V/µs V/µs V/µs 33 khz khz t s Setting Time A V =,.%, V OUT =.V to 3.V 4 µs t r, t f Rise Time, Fa Time A V =, % to 9%,.V Step µs V OS Offset Votage Match (Note 7) LT6AS, LT62AS LT6ADD, LT62AGN LT6S, LT62S LT6DD, LT62GN, LT6MS I B Input Bias Current Match (Note 7) LT6AS, LT6ADD, LT62AS, LT62AGN LT6S, LT6DD, LT62S, LT62GN, LT6MS CMRR Common Mode Rejection Ratio Match (Note 7) PSRR Power Suppy Rejection Ratio Match (Note 7) I S Suppy Current per Ampifier 2 7 22 7 27 34 2 2 6 2 3 42 6 9 2 24 3 3 db 6 3 db 3 9 2 µa µa µa 62fc
LT6/LT62 Eectrica Characteristics The denotes the specifications which appy over the fu operating temperature range, otherwise specifications are at. V S = ±V, V CM = V; R L to V; uness otherwise specified. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OS Input Offset Votage (Note ) LT6AS, LT62AS LT6ADD, LT62AGN LT6S, LT62S LT6DD, LT62GN, LT6MS V OS / T 6 Input Offset Votage Drift (Note 6) LT6AS, LT6S, LT62AS, LT62S LT6ADD, LT6DD, LT62AGN, LT62GN, LT6MS I OS Input Offset Current (Note ) LT6AS, LT6ADD, LT62AS LT62AGN LT6S, LT6DD, LT62S, LT62GN, LT6MS I B Input Bias Current (Note ) LT6AS, LT6ADD, LT62AS, LT62AGN LT6S, LT6DD, LT62S, LT62GN, LT6MS 3 3 6 3 6 2 22 3 7 2 4 2 2 27.2.2..3 2 3 4 6 9 2 2 ±3 ±4 ±6 ±9 ±2 ± / C / C Input Noise Votage.Hz to Hz 4 nv P-P e n Input Noise Votage Density f = khz 3 nv/ Hz i n Input Noise Current Density f = khz, Unbaanced Source Resistance. / Hz R IN Input Resistance Common Mode, V CM = ±3.V Differentia 4 2 C IN Input Capacitance 4 pf V CM Input Votage Range Guaranteed by CMRR ±3. ±4 V CMRR Common Mode Rejection Ratio V CM = 3.V to 3.V 3 db 2 3 db Minimum Suppy Votage Guaranteed by PSRR ±.2 ±.3 V PSRR Power Suppy Rejection Ratio V S = ±.3V to ±V 2 3 db A VOL Large-Signa Votage Gain R L = k, V OUT = 3.V to 3.V 2 V/mV 6 V/mV R L = k, V OUT = 3.V to 3.V V/mV 3 V/mV Channe Separation V OUT = 3.V to 3.V 2 4 db V OUT Maximum Output Swing No Load, mv Overdrive 4 mv (Positive, Referred to V ) mv I SOURCE = ma, mv Overdrive 4 9 mv 24 mv Maximum Output Swing No Load, mv Overdrive 4 mv (Negative, Referred to V) mv I SINK = ma, mv Overdrive 2 mv 3 mv GΩ MΩ 62fc
LT6/LT62 Eectrica Characteristics The denotes the specifications which appy over the fu operating temperature range, otherwise specifications are at. V S = ±V, V CM = V; R L to V; uness otherwise specified. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS I SC Output Short-Circuit Current V OUT = V, V Overdrive (Source) ma (Note 3) ma V OUT = V, V Overdrive (Sink) 2 ma ma SR Sew Rate A V =, R F = k, R G = k GBW Gain Bandwidth Product f = khz..7. 27 2. V/µs V/µs V/µs 3 khz khz t s Setting Time A V =,.%, V OUT = V to V µs t r, t f Rise Time, Fa Time A V =, % to 9%,.V Step µs V OS Offset Votage Match (Note 7) LT6AS, LT62AS LT6ADD, LT62AGN LT6S, LT62S LT6DD, LT62GN, LT6MS I B Input Bias Current Match (Note 7) CMRR Common Mode Rejection Ratio Match (Note 7) PSRR Power Suppy Rejection Ratio Match (Note 7) I S Suppy Current per Ampifier LT6AS, LT6ADD, LT62AS, LT62AGN LT6S, LT6DD, LT62S, LT62GN, LT6MS 27 32 37 32 42 4 7 3 3 4 4 6 9 2 24 3 9 3 db 6 3 db 26 33 3 4 µa µa µa Note : Stresses beyond those isted under Absoute Maximum Ratings may cause permanent damage to the device. Exposure to any Absoute Maximum Rating condition for extended periods may affect device reiabiity and ifetime. Note 2: The inputs are protected by back-to-back diodes and interna series resistors. If the differentia input votage exceeds V, the input current must be imited to ess than ma. Note 3: A heat sink may be required to keep the junction temperature beow absoute maximum ratings. Note 4: Both the LT6C/LT62C and LT6I/LT62I are guaranteed functiona over the operating temperature range of 4 C to C. Note : The LT6C/LT62C are guaranteed to meet the specified performance from C to 7 C and is designed, characterized and expected to meet specified performance from 4 C to C but is not tested or QA samped at these temperatures. The LT6I/LT62I are guaranteed to meet specified performance from 4 C to C. Note 6: This parameter is not % tested. Note 7: Matching parameters are the difference between any two ampifiers. CMRR and PSRR are defined as foows: () CMRR and PSRR are measured in /V for the individua ampifiers. (2) The difference between matching ampifiers is cacuated in /V. (3) The resut is converted to db. Note : The specifications for V OS, I B, and I OS depend on the grade and on the package. The foowing tabe carifies the notations. STANDARD GRADE A GRADE S Package LT6S LT6AS DFN Package LT6DD LT6ADD S4 Package LT62S LT62AS GN6 Package LT62GN LT62AGN MS Package LT6MS N/A 62fc 7
LT6/LT62 Typica Performance Characteristics PERCENT OF UNITS (%) 3 2 2 Distribution of Input Offset Votage V S = V, V LT6S, LT62S OFFSET VOLTAGE () 2 7 2 2 7 Input Offset Votage vs Temperature V S = V, V REPRESENTATIVE UNITS OFFSET VOLTAGE () 2 6 4 2 Offset Votage vs Input Common Mode Votage V S = ±V TYPICAL PART T A = C T A = 4 C 9 7 3 3 7 9 INPUT OFFSET VOLTAGE () 2 2 2 7 2 TEMPERATURE ( C) 2 INPUT COMMON MODE VOLTAGE (V) 6 G 6 G2 6 G3 PERCENT OF UNITS (%) 2 2 4 Distribution of Input Bias Current V S = V, V LT6A, LT62A 3 2 2 3 4 INPUT BIAS CURRENT () INPUT BIAS CURRENT () 6 4 2 6 4 2 2 Input Bias Current vs Temperature V S = V, V TYPICAL PART I B I B 2 2 7 TEMPERATURE ( C) 2 INPUT BIAS CURRENT () 3 2 2 Input Bias Current vs Input Common Mode Votage T A = 4 C 4.2V V S = ±V TYPICAL PART T A = C 3.9V COMMON MODE VOLTAGE (V) 6 G4 6 G 63 G6 INPUT VOLTAGE NOISE DENSITY (nv/ Hz) e n, i n vs Frequency CURRENT NOISE UNBALANCED SOURCE RESISTORS VOLTAGE NOISE V S = ±V 6 G7 INPUT CURRENT NOISE DENSITY (fa/ Hz) TOTAL INPUT NOISE (/ Hz)... Tota Input Noise vs Source Resistance V S = V, V f = khz UNBALANCED SOURCE RESISTORS TOTAL NOISE RESISTOR NOISE ONLY. k k k M M SOURCE RESISTANCE (Ω) 6 G M NOISE VOLTAGE (.2/DIV).Hz to Hz Noise V S = ±V 2 3 4 6 7 9 TIME (SEC) 6 G9 62fc
Typica Performance Characteristics LT6/LT62 NOISE VOLTAGE (.2/DIV).Hz to Hz Noise V S = ±V 2 3 4 6 7 9 TIME (SEC) 6 G OUTPUT VOLTAGE SWING (mv) V 2 4 6 6 4 2 V Output Votage Swing vs Temperature OUTPUT HIGH OUTPUT LOW V S = V, V NO LOAD 2 2 7 2 TEMPERATURE ( C) 6 G OUTPUT HIGH SATURATION VOLTAGE (V)... Output Saturation Votage vs Load Current (Output High) V S = V, V T A = C T A = 4 C. LOAD CURRENT (ma) 6 G2 OUTPUT LOW SATURATION VOLTAGE (V)... Output Saturation Votage vs Load Current (Output Low) Suppy Current vs Suppy Votage Warm-Up Drift V S = V, V T A = C T A = 4 C. LOAD CURRENT (ma) 6 G3 SUPPLY CURRENT (µa) PER AMPLIFIER 4 4 3 T A = C 3 2 2 T A = 4 C 2 4 6 2 4 6 2 SUPPLY VOLTAGE (±V) 6 G4 CHANGE IN OFFSET VOLTAGE () 3 2 ±V ±2.V 3 6 9 2 TIME AFTER POWER-ON (SECONDS) 6 G THD NOISE (%)... THD Noise vs Frequency THD Noise vs Frequency Setting Time vs Output Step V S = V, V V OUT = 2V P-P A V = : R L = k A V = : R F = R G = k A V = A V = THD NOISE (%)... V S = ±V V IN = 2V P-P A V = A V = OUTPUT STEP (V) 6 4 2 V S = ±V A V =.%.%. k k k. k k 2 3 4 6 7 9 SETTLING TIME (µs) 6 G6 6 G7 6 G 62fc 9
LT6/LT62 Typica Performance Characteristics OUTPUT STEP (V) 6 4 2 Setting Time vs Output Step Channe Separation vs Frequency CMRR vs Frequency V S = ±V A V =.%.% CHANNEL SEPARATION (db) 6 4 2 6 4 2 V S = V, V COMMON MODE REJECTION RATIO (db) 6 TA = 2 C 4 2 6 4 2 V S = V, V V S = ±V 2 3 4 6 7 9 SETTLING TIME (µs) k k k M k k k M 6 G9 6 G2 6 G2 POWER SUPPLY REJECTION RATIO (db) 4 2 6 4 2. PSRR vs Frequency Output Impedance vs Frequency Open-Loop Gain vs Frequency PSRR PSRR V S = V, V k k k M 6 G22 OUTPUT IMPEDANCE (Ω) V S = V, V A V = A V =. A V =. k k k M 6 G23 OPEN-LOOP GAIN (db) 4 V S = V, V 2 R L = k 6 4 2 2 4.. k k k M M 6 G24 OPEN-LOOP GAIN (db) Gain and Phase vs Frequency Gain vs Frequency, A V = Gain vs Frequency, A V = 6 V S = V, V 4 R L = k 2 3 GAIN 2 6 PHASE 2 2 24 3 4 2 k k k M M PHASE SHIFT (DEG) GAIN (db) 2 k V S = V, V C L = pf C L = pf k k M GAIN (db) 2 k V S = V, V C L = pf C L = pf k k M 6 G2 6 G26 6 G27 62fc
LT6/LT62 Typica Performance Characteristics Sma-Signa Transient Response Large-Signa Transient Response Rai-to-Rai Output Swing V 2mV/DIV 2V/DIV V V/DIV V A V = 2µs/DIV 6 G2 A V = V S = ±V µs/div 6 G29 A V = V S = V, V µs/div 6 G3 Appications Information Preserving Input Precision Preserving the input accuracy of the LT6/LT62 requires that the appications circuit and PC board ayout do not introduce errors comparabe to or greater than the 2 typica offset of the ampifiers. Temperature differentias across the input connections can generate thermocoupe votages of s of microvots so the connections to the input eads shoud be short, cose together and away from heat dissipating components. Air currents across the board can aso generate temperature differentias. The extremey ow input bias currents (2 typica) aow high accuracy to be maintained with high impedance sources and feedback resistors. The LT6/LT62 ow input bias currents are obtained by a canceation circuit on-chip. This causes the resuting I B and I B to be uncorreated, as impied by the I OS specification being comparabe to I B. Do not try to baance the input resistances in each input ead; instead keep the resistance at either input as ow as possibe for maximum accuracy. Leakage currents on the PC board can be higher than the input bias current. For exampe, GΩ of eakage between a V suppy ead and an input ead wi generate.na! Surround the input eads with a guard ring driven to the same potentia as the input common mode to avoid excessive eakage in high impedance appications. Input Protection The LT6/LT62 feature on-chip back-to-back diodes between the input devices, aong with Ω resistors in series with either input. This interna protection imits the input current to approximatey ma (the maximum aowed) for a V differentia input votage. Use additiona externa series resistors to imit the input current to ma in appications where differentia inputs of more than V are expected. For exampe, a k resistor in series with each input provides protection against 3V differentia votage. Input Common Mode Range The LT6/LT62 output is abe to swing cose to each power suppy rai (rai-to-rai out), but the input stage is imited to operating between V V and V.2V. Exceeding this common mode range wi cause the gain to drop to zero, however, no phase reversa wi occur. Tota Input Noise The LT6/LT62 ampifier contributes negigibe noise to the system when driven by sensors (sources) with impedance between 2kΩ and MΩ. Throughout this range, tota input noise is dominated by the 4kTR S noise of the source. If the source impedance is ess than 2kΩ, the input votage noise of the ampifier starts to contribute 62fc
LT6/LT62 Appications Information with a minimum noise of 4nV/ Hz for very ow source impedance. If the source impedance is more than MΩ, the input current noise of the ampifier, mutipied by this high impedance, starts to contribute and eventuay dominate. Tota input noise spectra density can be cacuated as: v n(total) = e n 2 4kTR S (i n R S ) 2 where e n = 4nV/ Hz, i n =./ Hz and R S is the tota impedance at the input, incuding the source impedance. Capacitive Loads The LT6/LT62 can drive capacitive oads up to pf in unity gain. The capacitive oad driving capabiity increases as the ampifier is used in higher gain configurations. A sma series resistance between the output and the oad further increases the amount of capacitance that the ampifier can drive. Rai-to-Rai Operation The LT6/LT62 outputs can swing to within miivots of either suppy rai, but the inputs can not. However, for most op amp configurations, the inputs need to swing ess than the outputs. Figure shows the basic op amp configurations, ists what happens to the op amp inputs and specifies whether or not the op amp must have raito-rai inputs. Seect a rai-to-rai input op amp ony when reay necessary, because the input precision specifications are usuay inferior. V REF V IN V IN V IN R G R F R F 6 F R G INVERTING: A V = R F /R G OP AMP INPUTS DO NOT MOVE, BUT ARE FIXED AT DC BIAS POINT V REF INPUT DOES NOT HAVE TO BE RAIL-TO-RAIL V REF NONINVERTING: A V = R F /R G INPUTS MOVE BY AS MUCH AS V IN, BUT THE OUTPUT MOVES MORE INPUT MAY NOT HAVE TO BE RAIL-TO-RAIL NONINVERTING: A V = INPUTS MOVE BY AS MUCH AS OUTPUT INPUT MUST BE RAIL-TO-RAIL FOR OVERALL CIRCUIT RAIL-TO-RAIL PERFORMANCE Figure. Some Op Amp Configurations Do Not Require Rai-to-Rai Inputs to Achieve Rai-to-Rai Outputs 2 62fc
LT6/LT62 Simpified Schematic (One Ampifier) V R3 R4 R R6 Q7 Q6 Q Q9 Q Q R C C Q3 Q4 Q2 B A Q22 C2 D3 D4 Q3 OUT IN IN R Ω R2 Ω Q D D2 Q2 Q7 C B A Q Q6 Q2 D Q4 C3 Q2 Q Q9 Q V 6 SS 62fc 3
LT6/LT62 Package Description Pease refer to http://www.inear.com/designtoos/packaging/ for the most recent package drawings. DD Package -Lead Pastic DFN (3mm 3mm) (Reference LTC DWG # --69 Rev C).7 ±. 3. ±. 2. ±..6 ±. (2 SIDES) PACKAGE OUTLINE.2 ±.. BSC 2.3 ±. RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R =.2 TYP.4 ±. PIN TOP MARK (NOTE 6).2 REF 3. ±. (4 SIDES).7 ±....6 ±. (2 SIDES) 4.2 ±.. BSC 2.3 ±. BOTTOM VIEW EXPOSED PAD (DD) DFN 9 REV C NOTE:. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M-229 VARIATION OF (WEED-) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.mm ON ANY SIDE. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN LOCATION ON TOP AND BOTTOM OF PACKAGE 4 62fc
Package Description Pease refer to http://www.inear.com/designtoos/packaging/ for the most recent package drawings. S Package -Lead Pastic Sma Outine (Narrow. Inch) (Reference LTC DWG # --6) LT6/LT62. BSC.4 ±..9.97 (4..4) NOTE 3 7 6.24 MIN.6 ±..22.244 (.79 6.97)..7 (3. 3.9) NOTE 3.3 ±. TYP RECOMMENDED SOLDER PAD LAYOUT 2 3 4.. (.23.24)..2 (.24.) 4 TYP.3.69 (.346.72).4. (..24).6. (.46.27) NOTE: INCHES. DIMENSIONS IN (MILLIMETERS).4.9 (.3.43) TYP 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED.6" (.mm). (.27) BSC SO 33 62fc
LT6/LT62 Package Description Pease refer to http://www.inear.com/designtoos/packaging/ for the most recent package drawings. MS Package -Lead Pastic MSOP (Reference LTC DWG # --66 Rev F) 3. ±.2 (. ±.4) (NOTE 3) 7 6.2 (.2) REF.23 (.26) MIN.42 ±.3 (.6 ±.) TYP.9 ±.27 (.3 ±.) 3.2 3.4 (.26.36).6 (.26) BSC RECOMMENDED SOLDER PAD LAYOUT GAUGE PLANE. (.7).24 (.) DETAIL A 6 TYP.3 ±.2 (.2 ±.6) DETAIL A NOTE:. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED.2mm (.6") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED.2mm (.6") PER SIDE. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE.2mm (.4") MAX SEATING PLANE 4.9 ±.2 (.93 ±.6). (.43) MAX.22.3 (.9.) TYP.6 (.26) BSC 2 3 4 3. ±.2 (. ±.4) (NOTE 4).6 (.34) REF.6 ±. (.4 ±.2) MSOP (MS) 37 REV F 6 62fc
Package Description Pease refer to http://www.inear.com/designtoos/packaging/ for the most recent package drawings. S4 Package 4-Lead Pastic Sma Outine (Narrow. Inch) (Reference LTC DWG # --6) LT6/LT62. BSC.4 ±..337.344 (.6.73) NOTE 3 N 4 3 2 9.24 MIN 2 3 N/2.6 ±..22.244 (.79 6.97) N N/2..7 (3. 3.9) NOTE 3.3 ±. TYP RECOMMENDED SOLDER PAD LAYOUT 2 3 4 6 7.. (.23.24)..2 (.24.) 4 TYP.3.69 (.346.72).4. (..24).6. (.46.27) NOTE: INCHES. DIMENSIONS IN (MILLIMETERS).4.9 (.3.43) TYP 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED.6" (.mm). (.27) BSC S4 2 62fc 7
LT6/LT62 Package Description Pease refer to http://www.inear.com/designtoos/packaging/ for the most recent package drawings. GN Package 6-Lead Pastic SSOP (Narrow. Inch) (Reference LTC DWG # --64).4 ±..9.96* (4. 4.97) 6 4 3 2 9.9 (.229) REF.24 MIN..6.229.244 (.7 6.9)..7** (3. 3.9).6 ±. RECOMMENDED SOLDER PAD LAYOUT.2 BSC 2 3 4 6 7.7.9 (.7.249). ±.4 (.3 ±.) 4 TYP.32.6 (.3.7).4.9 (.2.249).6. (.46.27) NOTE:. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED.6" (.2mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.24mm) PER SIDE..2 (.23.3) TYP.2 (.63) BSC GN6 (SSOP) 24 62fc
LT6/LT62 Revision History (Revision history begins at Rev C) REV DATE DESCRIPTION PAGE NUMBER C /2 Removed specific package information from the Absoute Maximum Ratings section. 2 Added a new Typica Appication drawing. 2 Information furnished by Linear Technoogy Corporation is beieved to be accurate and reiabe. However, no responsibiity is assumed for its use. Linear Technoogy Corporation makes no representation that the interconnection of its circuits as described herein wi not infringe on existing patent rights. 62fc 9
LT6/LT62 Typica Appication Low Power Ha Sensor Ampifier V S V S 4 LT79-.2, 2 6 V S = 3V TO V I S = ~6µA V OUT = ~4mV/mT 7.7k % k % V S LT72 k OFFSET ADJUST HALL ELEMENT ASAHI-KASEI HW-A (RANK D) www.asahi-kasei.co.jp 2 3 4Ω 4 26.7k % 4 3 2 k 6 /2 LT6 49.9k 49.9k /2 LT6 4 7 V OUT 6 TA2 Buffering an -Bit Msps SAR ADC V LTC66- V V V V P-P DIFFERENTIAL /2 LT6 49Ω nf 47µF 2.V IN REF V DD LTC237- -BIT Msps V V /2 LT6 49Ω nf INL = ±LSB AT -BITS SNR = db THD = 7dB AT 7Hz IN 6 TA3 V NOTE: SUPPLIES AS LOW AS V, 7V PROVIDES ENOUGH HEADROOM FOR FULL-SCALE OPERATION. Reated Parts PART NUMBER DESCRIPTION COMMENTS LT2/LT4 Dua/Quad Low Power, Picoamp Input Precision Op Amp 2 Input Bias Current LT Rai-to-Rai Output, Picoamp Input Precision Op Amp SOT-23 LT/LT2 Dua/Quad Rai-to-Rai Output, Picoamp Input Precision Op Amp C LOAD Up to pf LT4/LT Dua/Quad Rai-to-Rai Output, Picoamp Input Precision Op Amp 9.nV/ Hz Input Noise LT99/LT996 Precision, µa Gain-Seectabe Ampifier LT6-Like Op Amp with.4% Matched Resistors LT6 Singe 3µA, 4nV/ Hz Rai-to-Rai Output Precision Op Amp 3 Maximum V OS ; Maximum I B ; Shutdown LT63/LT64 Singe/Dua 4µA, 9.nV/ Hz, Rai-to-Rai Output Precision Op Amp A V Stabe;.4MHz GBW 2 LT 2 REV C PRINTED IN USA Linear Technoogy Corporation 63 McCarthy Bvd., Mipitas, CA 93-747 (4) 432-9 FAX: (4) 434-7 www.inear.com LINEAR TECHNOLOGY CORPORATION 23 62fc