NTH027N65S3F N-Channel SuperFET III FRFET MOSFET 650 V, 75 A, 27.4 mω Features

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NTH027N65S3F N-Channel SuperFET III FRFET MOSFET 650 V, 75 A, 27.4 mω Features 700 V @ T J = 50 o C Typ. R DS(on) = 23 mω Ultra Low Gate Charge (Typ. Q g = 259 nc) Low Effective Output Capacitance (Typ. C oss(eff.) = 972 pf) 00% Avalanche Tested RoHS Compliant Applications Telecom / Sever Power Supplies Industrial Power Supplies UPS / Solar Description SuperFET III MOSFET is ON Semiconductor s brand-new high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate. Consequently, SuperFET III MOSFET is very suitable for the various power system for miniaturization and higher efficiency. SuperFET III FRFET MOSFET s optimized reverse recovery performance of body diode can remove additional component and improve system reliability. G D G D S TO-247 long leads S Absolute Maximum Ratings T C = 25 o C unless otherwise noted. Symbol Parameter NTH027N65S3F-F55 (Note ) Unit V DSS Drain to Source Voltage 650 V V GSS Gate to Source Voltage - DC ±30 V - AC (f > Hz) ±30 V I D Drain Current - Continuous (T C = 25 o C) 75 - Continuous (T C = 00 o C) 60 A I DM Drain Current - Pulsed (Note 2) 87.5 A E AS Single Pulsed Avalanche Energy (Note 3) 60 mj I AS Avalanche Current (Note 2) 5 A E AR Repetitive Avalanche Energy (Note 2) 5.95 mj dv/dt MOSFET dv/dt 00 Peak Diode Recovery dv/dt (Note 4) 50 V/ns P D Power Dissipation (T C = 25 o C) 595 W - Derate Above 25 o C 4.76 W/ o C T J, T STG Operating and Storage Temperature Range -55 to +50 o C T L Maximum Lead Temperature for Soldering, /8 from Case for 5 Seconds 300 o C Thermal Characteristics Symbol Parameter NTH027N65S3F-F55 Unit R θjc Thermal Resistance, Junction to Case, Max. 0.2 o C/W R θja Thermal Resistance, Junction to Ambient, Max. 40 207 Semiconductor Components Industries, LLC. November-207, Rev. 2 Publication Order Number: NTH027N65S3F/D

Package Marking and Ordering Information Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity NTH027N65S3F-F55 NTH027N65S3F TO-247 Tube N/A N/A 30 units Electrical Characteristics T C = 25 o C unless otherwise noted. Symbol Parameter Test Conditions Min. Typ. Max. Unit Off Characteristics V GS = 0 V, I D = ma, T J = 25 C 650 - - V BV DSS Drain to Source Breakdown Voltage V GS = 0 V, I D = ma, T J = 50 C 700 - - V ΔBV DSS Breakdown Voltage Temperature I / ΔT J Coefficient D = 5 ma, Referenced to 25 o C - 0.6 - V/ o C V DS = 650 V, V GS = 0 V - - 0 I DSS Zero Gate Voltage Drain Current μa V DS = 520 V, T C = 25 o C - 36 - I GSS Gate to Body Leakage Current V GS = ±30 V, V DS = 0 V - - ±00 na On Characteristics V GS(th) Gate Threshold Voltage V GS = V DS, I D = 7.5 ma 3.0-5.0 V R DS(on) Static Drain to Source On Resistance V GS = 0 V, I D = 35 A - 23 27.4 mω g FS Forward Transconductance V DS = 20 V, I D = 37.5 A - 56 - S Dynamic Characteristics C iss Input Capacitance V DS = 400 V, V GS = 0 V, - 7690 - pf C oss Output Capacitance f = MHz - 200 - pf C oss(eff.) Effective Output Capacitance V DS = 0 V to 400 V, V GS = 0 V - 972 - pf C oss(er.) Energy Related Output Capacitance V DS = 0 V to 400 V, V GS = 0 V - 352 - pf Q g(tot) Total Gate Charge at 0V V DS = 400 V, I D = 37.5 A, - 259 - nc Q gs Gate to Source Gate Charge V GS = 0 V - 72 - nc Q gd Gate to Drain Miller Charge (Note 5) - 99 - nc ESR Equivalent Series Resistance f = MHz -.2 - Ω Switching Characteristics t d(on) Turn-On Delay Time - 49 - ns t r Turn-On Rise Time V DD = 400 V, I D = 37.5 A, - 47 - ns t d(off) Turn-Off Delay Time V GS = 0 V, R g = 2 Ω - 3 - ns t f Turn-Off Fall Time (Note 5) - 34 - ns Source-Drain Diode Characteristics I S Maximum Continuous Source to Drain Diode Forward Current - - 75 A I SM Maximum Pulsed Source to Drain Diode Forward Current - - 87.5 A V SD Source to Drain Diode Forward Voltage V GS = 0 V, I SD = 37.5 A - -.3 V t rr Reverse Recovery Time V GS = 0 V, I SD = 37.5 A, - 68 - ns Q rr Reverse Recovery Charge di F /dt = 00 A/μs - 04 - nc Notes:. Due to system integration constraints between Fairchild and ON semiconductor, as of November, 207 any product part number with a underscore will be replaced with a dash. This is a notification. 2. Repetitive rating: pulse-width limited by maximum junction temperature. 3. I AS = 5 A, R G = 25 Ω, starting T J = 25 C. 4. I SD 37.5 A, di/dt 00 A/μs, V DD 400 V, starting T J = 25 C. 5. Essentially independent of operating temperature typical characteristics. 2

Typical Performance Characteristics RDS(ON), ID, Drain Current[A] Drain-Source On-Resistance [Ω] Figure. On-Region Characteristics 200 00 0 V GS = 0.0V 8.0V 7.0V 6.5V 6.0V 5.5V. 250μs Pulse Test 2. T C = 25 o C 0. 0 20 V DS, Drain-Source Voltage[V] Figure 2. Transfer Characteristics 2 3 4 5 6 7 8 V GS, Gate-Source Voltage[V] Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage Drain Current and Gate Voltage Variation vs. Source Current and Temperature 0.04 0.03 0.02 *Note: T C = 25 o C V GS = 0V V GS = 20V IS, Reverse Drain Current [A] ID, Drain Current[A] 300 00 0 000 00 0 0. 0.0. V DS = 20V 2. 250μs Pulse Test 50 o C. V GS = 0V 2. 250μs Pulse Test 50 o C -55 o C -55 o C 25 o C 25 o C 0.0 0 50 00 50 200 I D, Drain Current [A] Figure 5. Capacitance Characteristics 0.00 0.0 0.5.0.5 2.0 V SD, Body Diode Forward Voltage [V] Figure 6. Gate Charge Characteristics 000000 0 *Note: I D = 37.5A Capacitances [pf] 00000 0000 000 00 0 *Note:. V GS = 0V 2. f = MHz Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd C iss C oss C rss 0. 0-0 0 0 0 2 V DS, Drain-Source Voltage [V] 0 3 VGS, Gate-Source Voltage [V] 8 6 4 2 V DS = 30V V DS = 400V 0 0 60 20 80 240 300 Q g, Total Gate Charge [nc] 3

Typical Performance Characteristics (Continued) BVDSS, [Normalized] Drain-Source Breakdown Voltage ID, Drain Current [A] Figure 7. Breakdown Voltage Variation vs. Temperature.2..0 0.9 0.8. V GS = 0V 2. I D = 5mA -50 0 50 00 50 T J, Junction Temperature [ o C] Figure 9. Maximum Safe Operating Area 500 00 0 Operation in This Area is Limited by R DS(on). T C = 25 o C DC ms 0ms 00μs 30μs 2. T J = 50 o C 3. Single Pulse 0. 0 00 000 V DS, Drain-Source Voltage [V] Figure 8. On-Resistance Variation vs. Temperature RDS(on), [Normalized] Drain-Source On-Resistance ID, Drain Current [A] 3.0 2.5 2.0.5.0 0.5 0.0. V GS = 0V 2. I D = 35A -50 0 50 00 50 T J, Junction Temperature [ o C] Figure 0. Maximum Drain Current vs. Case Temperature 80 60 40 20 0 25 50 75 00 25 50 T C, Case Temperature [ o C] Figure. Eoss vs. Drain to Source Voltage 60 45 E OSS [μj] 30 5 0 0 30 260 390 520 650 V DS, Drain to Source Voltage [V] 4

Typical Performance Characteristics (Continued) r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 0. 0.0 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0. 0.05 0.02 0.0 SINGLE PULSE Figure 2. Transient Thermal Response Curve Duty Cycle, D = t / t 2 0.00 0-5 0-4 0-3 0-2 0-0 0 0 0 2 t, RECTANGULAR PULSE DURATION (sec) NOTES: P DM t t 2 Z θjc (t) = r(t) x R θjc R θjc = 0.2 o C/W Peak T J = P DM x Z θjc (t) + T C 5

I G = const. R G Figure 3. Gate Charge Test Circuit & Waveform R L V V DS DS 90% V V GS DD V 0V GS DUT 0% V GS t d(on) t r t d(off) tf t on t off Figure 4. Resistive Switching Test Circuit & Waveforms V GS Figure 5. Unclamped Inductive Switching Test Circuit & Waveforms 6

V GS V GS ( Driver ) R G DUT + I SD V DS _ L Driver Same Type as DUT dv/dt controlled by RG I SD controlled by pulse period Gate Pulse Width D = -------------------------- Gate Pulse Period V DD 0V I FM, Body Diode Forward Current I SD ( DUT ) di/dt I RM Body Diode Reverse Current V DS ( DUT ) Body Diode Recovery dv/dt V SD V DD Body Diode Forward Voltage Drop Figure 6. Peak Diode Recovery dv/dt Test Circuit & Waveforms 7

Mechanical Dimensions 8

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