PD 9736A IRFB427PbF HEXFET Power MOSFET Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits G D S V DSS 2V R DS(on) typ. 7m: max. 2m: 76A I D Benefits l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dv/dt and di/dt Capability l LeadFree D G S TO22AB G D S Gate Drain Source Absolute Maximum Ratings Symbol Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V 76 I D @ T C = C Continuous Drain Current, V GS @ V 54 A I DM Pulsed Drain Current c 3 P D @T C = 25 C Maximum Power Dissipation 375 W Linear Derating Factor 2.5 W/ C V GS GatetoSource Voltage ± 2 V dv/dt Peak Diode Recovery e 57 V/ns Operating Junction and 55 to 75 C T STG Storage Temperature Range Soldering Temperature, for seconds (.6mm from case) Mounting torque, 632 or M3 screw 3 lbxin (.Nxm) Avalanche Characteristics E AS (Thermally limited) Single Pulse Avalanche Energy d 25 mj I AR Avalanche Current c See Fig. 4, 5, 22a, 22b, A E AR Repetitive Avalanche Energy f mj Thermal Resistance Symbol Parameter Typ. Max. Units R θjc JunctiontoCase j.4 R θcs CasetoSink, Flat Greased Surface.5 C/W R θja JunctiontoAmbient ij 62 www.irf.com 8/28/8
IRFB427PbF Static @ = 25 C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Conditions V (BR)DSS DraintoSource Breakdown Voltage 2 V V GS = V, I D = 25μA ΔV (BR)DSS /Δ Breakdown Voltage Temp. Coefficient.23 V/ C Reference to 25 C, I D = 5mAc R DS(on) Static DraintoSource OnResistance 7 2 mω V GS = V, f V GS(th) Gate Threshold Voltage 3. 5. V V DS = V GS, I D = 25μA I DSS DraintoSource Leakage Current 2 μa V DS = 2V, V GS = V 25 V DS = 2V, V GS = V, = 25 C I GSS GatetoSource Forward Leakage na V GS = 2V GatetoSource Reverse Leakage V GS = 2V R G(int) Internal Gate Resistance 3. Ω Dynamic @ = 25 C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units gfs Forward Transconductance 79 S Q g Total Gate Charge 5 nc Q gs GatetoSource Charge 3 Q gd GatetoDrain ("Miller") Charge 3 Q sync Total Gate Charge Sync. (Q g Q gd ) 69 t d(on) TurnOn Delay Time 7 ns t r Rise Time 8 t d(off) TurnOff Delay Time 56 t f Fall Time 22 C iss Input Capacitance 538 C oss Output Capacitance 4 C rss Reverse Transfer Capacitance 86 pf C oss eff. (ER) Effective Output Capacitance (Energy Related)h 36 C oss eff. (TR) Effective Output Capacitance (Time Related)g 59 Diode Characteristics Symbol Parameter Min. Typ. Max. Units I S Continuous Source Current 76 A Conditions V DS = 5V, V DS = V V GS = V f, V DS =V, V GS = V V DD = 3V R G = 2.7Ω V GS = V f V GS = V V DS = 5V ƒ =.MHz V GS = V, V DS = V to 6V h V GS = V, V DS = V to 6V g Conditions MOSFET symbol (Body Diode) showing the I SM Pulsed Source Current 3 integral reverse G (Body Diode)c pn junction diode. V SD Diode Forward Voltage.3 V = 25 C, I S = 44A, V GS = V f t rr Reverse Recovery Time 36 ns = 25 C V R = V, 39 = 25 C I F = 44A Q rr Reverse Recovery Charge 458 nc = 25 C di/dt = A/μs f 688 = 25 C I RRM Reverse Recovery Current 8.3 A = 25 C t on Forward TurnOn Time Intrinsic turnon time is negligible (turnon is dominated by LSLD) D S Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by max, starting = 25 C, L =.26mH R G = 25Ω, I AS = 44A, V GS =V. Part not recommended for use above this value. ƒ I SD 44A, di/dt 76A/μs, V DD V (BR)DSS, 75 C. Pulse width 4μs; duty cycle 2%. C oss eff. (TR) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from to 8% V DSS. C oss eff. (ER) is a fixed capacitance that gives the same energy as C oss while V DS is rising from to 8% V DSS. When mounted on " square PCB (FR4 or G Material). For recom mended footprint and soldering techniques refer to application note #AN994. ˆ R θ is measured at approximately 9 C 2 www.irf.com
C, Capacitance (pf) V GS, GatetoSource Voltage (V) I D, DraintoSource Current (Α) R DS(on), DraintoSource On Resistance (Normalized) I D, DraintoSource Current (A) I D, DraintoSource Current (A) IRFB427PbF VGS TOP 5V V 8.V 7.V 6.V 5.5V 5.V BOTTOM 4.5V VGS TOP 5V V 8.V 7.V 6.V 5.5V 5.V BOTTOM 4.5V.. 4.5V 6μs PULSE WIDTH Tj = 25 C. V DS, DraintoSource Voltage (V). 4.5V 6μs PULSE WIDTH Tj = 75 C. V DS, DraintoSource Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics V DS = 5V 6μs PULSE WIDTH 3.5 3. V GS = V = 75 C 2.5 2. = 25 C.5.. 3. 4. 5. 6. 7. 8. V GS, GatetoSource Voltage (V) Fig 3. Typical Transfer Characteristics.5 6 4 2 2 4 6 8 2 4 6 8, Junction Temperature ( C) Fig 4. Normalized OnResistance vs. Temperature 8 6 V GS = V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd C iss 6 2 V DS = 6V V DS = V V DS = 4V 4 8 2 4 C oss C rss 2 4 6 8 2 Q V DS, DraintoSource Voltage (V) G Total Gate Charge (nc) Fig 5. Typical Capacitance vs. DraintoSource Voltage Fig 6. Typical Gate Charge vs. GatetoSource Voltage www.irf.com 3
Energy (μj) E AS, Single Pulse Avalanche Energy (mj) V (BR)DSS, I D, Drain Current (A) DraintoSource Breakdown Voltage (V) I D, DraintoSource Current (A) IRFB427PbF OPERATION IN THIS AREA LIMITED BY R DS (on) I SD, Reverse Drain Current (A). = 75 C = 25 C V GS = V..2.4.6.8..2.4. Tc = 25 C Tj = 75 C Single Pulse μsec msec msec DC V SD, SourcetoDrain Voltage (V) Fig 7. Typical SourceDrain Diode Forward Voltage V DS, DraintoSource Voltage (V) Fig 8. Maximum Safe Operating Area 8 26 Id = 5mA 6 24 4 22 2 2 8. 6. 25 5 75 25 5 75 T C, CaseTemperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature 8 6 4 2 2 4 6 8 2468, Temperature ( C ) 8 Fig. DraintoSource Breakdown Voltage I D TOP 8.2A 3A BOTTOM 44A 6 4. 4 2. 2. 4 8 2 6 2 25 5 75 25 5 75 V DS, DraintoSource Voltage (V) Starting, Junction Temperature ( C) Fig. Typical C OSS Stored Energy Fig 2. Maximum Avalanche Energy Vs. DrainCurrent 4 www.irf.com
E AR, Avalanche Energy (mj) Avalanche Current (A) IRFB427PbF Thermal Response ( Z thjc ) D =.5...2..5.2. SINGLE PULSE ( THERMAL RESPONSE ). E6 E5.... t, Rectangular Pulse Duration (sec) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc Tc Fig 3. Maximum Effective Transient Thermal Impedance, JunctiontoCase τj τj τ τ Ci= τi/ri Ci i/ri R R 2 R 3 R R 2 R 3 τ 2 τ 3 τ 2 τ 3 R4 R4 τ4 τ4 τc τ Ri ( C/W) τι (sec).2.9.83333.78.8667.76.3333.8764 Duty Cycle = Single Pulse..5. Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔTj = 5 C and Tstart =25 C (Single Pulse) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔΤ j = 25 C and Tstart = 5 C. 25 2 5 5..E6.E5.E4.E3.E2.E TOP Single Pulse BOTTOM % Duty Cycle 25 5 75 25 5 75 Starting, Junction Temperature ( C) Fig 5. Maximum Avalanche Energy vs. Temperature tav (sec) Fig 4. Typical Avalanche Current vs.pulsewidth Notes on Repetitive Avalanche Curves, Figures 4, 5: (For further info, see AN5 at www.irf.com). Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 6a, 6b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. ΔT = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 4, 5). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see Figures 3) P D (ave) = /2 (.3 BV I av ) = DT/ Z thjc I av = 2DT/ [.3 BV Z th ] E AS (AR) = P D (ave) t av www.irf.com 5
Q RR (nc) I RRM (A) Q RR (nc) V GS (th) Gate threshold Voltage (V) I RRM (A) IRFB427PbF 6. 5. I D =.A I D =.ma I D = 25μA 5 4 4. 3 3. 2.. 75 5 25 25 5 75 25 5 75, Temperature ( C ) Fig 6. Threshold Voltage Vs. Temperature 2 I F = 29A V R = V = 25 C = 25 C 2 3 4 5 6 7 8 9 di f / dt (A / μs) Fig. 7 Typical Recovery Current vs. di f /dt 6 3 5 25 4 2 3 5 2 I F = 44A V R = V = 25 C = 25 C 2 3 4 5 6 7 8 9 di f / dt (A / μs) Fig. 8 Typical Recovery Current vs. di f /dt I F = 29A V R = V 5 = 25 C = 25 C 2 3 4 5 6 7 8 9 di f / dt (A / μs) Fig. 9 Typical Stored Charge vs. di f /dt 3 25 2 5 I F = 44A V R = V 5 = 25 C = 25 C 2 3 4 5 6 7 8 9 di f / dt (A / μs) Fig. 2 Typical Stored Charge vs. di f /dt 6 www.irf.com
IRFB427PbF D.U.T ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. Device Under Test V DD ReApplied Voltage Body Diode Inductor Curent Current Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 2. Peak Diode Recovery dv/dt Test Circuit for NChannel HEXFET Power MOSFETs 5V tp V (BR)DSS V DS L DRIVER R G 2V V GS tp D.U.T I AS.Ω V DD A I AS Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms V DS R D V DS V GS D.U.T. 9% R G V DD VV GS Pulse Width µs Duty Factor. % % V GS t d(on) t r t d(off) t f Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms Current Regulator Same Type as D.U.T. Vds Id 5KΩ Vgs 2V.2μF.3μF V GS D.U.T. V DS Vgs(th) 3mA I G I D Current Sampling Resistors Qgs Qgs2 Qgd Qgodr Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform www.irf.com 7
IRFB427PbF TO22AB Package Outline Dimensions are shown in millimeters (inches) TO22AB Part Marking Information E XAMPL E: T HIS IS AN IRF LOT CODE 789 ASSEMBLED ON WW 9, 2 IN THE ASSEMBLY LINE "C" Note: "P" in assembly line position indicates "Lead Free" INTERNATIONAL RECTIFIER LOGO AS S E MB LY LOT CODE PART NUMBER DATE CODE YEAR = 2 WEEK 9 LINE C TO22AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245, USA Tel: (3) 25275 TAC Fax: (3) 252793 Visit us at www.irf.com for sales contact information. 8/8 8 www.irf.com